Prosecution Insights
Last updated: April 19, 2026
Application No. 17/956,540

BACK PLATES TO SUPPORT INTEGRATED CIRCUIT PACKAGES IN SOCKETS ON PRINTED CIRCUIT BOARDS AND ASSOCIATED METHODS

Non-Final OA §102
Filed
Sep 29, 2022
Examiner
ESTRADA, ANGEL R
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
41%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
1146 granted / 1342 resolved
+17.4% vs TC avg
Minimal -44% lift
Without
With
+-44.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
23 currently pending
Career history
1365
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
35.6%
-4.4% vs TC avg
§102
55.9%
+15.9% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1342 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements filed on September 29, 2022, March 1, 2023, October 16, 2025 and November 18, 2025 have been considered by the Examiner. Election/Restrictions Applicant’s election without traverse of Invention I (claims 1-14 and 23-25) in the reply filed on January 23, 2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5, 7-9, 12-14 and 23-25 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Jimarez et al (US 6,734,368; hereinafter Jimarez). Regarding claim 1, Jimarez discloses a back plate (12) comprising: a ceramic substrate (16; dielectric; column 3 lines 28-39) having a first surface and a second surface opposite the first surface (see figure 1); and metal (18; copper) coupled to the ceramic substrate (16), at least a portion of the metal (18) disposed between planes defined by the first and second surfaces of the ceramic substrate (see figure 1. Regarding claim 2, Jimarez discloses the back plate (12), wherein the ceramic substrate (16) includes sintered alumina (dielectric; column 3 lines 28-39). Regarding claim 3, Jimarez discloses the back plate (12), wherein there is no adhesive between the ceramic substrate (16) and the metal (18). Regarding claim 4, Jimarez discloses the back plate (12), wherein the metal (18) is adjacent the second surface of the ceramic substrate (see figure 1). Regarding claim 5, Jimarez discloses the back plate (12), wherein the metal (18) is to cover the second surface of the ceramic substrate (16). Regarding claim 7, Jimarez discloses the back plate (12), wherein the ceramic substrate (16) includes a hole (30) extending therethrough. Regarding claim 8, Jimarez discloses the back plate (12), wherein the metal (18) is to extend through the hole (see figure 1). Regarding claim 9, Jimarez discloses the back plate (12), wherein the metal (18) is to extend along a wall of the hole (30) to define a smaller hole extending therethrough (see figure 1). Regarding claim 12, Jimarez discloses the back plate (12), wherein the metal (18) is embedded within the ceramic substrate (16), the metal (18) surrounding the hole (see figure 1). Regarding claim 13, Jimarez discloses the back plate (12), wherein the metal (18; copper) includes at least one of a metal wire, a wire mesh, or a metal strip (see figure 1). Regarding claim 14, Jimarez discloses the back plate (12), wherein a melting point of the metal (18; copper) is higher than a sintering temperature of a material included in the ceramic substrate (dielectric). Regarding claim 23, Jimenez discloses a method comprising: sintering particles of a ceramic material (dielectric; column 3 lines 28-39) to define a ceramic substrate (16); and coupling metal (18) to the ceramic substrate without an adhesive (see figure 1). Regarding claim 24, Jimenez discloses the method, wherein the coupling of the metal (18; copper) to the ceramic substrate (16) includes arranging the metal within the particles before the sintering (see figure 1). Regarding claim 25, Jimenez discloses the method, wherein the coupling of the metal (18) to the ceramic substrate (16) includes :positioning the ceramic substrate (16) within a die cast mold; and casting the metal (18) within spaces within the die cast mold surrounding the ceramic substrate (see figure 1). Allowable Subject Matter Claims 6, 10 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner's statement of reasons for allowance: The primary reason for the indication of the allowability of claims 6, 10 and 11 are: Regarding claim 6, the prior art does not teach or fairly suggest in combination with the other claimed limitations the back plate, wherein the metal is to cover lateral surfaces of the ceramic substrate, the lateral surfaces to extend between the first and second surfaces of the ceramic substrate. Regarding claim 10, the prior art does not teach or fairly suggest in combination with the other claimed limitations the back plate, wherein the smaller hole is threaded. Regarding claim 11, the prior art does not teach or fairly suggest in combination with the other claimed limitations the back plate, wherein the ceramic substrate includes an opening extending through the ceramic substrate, the metal not extending through the opening. These limitations are found in claims 6, 10 and 11, and are neither disclosed nor taught by the prior art of record, alone or in combination. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Morioka et al (US 8,841,558), Maeda et al (US 8,138,428), En et al (US 7,535,095 and US 8,030,577), Toyoshima et al (US 6,774,314) and Nishiwaki et al (US 6,512,186) disclose a back plate. 7. Any inquiry concerning this communication should be directed to Angel R. Estrada at telephone number (571) 272-1973. The Examiner can normally be reached on Monday-Friday (8:30am -5:00pm). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N. Hayman can be reached on (571) 270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) OR 571-272-1000. March 21, 2025 /ANGEL R ESTRADA/Primary Examiner, Art Unit 2841
Read full office action

Prosecution Timeline

Sep 29, 2022
Application Filed
Apr 26, 2023
Response after Non-Final Action
Mar 21, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
41%
With Interview (-44.2%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 1342 resolved cases by this examiner. Grant probability derived from career allow rate.

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