Prosecution Insights
Last updated: April 19, 2026
Application No. 17/956,802

SUB-COOLING COMPONENTS USING THERMOELECTRIC COOLING

Final Rejection §103
Filed
Sep 29, 2022
Examiner
JONES, GORDON A
Art Unit
3763
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Advanced Micro Devices, Inc.
OA Round
4 (Final)
60%
Grant Probability
Moderate
5-6
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
331 granted / 548 resolved
-9.6% vs TC avg
Strong +39% interview lift
Without
With
+39.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
65 currently pending
Career history
613
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
50.3%
+10.3% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
27.1%
-12.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 548 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-6, 8-10, 13-17, 23-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kulkarni et al. US 2018/0004259 Al, as cited on the IDS. Re claim 1, Kulkarni et al. teach an apparatus for sub-cooling an electronic component, comprising: a processor (410); a component cooling device (204, 208, coolant plate 210 of fig 2 and 3 , para 41, 108; para 65) mounted on the processor, the component cooling device including a thermoelectric cooling device; and a fan (annotated fig), wherein the thermoelectric cooling device is configured to cool an airflow from a first temperature to a second temperature, Another embodiment teach an electronic component (412), wherein each of the fan, the processor (410), and the electronic component (412) are sequentially positioned on an axis (annotated fig; para 65 lines 5-7, noting in the instant combination 410/412 are positioned sequentially under cooling plate 210 in order as shown in fig 4), and wherein the fan is configured to direct the airflow from the fan along the axis across the processor and to the electronic component to provide two CPUs. It would have been obvious to one of ordinary skill in the art at the time the invention was made to combine embodiments as taught by Kulkarni et al. in order to advantageously allow for increased processor capacity with cooling as disclosed by the cooling device. PNG media_image1.png 813 609 media_image1.png Greyscale Re claim 2, Kulkarni et al. teaches a heat exchanger (206) thermally coupled to the thermoelectric cooling device. Re claim 3, Kulkarni et al. teaches the heat exchanger comprises a radiator (fig 3). Re claim 4, Kulkarni et al. teaches the heat exchanger is thermally coupled to the thermoelectric cooling device by a closed loop having a heat transfer medium contained therein (closed loop defined by liquid in 204). Re claim 5, Kulkarni et al. teaches the closed loop is further coupled to the electronic component, wherein the thermoelectric cooling device is further configured to cool the heat transfer medium contained within the closed loop (figs, noting thermal and overall coupling and connection of all parts in unitary assembly). Re claim 6, Kulkarni et al. teaches the processor comprises at least one of a central processing unit (CPU) or an accelerated processing unit (APU) (paras 41, 65, 66). Re claim 8, Kulkarni et al. teaches wherein the second temperature is a sub- ambient temperature. For clarity, the recitation “…the second temperature is a sub- ambient temperature …” has been considered a recitation of intended use. It has been held that the recitation with respect to the matter in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. See MPEP 2114. In the instant case, the prior art meets all of the structural limitations, and is therefore capable of performing the claimed recitations set forth above. Re claim 9, Kulkarni et al. teaches an apparatus for sub-cooling an electronic component, comprising: a processor (410); a thermoelectric cooling device (204, 208, coolant plate 210 of fig 2 and 3 , para 41, 108; para 65); and a fan (annotated fig), the thermoelectric cooling device configured to cool an airflow from a first temperature to a second temperature before being directed to the processor (para 67), Another embodiment teach wherein each of the fan, the thermoelectric cooling device, and the processor are sequentially positioned on an axis (annotated fig; para 65 lines 5-7, noting in the instant combination as shown in fig 4, and portions of the thermoelectric cooling device are disposed along the axis), and wherein the fan is configured to direct the airflow from the fan along the axis across the thermoelectric cooling device and to the processor to the electronic component to provide two CPUs. It would have been obvious to one of ordinary skill in the art at the time the invention was made to combine embodiments as taught by Kulkarni et al. in order to advantageously allow for increased processor capacity with cooling as disclosed by the cooling device. PNG media_image1.png 813 609 media_image1.png Greyscale Re claim 10, Kulkarni et al. teaches a first heat exchanger (206) thermally coupled to the thermoelectric cooling device, the first heat exchanger configured to receive a first portion of heat from the thermoelectric cooling device. Re claims 13, Kulkarni et al. teach the processor comprises at least one of a central processing unit (CPU), an accelerated processing unit (APU), or a graphical processing unit (GPU) (para 39). Re claim 14, Kulkarni et al. , as modified, teaches a second electronic (para 39, 412) component, wherein the fan is further configured to direct the airflow across the second electronic component to the electronic component to provide two CPUs. It would have been obvious to one of ordinary skill in the art at the time the invention was made to combine embodiments as taught by Kulkarni et al. in order to advantageously allow for increased processor capacity with cooling as disclosed by the cooling device. Re claim 15, Kulkarni et al. teaches wherein the thermoelectric cooling device, the processor, and the second electronic component are thermally coupled by a closed loop (closed loop defined by liquid in 204) having a heat transfer medium contained therein, and wherein the thermoelectric cooling device is further configured to cool the heat transfer medium contained within the closed loop. Re claims 16, Kulkarni et al. teach wherein the second electronic component comprises at least one of a central processing unit (CPU), an accelerated processing unit (APU), or a graphical processing unit (GPU) (para 39). Re claims 17, Kulkarni et al. teach the thermoelectric cooling device is thermally coupled to the processor by a component cooler (para 32-35) that includes the thermoelectric cooling device (204, 208, coolant plate 210 of fig 2 and 3 , para 41, noting all the multiple cooling structure are assembled together and thermally connected). Re claim 21, Another embodiment of over Kulkarni et al. teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption (noting the being on and generating heat is a natural condition such that the on position is the first minimal power setting and the only reason cooling is designed for heat dissipation is when power is generating heat) of the processor to active the system when cooling is needed (Para 89-90). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by combining embodiments of Kulkarni et al. invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Re claim 22, Another embodiment of over Kulkarni et al. teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption of the processor (noting the being on and generating heat is a natural condition such that the on position is the first minimal power setting and the only reason cooling is designed for heat dissipation is when power is generating heat) to active the system when cooling is needed (Para 89-90). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by combining embodiments of Kulkarni et al. invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Re claims 23, Kulkarni et al. teach wherein thermoelectric cooling device is stacked above the processor along a vertical axis (noting many vertical axis go through main component’s of the thermoelectric device, which are stacked vertically higher than the [processor and thus are “stacked above” in a vertical height reference and additionally any vertical stacking will be “along” its own or other vertical axis), the vertical axis perpendicular to the axis intersecting the fan, the processor, and the electronic component. Additionally, it would have been obvious to one of ordinary skill in the art at the time of the invention was made to wherein thermoelectric cooling device is stacked above the processor, since it has been held that a mere reversal or rearrangement of the essential working parts of a device involves only routine skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP 2144.04, section VI, part C. Re claims 24, Kulkarni et al. teach wherein the thermoelectric cooling device is mounted to a heat exchanger (206) coupled to the fan (noting all parts are coupled in a unitary final construction), wherein the airflow from the fan is configured to be directed directly from the thermoelectric cooling device towards the processor (noting inducing airflow meets the claim configuration limitations since air is capable is travelling in multiple flow paths eventually). Claim(s) 7, 13, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kulkarni et al. in view of GAO US 20220256684 A1. Re claim 7, Kulkarni et al., as modified, fail to teach a graphical processing unit. GAO teach the electronic component comprises a graphical processing unit (GPU) (para 22) to use chips for specific purposes. It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a graphical processing unit as taught by GAO in the Kulkarni et al., as modified, invention in order to advantageously allow for intended heating cooling of various computing systems. Re claim 13, Kulkarni et al., as modified, fail to teach a graphical processing unit. GAO teach the first electronic component comprises at least one of a central processing unit (CPU), an accelerated processing unit (APU), or a graphical processing unit (GPU) (para 22) to use chips for specific purposes. It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a graphical processing unit as taught by GAO in the Kulkarni et al., as modified, invention in order to advantageously allow for intended heating cooling of various computing systems. Re claim 16, Kulkarni et al., as modified, fail to teach a graphical processing unit. GAO teach wherein the second electronic component comprises at least one of a central processing unit (CPU), an accelerated processing unit (APU), or a graphical processing unit (GPU) (para 22) to use chips for specific purposes. It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a graphical processing unit as taught by GAO in the Kulkarni et al., as modified, invention in order to advantageously allow for intended heating cooling of various computing systems. Claim(s) 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kulkarni et al. and MacDonald US 20200363104 A1. Re claim 21, Another embodiment of over Kulkarni et al. teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption of the processor to active the system when cooling is needed (Para 89-90). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by combining embodiments of Kulkarni et al. invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Additionally, MacDonald teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption of the processor to active the system when cooling is needed (Para 35-36, 39, 60). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by MacDonald in the Kulkarni et al., as modified, invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Re claim 22, Another embodiment of over Kulkarni et al. teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption of the processor (noting the being on and generating heat is a natural condition such that the on position is the first minimal power setting and the only reason cooling is designed for heat dissipation is when power is generating heat) to active the system when cooling is needed (Para 89-90). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by combining embodiments of Kulkarni et al. invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Additionally, MacDonald teach a controller configured to control an amount of power provided to the thermoelectric cooling device based on a power consumption of the processor to active the system when cooling is needed (Para 35-36, 39, 60). It would have been obvious to one of ordinary skill in the art at the time the invention was made to include a controller as taught by MacDonald in the Kulkarni et al., as modified, invention in order to advantageously allow for ability to turn the cooling system on and off as is known in the art. Response to Arguments Applicant's arguments filed 1/14/2026 have been fully considered but they are not persuasive. Applicant argues that Kulkarni et al. fails to teach an newly recited limitations regarding elements being disposed along a single axis. Examiner respectfully disagrees. the scope of the independent claims have been changed in the latest reply and therefore the examiner is now relying on a new grounds of rejection to teach the newly recited scope of the independent claims (see detailed rejection above). Therefore, the applicants’ arguments are not persuasive. The applicant argues that Kulkarni et al. fail to teach the thermoelectric cooling device being above the processer. The examiner respectfully disagrees. The term thermos electric device is not solely a thermoelectric (which is disposed along the side), but an entire “device” with multiple parts to include the thermoelectric, and other parts of the device (portions of the cold plate and conduits) are stacked above the processer. Applicant argues the claims dependent on the independent claim(s) are allowable based upon their dependence from an independent claim. Examiner respectfully disagrees. The arguments with respect to claim(s) 1 and 9 have been addressed above. Thus, the rejections are proper and remain. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GORDON A JONES whose telephone number is (571)270-1218. The examiner can normally be reached 7:30-5 M-F PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Len Tran can be reached at 571-272-1184. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GORDON A JONES/Examiner, Art Unit 3763
Read full office action

Prosecution Timeline

Sep 29, 2022
Application Filed
Oct 02, 2024
Non-Final Rejection — §103
Dec 02, 2024
Examiner Interview Summary
Dec 02, 2024
Applicant Interview (Telephonic)
Jan 06, 2025
Response Filed
Jan 23, 2025
Final Rejection — §103
May 06, 2025
Request for Continued Examination
May 08, 2025
Response after Non-Final Action
Sep 21, 2025
Non-Final Rejection — §103
Jan 06, 2026
Examiner Interview Summary
Jan 06, 2026
Applicant Interview (Telephonic)
Jan 14, 2026
Response Filed
Feb 14, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
60%
Grant Probability
99%
With Interview (+39.1%)
3y 4m
Median Time to Grant
High
PTA Risk
Based on 548 resolved cases by this examiner. Grant probability derived from career allow rate.

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