DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendments filed 2/3/2026 have been entered and considered. The amendments to claims 1 and 7 are acknowledged.
Response to Arguments
Applicant's arguments filed 2/3/2026 have been fully considered but they are not persuasive. Applicant argues that the references cited in the Office Action at least fail to teach or suggest "the first distance less than the second distance when the radiator layer is not activated." In response to this argument, the examiner notes that the metal member in Chan US 20200061670 A1 has a bottom surface and a top surface, and a portion of the bottom surface is closer to the substrate than a portion of the top surface even when the radiator layer is not activated.
Therefore, the examiner respectfully submits that Chan appears to anticipate the recited limitations.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chan et al. US 20200061670 A1 (hereinafter referred to as Chan).
Regarding claim 1, Chan teaches
A semiconductor die (“PMUT device 100” para. 0040 FIG. 1A), comprising:
a semiconductor substrate (“substrate 140” para. 0040) having a surface (upper side of “substrate 140”), the surface having first (surface of “substrate 140” under “interior support 104”, FIG. 1A) and second surface (surface of “substrate 140” under “cavity 130”, FIG. 2); and
a radiator layer (“membrane 120” comprising stack of “lower electrode 106”, “piezoelectric layer 110”, “upper electrode 108”, and “mechanical support layer 112”, para. 0041-0042 FIG. 1A) on the surface, the radiator layer comprising:
a metal member (“mechanical support layer 112”, made of metal, para. 0042) having a first metal member portion above the first surface portion (portion of bottom surface of “mechanical support layer 112” over “interior support 104”) and a second metal member portion above the second surface portion (portion of top surface of “mechanical support layer 112” over right “cavity 130”), a first distance between the first metal member portion and the first surface portion (distance from “substrate 140” to bottom surface of “mechanical support layer 112” with “interior support 104” therebetween as shown in annotated FIG. 1A), and a second distance between the second metal member portion and the second surface portion (distance from “substrate 140” to top surface of “mechanical support layer 112” with “cavity 130” therebetween as shown in annotated FIG. 1A), the first distance less than the second distance (distance from “substrate 140” to the bottom surface of “mechanical support layer 112” with “interior support 104” therebetween is shorter than the distance from “substrate 104” to top surface of “mechanical support layer 112” with “cavity 130” therebetween, as shown in annotated FIG. 1A);
first (“lower electrode 106”) and second electrodes (“upper electrode 108”); and
a piezoelectric layer (“piezoelectric layer 110”) extending along a length of the radiator layer and on each of the first and second electrodes (“piezoelectric layer 110” extends from left to right in “PMUT device 100” between “lower electrode 106” and “upper electrode 108”), the piezoelectric layer between the first and second metal members and the semiconductor substrate (“piezoelectric layer 110” is between the two portions of “mechanical support layer 112” and “substrate 140”).
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Regarding claim 5, Chan teaches the semiconductor die of claim 1, wherein the metal member includes a third metal member portion (portion of bottom surface of “mechanical support layer 112” over right “edge support 102”, shown in annotated FIG. 1A above), the second metal member portion is between the first and third metal member portions (portion of top surface of “mechanical support layer 112” over right “cavity 130” is between portions of bottom surface of “mechanical support layer 112” over “interior support 104” and right “edge support 102”) the surface has a third surface portion (upper surface of “substrate 140” under right “edge support 102”), the second surface portion is between the first and third surface portions (upper surface of “substrate 140” under right “cavity 130” is between upper surfaces of “substrate 140” under “interior support 104” and right “edge support 102”), and a third distance between the third metal member portion and the third surface portion is less than the second distance (distance from “substrate 140” to bottom surface of “mechanical support layer 112” with “interior support 104” therebetween is shorter than the distance from “substrate 104” to top surface of “mechanical support layer 112” with “cavity 130” therebetween, as shown in annotated FIG. 1A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Chan, in view of Boudoin et al. US 20230021489 A1 (hereinafter referred to as Boudoin).
Regarding claim 2, Chan teaches the semiconductor die of claim 1 but fails to teach wherein the radiator layer is configured to emit an acoustic wave having a frequency in the range of 100 MHz to 300 MHz, inclusive.
Nevertheless, Boudoin teaches an electroacoustic device comprising a pair of transducers that produce different acoustic waves (para. 0013). The acoustic waves manipulate objects in a fluid coupled to the transducers (para. 0001-0002, 0014). The waves can be in the range of 1-10000 MHz (para. 0016) and can be kept at ranges higher than 100MHz for certain applications. “Objects 155” can be manipulated when the acoustic waves are of a wavelength similar to the size of the “objects 155” (para. 0212 FIG. 2). One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the transducers can be operated at different frequencies depending on the sizes of the objects that are to be studied.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor die taught in Chan with the frequency ranges taught in Boudoin. The appropriate acoustic wave frequency to be produced depends on the object that is to be probed.
Regarding claim 4, Chan teaches the semiconductor die of claim 2, wherein the radiator layer is configured to expand and contract responsive to the acoustic wave (the examiner understands “piezoelectric layer 110” experiences a mechanical strain in the presence of an electric field and vibrates due to expansion and contraction of the layer, as suggested in para. 0046. Furthermore, lead zirconate titanate is a material usable as “piezoelectric layer 110, para. 0048, and it is known to expand and contract when a voltage difference is applied to it as evidenced in para. 0004 of Miyoshi US 20070120448 A1.)
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Chan, in view of Bower et al. US 20170244386 A1 (hereinafter referred to as Bower).
Regarding claim 7, Chan teaches
An electronic device, comprising:
a printed circuit board (“mounting substrate 1552 is a PCB” para. 0084 FIG. 15E); and
semiconductor die (“PMUT device 100a” in “device layer 1402” para. 0069 FIG. 14 and 15E) coupled to the PCB, the semiconductor die comprising:
a semiconductor substrate (“substrate layer 1404” para. 0084) including a surface having a first surface portion (surface of “substrate layer 1404” under “interior support 104”, annotated FIG. 15E below), a second surface portion (surface of “substrate layer 1404” under left “edge support 102”, annotated FIG. 15E), and a middle surface portion (surface of “substrate layer 140a” under left “cavity 130”, annotated FIG. 15E) between the first and second surface portions; and
a radiator layer (“membrane 120” comprising stack of “lower electrode 106”, “piezoelectric layer 110”, “upper electrode 108”, and “mechanical support layer 112”, para. 0041-0042 FIG. 2, 14, and 15E) on the surface, the radiator layer having an acoustic wave control structure (“mechanical support layer 112” made of metal, para. 0042 FIG. 2), the acoustic wave control structure comprising:
a metal member (“mechanical support layer 112”) having a first metal member portion (portion of bottom surface of “mechanical support layer 112” over “interior support 104”, annotated FIG. 1A), a second metal member portion (portion of bottom surface of “mechanical support layer 112” over left “edge support 102”, annotated FIG. 1A) and a middle metal member portion (portion of top surface of “mechanical support layer 112” over right “cavity 130”) between the first and second metal member portions , the first, middle, and second metal member portions above the first, middle, and second surface portions, respectively (“mechanical support layer 112” has first, middle, and second portions above “substrate layer 1404” with “interior support 104”, left “cavity 130”, and left “edge support 102” therebetween, respectively) each of a first distance between the first metal member portion and the first surface portion (distance from “substrate layer 1404” to bottom surface of “mechanical support layer 112” with “interior support 104” therebetween as shown in annotated FIG. 1A) and a second distance between the second metal member portion and the second surface portion (distance from “substrate 140” to bottom surface of “mechanical support layer 112” with left “edge support 102” therebetween as shown in annotated FIG. 1A) less than a third distance between the middle metal member portion and the middle surface portion (distance from “substrate 140” to top surface of “mechanical support layer 112” with “cavity 130” therebetween as shown in annotated FIG. 1A is greater than the first and second distances);
a piezoelectric layer (“piezoelectric layer 110”) between the metal member and the semiconductor substrate;
first (“lower electrode 106”) and second electrodes (“upper electrode 108”) on opposing surfaces of the piezoelectric layer; and
a dielectric layer (“acoustic coupling layer 114” comprising rubber, resin, epoxy, or other materials, para. 0048) on the metal member.
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However, Chan fails to teach the first and second electrodes coupled to the PCB.
Nevertheless, “lower electrode 106” and “upper electrode 108” send and receive charge that causes “piezoelectric layer 110” to distort (para. 0044) and at least “lower electrode 106” is electrically coupled to wirings in “substrate 140” (para. 0040). “Mounting substrate 1552” is a PCB and PCBs are understood to have circuitry that can interconnect elements coupled to the PCB. Bower teaches that “acoustic wave filter device 10 can be a surface-mount device and be disposed in a circuit on another substrate such as in an RF circuit on a printed circuit board” (para. 0169). “Piezoelectric filter element 30” has “two or more electrodes 32” that connect to “active electronic circuit 22” (para. 0133-0134 FIG. 2). By disposing the “acoustic wave filter device 10” into circuitry in a PCB, the “active electronic circuit 22” and the “electrodes 32” are understood to be part of this whole circuit. In this manner, circuitry on the PCB can operate the “acoustic wave filter 10”. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the “PMUT device 100a” can be controlled through external circuitry in mounting “substrate 1552”.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electronic device taught in Chan with the electrode and PCB coupling taught in Bower. By electrically coupling the first and second electrodes to the PCB, circuitry in the PCB can control the radiation layer.
Regarding claim 15, Chan, modified by Bower, teaches the electronic device of claim 7, further comprising a mold compound (“platen layer 116” made of plastic, resin, rubber, Teflon, epoxy, etc, para. 0048) on the semiconductor die, wherein the radiator layer is configured to emit acoustic waves via the mold compound (“the acoustic wave is efficiently propagated to/from the membrane 120 through acoustic coupling layer 114 and platen layer 116”, para. 0048).
Claims 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chan, in view of Bower, as applied to claim 7 above, in view of Boudoin.
Regarding claim 10, Chan, modified by Bower, teaches the semiconductor die of claim 7 wherein the first and second electrodes are configured to excite the piezoelectric layer to produce an acoustic wave (“the electrodes 106 and 108 deliver a high frequency electric charge to the piezoelectric layer 110, causing those portions of the membrane 120 not pinned to the surrounding edge support 102 or interior support 104 to be displaced upward into the acoustic coupling layer 114. This generates a pressure wave that can be used for signal probing of the object.” Para. 0044).
However, Chan, modified by Bower, fails to teach wherein the radiator layer is configured to emit an acoustic wave having a frequency in the range of 100 MHz to 300 MHz, inclusive.
Nevertheless, Boudoin teaches an electroacoustic device comprising a pair of transducers that produce different acoustic waves (para. 0013). The acoustic waves manipulate objects in a fluid coupled to the transducers (para. 0001-0002, 0014). The waves can be in the range of 1-10000 MHz (para. 0016) and can be kept at ranges higher than 100MHz for certain applications. “Objects 155” can be manipulated when the acoustic waves are of a wavelength similar to the size of the “objects 155” (para. 0212 FIG. 2). One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the transducers can be operated at different frequencies depending on the sizes of the objects that are to be studied.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor die taught between Chan and Bower with the frequency ranges taught in Boudoin. The appropriate acoustic wave frequency to be produced depends on the object that is to be probed.
Regarding claim 12, Chan teaches the semiconductor die of claim 10, wherein the radiator layer is configured to expand and contract responsive to the acoustic wave (the examiner understands “piezoelectric layer 110” experiences a mechanical strain in the presence of an electric field and vibrates due to expansion and contraction of the layer, as suggested in para. 0046. Furthermore, lead zirconate titanate is a material usable as “piezoelectric layer 110, para. 0048, and it is known to expand and contract when a voltage difference is applied to it as evidenced in para. 0004 of Miyoshi US 20070120448 A1.)
Allowable Subject Matter
Claims 3, 5, 6, 8-9, 11, and 13-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, Chan and Boudoin teach being in the frequency range of 100MHz to 300MHz but fail to teach or render obvious the acoustic wave being at least 100 MHz wide. Therefore, claim 3 is considered to contain allowable subject matter.
Regarding claim 6, Chan teaches a third electrode facing the surface substrate with another cavity therebetween and is more spaced apart from the first electrode than from the second electrode. However, Chan fails to teach wherein the first, second and third electrodes are on a common surface of the piezoelectric layer. Therefore, claim 6 is considered to contain allowable subject matter.
Regarding claim 8, Chan, modified by Bower, teaches the second distance being greater than the first but fails to teach wherein the first distance is within 10% of the second distance. Therefore, claim 8 is considered to contain allowable subject matter.
Regarding claim 9, Chan, modified by Bower, teaches the metal member extending from side to side of the device but fails to teach or render obvious wherein a length of the metal member is in a range from 2 microns to 90 microns, inclusive. Therefore, claim 9 is considered to contain allowable subject matter.
Regarding claim 11, Chan, modified by Bower, fails to teach or render obvious wherein the acoustic wave is a first acoustic wave, and the metal member is configured to reflect the first acoustic wave and to attenuate second acoustic waves having frequencies outside of the 100 MHz to 300 MHz range. Therefore, claim 11 is considered to contain allowable subject matter.
Regarding claim 13, Chan, modified by Bower, teaches a third electrode on the same surface of the piezoelectric layer as the first. However, Chan, modified by Bower, fails to teach or render obvious a fourth electrode on a same surface of the piezoelectric layer as the first electrode, wherein a first pitch between the first and third electrodes differs from a second pitch between the third and fifth electrodes. Therefore, claim 13 is considered to contain allowable subject matter.
Regarding claim 14, Chan, modified by Bower, teaches the electronic device comprising the PCB. The embodiment in FIG. 15G in Chan suggests that there may be a cavity between the electronic device and the PCB. However, the cavity is for causing impedance mismatches so that the emitted acoustic wave reflects, not for emitting and receiving acoustic waves. Therefore, claim 14 is considered to contain allowable subject matter.
Claims 16-18 are allowed.
The following is an examiner’s statement of reasons for allowance:
The prior art Chen US 20230357000 A1 teaches a radiator layer on a substrate, the radiator comprising first and second electrodes “electrode layers 26-1 and 26-2” and piezoelectric layer “AlScN layer 24-1” (para. 0028). First and second metal members “contact plugs 40-1 and 40-2” are disposed above the “AlScN layer 24-1” (para. 0043). However, by choosing the “AlScN layer 24-1” as the piezoelectric layer that has a side facing the substrate and the other side facing the “contact plugs 40-1 and 40-2”, the piezoelectric layer cannot be said to be between the two electrodes. Similarly, by choosing “AlScN layer 24-2” or “AlScN layer 24-3” as the piezoelectric layer, opposite sides cannot be defined such that one side faces the substrate and the other faces the metal members. Furthermore, it is not taught nor is it obvious if or how the “contact plugs 40-1 and 40-2” have an effect on the produced acoustic wave. Therefore, claim 16 is allowable.
Claims 17-18 are allowed based on their dependency on claim 16.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC MULERO FLORES whose telephone number is (571)270-0070. The examiner can normally be reached Mon-Fri 8am-5pm (typically).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC MANUEL MULERO FLORES/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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