Office Action Predictor
Application No. 17/957,514

APPARATUS, SYSTEM, AND METHOD FOR MITIGATING WARPAGE IN INTEGRATED CIRCUIT PACKAGES

Final Rejection §102
Filed
Sep 30, 2022
Examiner
JANG, BO BIN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ati Technologies Ulc
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
95%
With Interview

Examiner Intelligence

88%
Career Allow Rate
522 granted / 594 resolved
Without
With
+7.5%
Interview Lift
avg trend
2y 4m
Avg Prosecution
26 pending
620
Total Applications
career history

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
47.0%
+7.0% vs TC avg
§102
28.8%
-11.2% vs TC avg
§112
21.2%
-18.8% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 4, 7-10, 14, 15 and 17 are rejected under 35 U.S.C. 102(a)(1) or 102(a)(2) as being anticipated by Chen et al. US 2022/0028800. Regarding claim 1, Chen teaches a stiffener (e.g., 20f, Figs. 8-10; [50]-[54]; [32], [24]) comprising: an inner perimeter (e.g., inner perimeter of 20f comprising a tetragonal shape, Fig. 8) comprising a polygonal shape that surrounds at least one dimension of an integrated circuit (e.g., 30, Fig. 8) coupled to a substrate (e.g., 10, Figs. 8-10), the inner perimeter comprising: sides of the polygonal shape creating a set of boundaries (e.g., sides of the tetragonal shape of the inner perimeter creating a set of boundaries; see the annotated Fig. 8 below); and at least one recess formed into at least one boundary of the set of boundaries (e.g., recess(es) into at least one boundary discussed above; see the annotated Fig. 8 below); and an outer perimeter (e.g., outer perimeter of 20f, Fig. 8) that extends further outward from the integrated circuit than the inner perimeter. PNG media_image1.png 644 814 media_image1.png Greyscale Annotated Fig. 8 of Chen Regarding claim 2, Chen teaches the stiffener of claim 1, further comprising material (e.g., material of 20f; Fig. 8, [24]) that: extends between the inner perimeter and the outer perimeter; and provides structural support to the substrate to impede the substrate or the integrated circuit from warping (e.g., [54]). Regarding claim 4, Chen teaches the stiffener of claim 1, wherein the set of boundaries comprises at least four linear boundaries that collectively form the inner perimeter (e.g., see the annotated Fig. 8 above). Regarding claim 7, Chen teaches the stiffener of claim 1, wherein: the at least one recess comprises a certain number of recesses (e.g., two recesses; see the annotated Fig. 8 above); and the set of boundaries comprises a different number of linear boundaries (e.g., four linear boundaries; see the annotated Fig. 8 above) that is equivalent to double the certain number of recesses. Regarding claim 8, Chen teaches the stiffener of claim 1, wherein the set of boundaries are arranged in a symmetrical configuration (e.g., see the annotated Fig. 8 above). Regarding claim 9, Chen teaches the stiffener of claim 1, wherein the at least one recess comprises: a first recess (e.g., a recess; see the annotated Fig. 8 above) formed into a first linear boundary (e.g., a linear boundary including the recess; see the annotated Fig. 8 above) included in the set of boundaries; and a second recess (e.g., another recess; see the annotated Fig. 8 above) formed into a second linear boundary (e.g., another linear boundary including the another recess; see the annotated Fig. 8 above) that is included in the set of boundaries and positioned opposite the first linear boundary. Regarding claim 10, Chen teaches the stiffener of claim 9, wherein the first recess and the second recess are offset from one another relative to a symmetry axis that bisects the inner perimeter (e.g., see the annotated Fig. 8 above). Regarding claim 14, Chen teaches an apparatus (e.g., 1e, Figs. 8-10; [50]-[54]; [32], [24]) comprising: a substrate (e.g., 10, Figs. 8-10); an integrated circuit (e.g., 30, Fig. 8) coupled to the substrate; and a stiffener (e.g., 20f, Figs. 8-10) that surrounds at least one dimension of the integrated circuit, the stiffener comprising: an inner perimeter (e.g., inner perimeter of 20f comprising a tetragonal shape, Fig. 8) comprising a polygonal shape that includes: sides of the polygonal shape creating a set of boundaries (e.g., sides of the tetragonal shape of the inner perimeter creating a set of boundaries; see the annotated Fig. 8 above); and at least one recess formed into at least one boundary of the set of boundaries (e.g., recess(es) into at least one boundary discussed above; see the annotated Fig. 8 above); and an outer perimeter (e.g., outer perimeter of 20f, Fig. 8) that extends further outward from the integrated circuit than the inner perimeter. Regarding claim 15, Chen teaches the apparatus of claim 14, wherein the stiffener further comprises material (e.g., material of 20f; Fig. 8, [24]) that: extends between the inner perimeter and the outer perimeter; and provides structural support to the substrate to impede the substrate or the integrated circuit from warping (e.g., [54]). Regarding claim 17, Chen teaches the apparatus of claim 14, wherein the set of boundaries comprises at least four linear boundaries that collectively form the inner perimeter (e.g., see the annotated Fig. 8 above). Allowable Subject Matter Claims 3, 5, 6 and 11-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 16, 18 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant's arguments filed on September 10, 2025 have been fully considered but are moot in view of the new ground(s) of rejection as stated above. Applicant appears to argue that Chen does not disclose the recesses formed into the boundary (see page 7 of the Applicant's response of September 10, 2025). However, as stated above in the main body of the rejection and reiterated as follows, Chen teaches at least one recess formed into at least one boundary (e.g., recess(es) into at least one boundary (created by the sides of the tetragonal shape of the inner perimeter); see the annotated Fig. 8 above). Conclusion Applicant’s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a) . Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a) . A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. If applicant should desire to file an amendment, entry of a proposed amendment after final rejection cannot be made as a matter of right unless it merely cancels claims or complies with a formal requirement made earlier. Amendments touching the merits of the application which otherwise might not be proper may be admitted upon a showing a good and sufficient reasons why they are necessary and why they were not presented earlier. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Bo Bin Jang whose telephone number is (571) 270-0271. The examiner can normally be reached on M-F from 9:00 AM to 6:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Kimberly Rizkallah can be reached at (571) 272-2402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://portal.uspto.gov/external/portal. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) OR 571-272-1000. /BO B JANG/Primary Examiner, Art Unit 2818 November 29, 2025
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Prosecution Timeline

Sep 30, 2022
Application Filed
May 22, 2025
Non-Final Rejection — §102
Jun 17, 2025
Applicant Interview (Telephonic)
Jun 17, 2025
Examiner Interview Summary
Sep 10, 2025
Response Filed
Nov 29, 2025
Final Rejection — §102
Mar 31, 2026
Response after Non-Final Action

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
95%
With Interview (+7.5%)
2y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 594 resolved cases by this examiner