DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Status of Application
In response to Office action dated 12/31/2025 (“12-31-25 OA”), Applicant filed remarks and currently amending drawings, specification, claims 1, 3-4, 7-8, 10-12 and 16-18 while canceling claims 14-15 and 19-20 and adding new claims 21-24 in reply dated 03/31/2026 (“03-31-26 Reply”).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/31/2026 was filed after the mailing date of the 12-31-25 OA. The submission is in compliance with the provisions of 37 CFR 1.97 because the timing statement under 37 CFR 1.97(e)(1) is provided. Accordingly, the information disclosure statement is considered.
Response to Arguments
Applicant’s amendments to drawings and specification appear to overcome the objections to drawings and objections to specification as set forth under line item numbers 1-4 of the 12-31-25 OA.
Applicant’s amendments to claims 7 and 10 and cancelation of claims 19-20 overcome and/or render moot the 35 USC 112(b) indefiniteness rejections as set forth under line item number 5 of the 12-31-25 OA.
Applicant’s amendments to independent claims 1, 8 and 16 overcome the prior art rejections based at least in part on Yashar as set forth under line item numbers 6-8 of the 12-31-25 OA.
The amendments to independent claims 1, 8 and 16 changed the scope of these claims and dependent claims thereof, thereby necessitating a new grounds of rejection infra.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2003/0085470 A1 to Hasunuma.
Regarding independent claim 1, Hasunuma teaches of an integrated circuit (IC) interconnect structure (see title: semiconductor device with interconnects), comprising:
a dielectric material 2 (“insulating film”; Figure 1E; paragraph 0035); and
a line or via metallization 13 (“interconnection portion”; Figure 1E; paragraph 0036) adjacent to the dielectric material 2, wherein the line or via metallization comprises:
a fill material comprising a first metal 6 (“conductive layer”; Figure 1E; paragraph 0044); and
a barrier material 5 (“barrier film”; Figure 1E; paragraph 0043) between the fill material 6 and the dielectric material 2, wherein the barrier material is more than 95% Nb (see paragraph 0050: there is at least one embodiment of 100% Nb; see Figure 2—Nb between 96-100% is graphed with lines).
Regarding claim 2, Hasunuma teaches a first metal of Cu in paragraph 0047.
Regarding independent claim 16, Hasunuma teaches a method of fabricating an integrated circuit (IC) interconnect structure (see title: semiconductor device with interconnects), the method comprising:
forming at least one of a via opening or a trench 3 (“interconnection groove”; Figure 1B; paragraph 0036) in a dielectric material 2 (“insulating film”; Figure 1B; paragraph 0036);
depositing a barrier material 5 (“barrier film”; Figure 1C; paragraph 0043) on a surface of the dielectric material 2, wherein depositing the barrier material 5 comprises sputtering (see paragraph 0043 there is sputtering) a target (see paragraph 0043 there is a target) of more than 95% Nb (see paragraph 0043 along with Figure 2 and paragraph 0050; as such there necessarily appears to be a target of more than 95% Nb in order to form the barrier layer with 100% Nb); and
depositing a fill material 6 (“conductive layer”; Figure 1D; paragraph 0044) over the barrier material 5 within the via opening or the trench 3.
Regarding claim 17, Hasunuma teaches that the sputtering target has less than 4% of any other metal (see paragraph 0043 along with Figure 2 and paragraph 0050; as such there necessarily appears to be a target of more than 95% Nb in order to form the barrier layer with 100% Nb or any of the 97%-100% as graphed by the lines on Figure 2. Therefore it would necessarily appear that Ta would be less than 4% in at least one embodiment of Figure 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 7, 8 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over US 2003/0085470 A1 to Hasunuma in view of US 2018/0301373 A1 to Yashar et al. (“Yashar”).
Hasunuma teaches all limitations of claim 1 from which claim 7 depends.
Regarding claim 7, Hasunuma teaches of a single stacked interconnect above a semiconductor substrate.
Hasunuma does not teach of a multi-stacked interconnect structure.
Yashar teaches in Figure 3 of a first line metallization (i.e., wide part of 124 with adjacent 120 inside middle layer of 102) under the dielectric material 102 (“stack of dielectric layers”; paragraph 0022);
a first via metallization (i.e., narrow part of 124 with adjacent 120 inside top layer of 102) through the dielectric material 102, and coupled to the first line metallization (i.e., wide part of 124 with adjacent 120 inside middle layer of 102); and
a second line metallization (i.e., wide part of 124 with adjacent 120 inside top layer of 102) over (i.e., top), and coupled (see Figure 3) to, the first line metallization (i.e., wide part of 124 with adjacent 120 inside middle layer of 102) through (see Figure 3) the first via metallization (i.e., narrow part of 124 with adjacent 120 inside top layer of 102), wherein at least the first via metallization (i.e., narrow part of 124 with adjacent 120 inside top layer of 102) comprises:
the fill material 124 and the barrier material 120, the barrier material 120 at a bottom 110 (“bottom”; Figure 3; paragraph 0026) of the via metallization 120 in direct contact (see Figure 3) with the first line metallization (i.e., wide part of 124 with adjacent 120 inside middle layer of 102).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Hasunuma’s high percentage Nb barrier layer of 100% with the high percentage Nb barrier layer of Yashar would have been beneficial in order to have the lowest resistivity barrier layer as per Figure 2 of Hasunuma.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Yashar’s multi-interconnect stacked structure with Hasunuma’s high percentage Nb barrier layer of 100% would have been beneficial in order to have a lower resistivity barrier layer providing an electrical connection to the below first line metallization.
Regarding independent claim 8, Yashar teaches of an integrated circuit (IC) (see paragraph 0012; “integrated circuit structures”) device (see paragraph 0001: “semiconductor devices”), comprising:
A plurality of transistors (paragraphs 0026 and 0038 along with Figures 3 and 6, block 605 there is a transistor: “and a transistor (not shown) included in the substrate.” The substrate is 125. Figure 4 of Yashar discloses embodiments that are inside a smartphone device therefore there appears to be a plurality of transistors) comprising one or more semiconductor materials (paragraph 0025 states that the semiconductor substrate is made of semiconductor material); and
a plurality of interconnect levels 102 (“dielectric layers”; paragraph 0023) coupled to the transistor (i.e., substrate 125), wherein:
a first of the interconnect levels 102 further comprises a first line or via metallization 124/120 (“copper” / “barrier layer”; Figure 3; paragraph 0026) comprising a first barrier material 120 (“barrier layer”; Figure 3; paragraph 0028) and a fill material 124, the first barrier material 120 comprising Ta (see paragraph 0028; there may be Ta); and
a second of the interconnect levels (i.e., middle 102 or top 102 of Figure 3) further comprises a second line or via metallization 124/120 comprising a second barrier material 120 and a fill material 120, the second barrier material comprising Nb (see paragraph 0028; there may be Nb).
The problem encountered by Yashar as suggested by Hasunuma is optimum processing temperature and resistivity. Hasunuma teaches in Figure 2 and paragraphs 0050-0051 of the lowest resistivity being when Nb barrier layer is 96%-100% and the best processing temperatures for low resistivity.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Hasunuma’s high percentage Nb barrier layer of 100% with the high percentage Nb barrier layer of Yashar would have been beneficial in order to have the lowest resistivity barrier layer as per Figure 2 of Hasunuma.
Regarding claim 13, Yashar teaches in Figure 3 wherein the first 102 (i.e., lower 102) of the interconnect levels 102 is a lower level 102 of interconnect metallization 102 that is over a front side (i.e., top side) of the transistors (see paragraph 0026) and wherein the second (i.e., middle 102) of the interconnect levels 102 is an upper level (i.e., middle 102) of the interconnect metallization 102 that is over (i.e., atop) the front side (i.e., top side) of the transistors (see paragraph 0026).
Allowable Subject Matter
Claims (3-6, 21-22), (9, 10, 11, 12, 24) and (18, 23) are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Dependent claim 3 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 3, wherein the barrier material has less than 4% of any impurity atom.
Regarding claim 3, the prior art references of Hasunuma and Yashar have element Ta in the Ta-Nb barrier layer/liner that is not considered an impurity element.
Dependent claims 4-6 contain allowable subject matter, because they depend on the allowable subject matter of claim 3.
Dependent claim 21 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 21, wherein the barrier material comprises at least one of N, B or C.
Dependent claim 22 contain allowable subject matter, because it depends on the allowable subject matter of claim 21.
Dependent claim 9 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 9, wherein the first barrier material has a first thickness, less than a second thickness of the second barrier material.
Dependent claim 10 contain allowable subject matter, because it depends on the allowable subject matter of claim 9.
Dependent claim 11 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 11, wherein the second barrier material has less than 4% of any impurity atom.
Regarding claim 11, the prior art references of Hasunuma and Yashar have element Ta in the Ta-Nb barrier layer/liner that is not considered an impurity element.
Dependent claim 12 contains allowable subject matter, because it depends on the allowable subject matter of claim 11.
Dependent claim 24 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 24, wherein the second barrier material comprises at least one of N, B or C.
Dependent claim 18 contains allowable subject matter, because the closest prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other elements of claim 18, wherein the target comprises one or more non-metal constituents.
Dependent claim 23 contain allowable subject matter, because it depends on the allowable subject matter of claim 18.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P DULKA whose telephone number is (571)270-7398. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ELISEO RAMOS-FELICIANO can be reached at (571)272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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13 June 2026
/John P. Dulka/Primary Examiner, Art Unit 2817
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