Prosecution Insights
Last updated: October 01, 2026

Examiner: DULKA, JOHN P

Tech Center 2800 • Art Units: 2800 2817 2895

This examiner grants 84% of resolved cases

Analysis

John P. Dulka is an examiner in Tech Center 2800, specifically Art Unit 2800. He has a high volume of 859 resolved cases. This extensive record provides a strong statistical basis for analyzing his examination trends in the fields of semiconductors and electronic components. His experience level suggests a consistent and predictable approach to the patent application process.

The examiner maintains a high allowance rate of 83.7 percent. This indicates a very favorable environment for applicants. Furthermore, he offers an interview lift of 12.4 percent. This lift shows that direct communication with Dulka is a productive strategy, as it increases the probability of allowance by a significant margin. Practitioners should consider the 12.4 percent lift as a reason to favor interviews when facing complex rejections.

The median days to allowance for his cases is 926. This is a relatively fast timeline for reaching a grant. The combination of an 83.7 percent allowance rate and a 926-day median suggests that Dulka is an efficient examiner who is likely to grant patents within a reasonable timeframe. The 12.4 percent interview lift can be utilized to further streamline the process and ensure that the high probability of success is realized as quickly as possible.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

83.7%
Allow Rate
+15.7% vs TC avg
873
Total Applications
+12.4%
Interview Lift
926
Avg Prosecution Days
Based on 859 resolved cases, 2023–2026

Rejection Statute Breakdown

0.7%
§101 Eligibility
29.3%
§102 Novelty
40.4%
§103 Obviousness
22.8%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18308376 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18911277 CHIP AND PREPARATION METHOD THEREOF, AND ELECTRONIC DEVICE Non-Final OA HUAWEI TECHNOLOGIES CO., LTD.
18910885 METHOD FOR MANUFACTURING A VERTICAL FIELD EFFECT TRANSISTOR STRUCTURE AND CORRESPONDING VERTICAL FIELD EFFECT TRANSISTOR STRUCTURE Non-Final OA Robert Bosch GmbH
18716559 METHOD FOR PRODUCING A POWER FINFET, AND POWER FINFET Non-Final OA Robert Bosch GmbH
18727145 ALUMINUM NITRIDE-BASED HIGH POWER DEVICES AND METHODS OF MAKING THE SAME Non-Final OA Georgia Tech Research Corporation
17957721 INTEGRATED CIRCUIT INTERCONNECT STRUCTURES WITH NIOBIUM BARRIER MATERIALS Final Rejection Intel Corporation
18545188 SEMICONDUCTOR DEVICE WITH STACKED DEVICE TYPES Final Rejection INTERNATIONAL BUSINESS MACHINES CORPORATION
18602163 THERMAL CONDUCTIVE BONDING STRUCTURE Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18745760 Etch Profile Control Of Polysilicon Structures Of Semiconductor Devices Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18785009 METAL-INSULATOR-METAL CAPACITORS WITH THICK INTERMEDIATE ELECTRODE LAYERS AND METHODS OF FORMING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Company Limited
18715527 SOLAR CELL FABRICATION Non-Final OA NATIONAL UNIVERSITY OF SINGAPORE
18772644 POWER CONVERSION CIRCUIT, POWER MODULE, CONVERTER, AND INVERTER Non-Final OA ROHM CO., LTD.
18602039 MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Non-Final OA NANYA TECHNOLOGY CORPORATION
18790300 HEATER, TEMPERATURE CONTROL SYSTEM, AND PROCESSING APPARATUS Non-Final OA Kokusai Electric Corporation
18499223 RESISTIVE MEMORY STRUCTURE Final Rejection United Microelectronics Corp.

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