DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the amendment filed on 7/02/26. Claims 6-16 are pending. Claim 16 is newly added.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 6-15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The newly added limitation, “at a same first side of the semiconductor die, the first side of” contains subject matter which was not described in the specification in such a way as to reasonable convey. Specifically, in paragraphs [0026-0027] of applicant’s disclosure, the semiconductor transistor die comprises a first and second electrode (both not to be seen in fig. 2) and the solder layer (not to be seen in fig. 2), respectively. However, the newly amended claim now states that the first and second electrodes are at a same first side of the semiconductor die where this is not disclosed. It appears that the applicant may be referring to the electrodes being connected to the pads however the “first side of the semiconductor die” can be interchanged.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6, 7, 14 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US PGPub 2008/0290486, hereinafter referred to as “Chen”) in view of Fukui et al. (US PGPub 2015/0239093, hereinafter referred to as “Fukui”).
Chen discloses the semiconductor device substantially as claimed. See figures 1-3 and corresponding text, where Chen teaches, in claim 6, a flip chip semiconductor package, comprising
- a leadframe (10a) comprising a rectangular area segmented into individual pads (14, 14a, 14b), the individual pads comprising a first pad (14), a second pad (14a), and a third pad (14b), wherein the first pad (14) is larger than the second pad and larger than the third pad (14b), and the second pad is located in a first corner area (FC) of the rectangular area and the third pad (14b) is located in a second corner area (SC) of the rectangular area, the second corner area (SC) being located diagonally opposite to the first corner area (FC); and
- a semiconductor die (12) comprising a first electrode and a second electrode at a same first side of the semiconductor die, the first side of the semiconductor die (12) being attached to the leadframe (10a) with the first electrode being soldered to connected with the first pad (14) and the third pad (14b), and the second electrode being connected with the second pad (14a) (figures 2 and 3; [0041-0052]). (Please, see modified illustration below)
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Chen fails to explicitly teach, the first electrode being soldered to connected with the first pad and the third pad, and the second electrode being connected with the second pad.
Fukui teaches a similar method that includes soldering the semiconductor die to the die pad ([0046-0048]). In addition, Fukui provides the advantages of improving heat transfer ([0062]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to incorporate the first electrode being soldered to connected with the first pad and the third pad, and the second electrode being connected with the second pad, in the method of Chen, according to the teachings of Fukui, with the motivation of improving heat transfer within the semiconductor device.
Chen in view of Fukui teaches, in claim 7, wherein the leadframe further comprises a gap (40a) disposed between the first pad (14) and the second pad (14a), and a recess (40b) (examiner views the slit at this location as a recess) located between the first pad (14) and the third pad (14b), the recess being formed into a common metallic area of the first pad (14) and the third pad (14b). (figures 2 and 3; [0041-0052])
Chen in view of Fukui teaches, in claim 14, wherein the semiconductor die is mounted on the leadframe with the first electrode directly facing the first pad and the third pad and with the second electrode directly facing the second pad (figures 2 and 3; [0041-0052]).
Chen in view of Fukui teaches, in claim 15, wherein the semiconductor die is a semiconductor transistor die, wherein the first electrode is a source electrode of the semiconductor die, and the second electrode is a gate electrode of the transistor die (figures 2 and 3; [0041-0052]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US PGPub 2008/0290486, hereinafter referred to as “Chen”) in view of Fukui et al. (US PGPub 2015/0239093, hereinafter referred to as “Fukui”) as applied to claim 6 above, and further in view of Takagi et al. (US PGPub 2015/0214138, hereinafter referred to as “Takagi”).
Chen, in view of Fukui discloses the semiconductor device substantially as claimed. See the rejection above.
However, Chen in view of Fukui fails to explicitly show, in claim 8, further comprising
a solder layer disposed between the first electrode and the first pad and the third pad.
Takagi teaches, in claim 8, a similar semiconductor device that includes bonding the semiconductor die to a leadframe and to first and second electrodes, respectively with solder (figure 1; [0034-0038]). In addition, Takagi provides the advantages of reducing the resistance and having high heat dissipation efficiency ([0004], [0051]).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate, further comprising
a solder layer disposed between the first electrode and the first pad and the third pad, in the device of Chen in view of Fukui, according to the teachings of Takagi with the motivation of having the benefit of reducing resistance and having high heat dissipation efficiency.
Chen in view of Fukui in view of Takagi shows, in claim 10, wherein the gap and the recess are arranged diagonally opposite to each other (figures 2 and 3; [0041-0052], Chen).
Allowable Subject Matter
Claim 16 is allowed over the prior art of record.
The following is an examiner’s statement of reasons for allowance: the closest prior art of record and to the examiner’s knowledge does not suggest or render obvious a flip chip semiconductor package particularly characterized by, wherein a part of the solder layer is filled into the recess while not completely filling the recess, as detailed in claim 16.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant’s arguments with respect to claim(s) 6-8, 10 and 14 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant’s amendment has necessitated new grounds of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
/STANETTA D ISAAC/Examiner, Art Unit 2898 September 19, 2026
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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