Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Singh et al. (WO 2011/090440).
Regarding claim 1, Singh discloses a semiconductor structure, comprising:
a capacitor structure at least partially disposed in a trench (consider cavity of trench 404a/404b formed within layer 442) of an interlayer dielectric (400/442) [Fig. 4F and paragraph 0042], the capacitor structure comprising first and second electrode layers (444/448) separated by a dielectric layer (446), a top surface (464) of the first electrode layer (444) being below a top surface of the second electrode layer (448) and the dielectric layer (446) [Fig. 4F];
a spacer disposed on the first electrode layer [Fig. 4G and paragraph 0121]; and
a contact (482b) disposed in the trench and connected to the second electrode layer (448) and the spacer [Fig. 4H and paragraph 0122].
Regarding claim 2, Singh discloses wherein the contact (482b) is isolated from the first electrode layer (444) by the spacer [Fig. 4H and paragraphs 0121-0122].
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Regarding claim 10, Singh discloses a semiconductor structure, comprising:
a capacitor structure at least partially disposed in a trench (consider cavity of trench 404a/404b formed within layer 442) of an interlayer dielectric layer(400/442) [Fig. 4F and paragraph 0042], the capacitor structure comprising first and second electrode layers (444/448) separated by a dielectric layer (446), a top surface (470) of the second electrode layer (448) being below a top surface of the first electrode layer (444) and the dielectric layer (446) [Fig. 4F];
a spacer disposed on the second electrode layer [Fig. 4G and paragraph 0121]; and
a contact (482a) disposed in the trench and connected to the first electrode layer (444)and the spacer [Fig. 4H and paragraph 0122].
Regarding claim 11, Singh discloses wherein the contact (482a) is isolated from the second electrode layer (448)by the spacer [Fig. 4H and paragraphs 0121-0122].
Regarding claims 3 and 12, Singh discloses at least two first electrode layers (444) and at least two second electrode layers (448); wherein adjacent ones of the first and second electrode layers (444/448) are separated by the dielectric layer (446) [Fig. 4H].
Regarding claim 4, Singh discloses wherein each of the at least two first electrode layers (444) comprise the spacer disposed on a top surface of each respective first electrode layer [Figs. 4F-4G and paragraph 0121].
Regarding claim 5, Singh discloses wherein the spacer and the at least two second electrode layers (448) are coterminous with the dielectric layer (446) [Fig. 4H].
Regarding claim 13, Singh discloses wherein each of the at least two second electrode layers (448) comprise the spacer disposed on a top surface of each respective second electrode layer [Figs. 4F-4G and paragraph 0121].
Regarding claim 14, Singh discloses wherein the spacer and the at least two first electrode layers (44) are coterminous with the dielectric layer (446) [Fig. 4H].
Regarding claims 6 and 15, Singh discloses wherein the first electrode layer (444), the second electrode layer (448) and the dielectric layer (446) comprise u-shaped layers [Fig. 4H].
Regarding claims 7 and 16, Singh discloses a sidewall spacer (442) along sidewalls of the trench (consider cavity of trench 404a/404b formed within layer 442) [Fig. 4F].
Regarding claims 8 and 17, Singh discloses wherein the first electrode layer (444) comprises a first material and the second electrode layer (448) comprises a second material different from the first material [Fig. 4H and paragraphs 0042 and 0060].
Regarding claims 9 and 18, Singh discloses wherein the spacer comprises a dielectric material [Figs. 4F-4G and paragraphs 0112 and 0121].
Regarding claim 19, Singh discloses a semiconductor structure, comprising:
a capacitor structure at least partially disposed in a trench (consider cavity of trench 404a/404b formed within layer 442) of an interlayer dielectric layer (400/442) [Fig. 4F and paragraph 0042], the capacitor structure comprising
a plurality of first and second electrode layers (444/448) arranged in alternating relation with each other and having a dielectric layer (446) disposed between adjacent first and second electrode layers [Fig. 4H],
wherein the plurality of first electrode layers (444), the plurality of second electrode layers (448) and the dielectric layer (446) are in a u-shaped configuration [Fig. 4H],
wherein one of the plurality of first electrode layers (444) and the plurality of second electrode layers (448) have a top surface (464/470) below a top surface of the other one of the plurality of first electrode layers (444) and the plurality of second electrode layers (448) [Fig. 4F];
a spacer on the top surface of the respective one of the plurality of first electrode layers (444) and the plurality of second electrode layers (448) having the top surface (464/470) below the top surface of the other one of the plurality of first electrode layers and the plurality of second electrode layers [Figs. 4F-4G, and paragraph 0121] ; and
a contact (482a/482b) disposed in the trench and connected to the other one of the plurality of first electrode layers and the plurality of second electrode layers and the spacer [Fig. 4H and paragraph 0122].
Regarding claim 20, Singh discloses wherein the capacitor structure forms at least part of a metal-insulator-metal capacitor [Fig. 4H and paragraph 0020].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tigelaar et al. (US 4685197) teaches a trench capacitor comprising spacers (39/42) in Figure 3f; and Lindert (US 2012/0161280) teaches the same in Figures 2-3B.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE R DIAZ whose telephone number is (571)272-1727. The examiner can normally be reached Monday-Friday.
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/Jose R Diaz/Primary Examiner, Art Unit 2815