Office Action Predictor
Last updated: April 16, 2026
Application No. 17/968,812

MICRO-ELECTRO-MECHANICAL SYSTEM DEVICE AND PIEZOELECTRIC COMPOSITE STACK THEREOF

Non-Final OA §103
Filed
Oct 19, 2022
Examiner
SWANSON, ALAINA MARIE
Art Unit
2872
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vanguard International Semiconductor Corporation
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
3y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
30 granted / 36 resolved
+15.3% vs TC avg
Strong +18% interview lift
Without
With
+18.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
24 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
67.2%
+27.2% vs TC avg
§102
19.5%
-20.5% vs TC avg
§112
8.7%
-31.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 36 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The instant application having Application No. 17/968,812 filed on 10/19/2022 is presented for examination by the examiner. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/7/2025 has been entered. Response to Amendment This Office Action is in response to the communication filed 12/7/2025. The amendments to claims 1 and 11, filed 12/7/2025, are acknowledged and accepted. Claims 1-20 remain pending in the application. Response to Arguments Applicant’s arguments with respect to claims 1, 11, and 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-6, 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Goto (CN 112262483 A)(see attached machine translation), in view of Choi (KR 20120079963 A)(see machine translation). Regarding claim 1, Goto discloses a micro-electro-mechanical system (MEMS) device, in at least Figures 1A and 1B, comprising: a substrate (140 “substrate”, 130, 132 “conductive resin”, Figure 1A) having a cavity (see examiner’s first markup of Figure 1A which shows a cavity); and a MEMS structure (see examiner’s first markup of Figure 1A) disposed over the cavity (see examiner’s first markup of Figure 1A) and attached to the substrate (140 “substrate”, 130, 132 “conductive resin”, see examiner’s first markup of Figure 1A which shows the MEMS structure attached to the substrate), wherein the MEMS structure comprises: at least one first piezoelectric layer (102 “piezoelectric layer”, see examiner’s second markup of Figure 1A, Figure 1B); two second piezoelectric layers (102 “piezoelectric layer”, see examiner’s second markup of Figure 1A, Figure 1B) respectively disposed under and above the first piezoelectric layer (see examiner’s second markup of Figure 1A); and a first electrode layer (104 “inner electrode layer”, Figure 1B) and a second electrode layer (106 “inner electrode layer”, Figure 1B) sandwiching the two second piezoelectric layers (102 “piezoelectric layer”, see examiner’s second markup of Figure 1A, Figure 1B), wherein the two second piezoelectric layers (102 “piezoelectric layer”, see examiner’s second markup of Figure 1A, Figure 1B) comprises a topmost piezoelectric layer (see examiner’s second markup of Figure 1A) in direct contact with the second electrode layer (106 “inner electrode layer”, Figure 1B) and a bottommost piezoelectric layer (see examiner’s second markup of Figure 1A) in direct contact with the first electrode layer (104 “inner electrode layer”, Figure 1B). Below is an examiner’s first markup of Figure 1A of Goto pointing out a cavity and a MEMS structure. PNG media_image1.png 754 1334 media_image1.png Greyscale Below is an examiner’s second markup of Figure 1A of Goto pointing out a first piezoelectric layer and two second piezoelectric layers. PNG media_image2.png 754 1539 media_image2.png Greyscale However, Goto does not disclose at least one first piezoelectric layer having a first piezoelectric coefficient, each of the second piezoelectric layers having a second piezoelectric coefficient higher than the first piezoelectric coefficient, and a thickness of the at least one first piezoelectric layer is greater than a total thickness of the two second piezoelectric layers. Choi teaches at least one first piezoelectric layer (114 “second piezoelectric layer”, see examiner’s first markup of Figure 2) having a first piezoelectric coefficient (page 3, paragraph 3 of translation states “The first and second piezoelectric layers 112, 114 may be formed using a piezoelectric material having a perovskite structure represented by a general formula .sub.ABO 3, PZT, (Na 0 .5 K 0 .5) NbO .sub.3 (hereinafter, NKN), (hereinafter referred to .sub.LKN) {Li x (K 0 .5 Na 0 .5) 1-x} NbO 3 may use a series of piezoelectric material … the piezoelectric material has both piezoelectric voltage coefficients and piezoelectric characteristics of piezoelectric charge coefficients”), and each of the second piezoelectric layers (112 “first piezoelectric layer”, see examiner’s first markup of Figure 2) having a second piezoelectric coefficient higher than the first piezoelectric coefficient (first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient higher than that of the second piezoelectric layer 114”). Below is an examiner’s first markup of Figure 2 of Choi pointing out a first piezoelectric layer and and two second piezoelectric layers. PNG media_image3.png 458 929 media_image3.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the micro-electro-mechanical system (MEMS) device of Goto modified by each of the second piezoelectric layers having a second piezoelectric coefficient higher than the first piezoelectric coefficient, as taught by Choi, in order to improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize at least one first piezoelectric layer and two second piezoelectric layers such that a thickness of the at least one first piezoelectric layer is greater than a total thickness of the two second piezoelectric layers, since such a modification would involve only a mere change in size of a component. Scaling up or down of an element which merely requires a change in size is generally considered as being within the ordinary skill in the art. In re Rinehart, 189 USPQ 143 (CCAP 1976). Regarding claim 2, the combination of Goto and Choi disclose all the limitations of claim 1 and Goto further discloses wherein the MEMS structure (see examiner’s first markup of Figure 1A) is symmetric with respect to a horizontal plane in the middle of the at least one first piezoelectric layer (102 “piezoelectric layer”, see examiner’s second markup of Figure 1A which shows that the MEMS structure is symmetric with respect to a horizontal plane in the middle of the first piezoelectric layer). Regarding claim 4, the combination of Goto and Choi disclose all the limitations of claim 1 and Goto further discloses wherein the at least one first piezoelectric layer (102 “piezoelectric layer”) comprises two first piezoelectric layers (102 “piezoelectric layer”, see examiner’s third markup of Figure 1A) disposed between the two second piezoelectric layers (102 “piezoelectric layer”, see examiner’s third markup of Figure 1A), and the MEMS structure (see examiner’s first markup of Figure 1A) further comprises a third electrode layer (104 “inner electrode layer”) disposed between the two first piezoelectric layers (102 “piezoelectric layer”, see examiner’s third markup of Figure 1A). Below is an examiner’s third markup of Figure 1A of Goto pointing out two first piezoelectric layers, two second piezoelectric layers, a first electrode layer, a second electrode layer, and a third electrode layer. PNG media_image4.png 617 1230 media_image4.png Greyscale However, Goto does not disclose two first piezoelectric layers having an average piezoelectric coefficient lower than the second piezoelectric coefficient. Choi teaches two first piezoelectric layers (114 “second piezoelectric layer”, see examiner’s third markup of Figure 2) having an average piezoelectric coefficient lower than the second piezoelectric coefficient (112 “first piezoelectric layer”, see examiner’s third markup of Figure 2, first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient higher than that of the second piezoelectric layer 114” so therefore the average piezoelectric coefficient of the two 114 “second piezoelectric layers” will be lower than 112 “first piezoelectric layer” because the coefficient of 112 “first piezoelectric layer” is higher than 114 “second piezoelectric layer”). Below is an examiner’s third markup of Figure 2 of Choi pointing out two first piezoelectric layers and two second piezoelectric layers. PNG media_image5.png 458 929 media_image5.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the micro-electro-mechanical system (MEMS) device of Goto modified by two first piezoelectric layers having an average piezoelectric coefficient lower than the second piezoelectric coefficient, as taught by Choi, in order improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). Regarding claim 5, the combination of Goto and Choi disclose all the limitations of claim 4 and Goto further discloses wherein the MEMS structure is symmetric with respect to the third electrode layer (page 4, paragraph 10 of translation states "The stacking number can be properly set, for example, the piezoelectric layer 102 becomes 10 layers of the stacked body" so therefore the MEMS structure can have an even number of piezoelectric layers, allowing the MEMS structure to be symmetric with respect to the third electrode layer). Regarding claim 6, the combination of Goto and Choi disclose all the limitations of claim 1 and Goto further discloses wherein the MEMS structure further comprises: two third piezoelectric layers (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A) respectively disposed under and above the at least one first piezoelectric layer (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A), and disposed between the two second piezoelectric layers (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A); two fourth piezoelectric layers (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A) sandwiching the at least one first piezoelectric layer (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A); and a third electrode layer (104 “inner electrode layer”) and a fourth electrode layer (106 “inner electrode layer”) sandwiching the two fourth piezoelectric layers (102 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A). Below is an examiner’s fourth markup of Figure 1A of Goto pointing out a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer, a first piezoelectric layer, a second piezoelectric layer, a third piezoelectric layer, and a fourth piezoelectric layer. PNG media_image6.png 754 1492 media_image6.png Greyscale However, Goto does not disclose an average piezoelectric coefficient of the two third piezoelectric layers is lower than the second piezoelectric coefficient and two fourth piezoelectric layers having an average piezoelectric coefficient higher than the first piezoelectric coefficient. Choi teaches an average piezoelectric coefficient of the two third piezoelectric layers (114 “second piezoelectric layer”, see examiner’s second markup of Figure 2) is lower than the second piezoelectric coefficient (112 “first piezoelectric layer”, see examiner’s second markup of Figure 2, first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient higher than that of the second piezoelectric layer 114” so therefore the average piezoelectric coefficient of two 114 “second piezoelectric layers” will be lower than two 112 “first piezoelectric layers” because the coefficient of 112 “first piezoelectric layer” is higher than 114 “second piezoelectric layer”) and two fourth piezoelectric layers (112 “first piezoelectric layer”, see examiner’s second markup of Figure 2) having an average piezoelectric coefficient higher than the first piezoelectric coefficient (114 “piezoelectric layer”, see examiner’s second markup of Figure 2, first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient higher than that of the second piezoelectric layer 114” so therefore the average piezoelectric coefficient of two 112 “first piezoelectric layers” will be higher than a 114 “second piezoelectric layer” because the coefficient of 112 “first piezoelectric layer” is higher than 114 “second piezoelectric layer”). Below is an examiner’s second markup of Figure 2 of Choi pointing out a first piezoelectric layer, two second piezoelectric layers, two third piezoelectric layers, and two fourth piezoelectric layers. PNG media_image7.png 458 917 media_image7.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the micro-electro-mechanical system (MEMS) device of Goto modified by an average piezoelectric coefficient of the two third piezoelectric layers is lower than the second piezoelectric coefficient and two fourth piezoelectric layers having an average piezoelectric coefficient higher than the first piezoelectric coefficient, as taught by Choi, in order to improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). Regarding claim 11, Goto discloses a piezoelectric composite stack of a micro-electro-mechanical system (MEMS) device, in at least Figures 1A and 1B, comprising: at least one piezoelectric film (102 “piezoelectric layer”, Figures 1A, 1B), wherein the number of the at least one piezoelectric film is an integer (n) (page 4, paragraph 10 of translation states “The stacking number can be properly set, for example, the piezoelectric layer 102 becomes 10 layers of the stacked body”, Figures 1A, 1B); and a plurality of electrode layers (104, 106 “inner electrode layer”, Figures 1A, 1B), wherein the number of the plurality of electrode layers is n+1 (Figures 1A and 1B show that the inner electrode layers 104, 106 alternate with the piezoelectric layers 102, beginning and ending with a layer of an inner electrode layer 104, 106, so therefore there should be one more inner electrode layer 104, 106 than piezoelectric layers 102 in the stack), and two of the plurality of electrode layers (104, 106 “inner electrode layer”) sandwich one of the at least one piezoelectric film (Figures 1A and 1B show that 104, 106 “inner electrode layer” sandwich each 102 “piezoelectric layer” in an alternating stack), and the plurality of electrode layers (104, 106 “inner electrode layer”, Figures 1A, 1B) comprises a topmost electrode layer (see examiner’s fifth markup of Figure 1A) and a bottommost electrode layer (see examiner’s fifth markup of Figure 1A), and wherein each the piezoelectric film (102 “piezoelectric layer”) comprises: a lower piezoelectric coefficient layer (see examiner’s fifth markup of Figure 1A); and at least one higher piezoelectric coefficient layer (see examiner’s fifth markup of Figure 1A) stacked with the lower piezoelectric coefficient layer (see examiner’s fifth markup of Figure 1A), and wherein a topmost higher piezoelectric coefficient layer (see examiner’s markup of Figure 1A) is in direct contact with the topmost electrode layer (see examiner’s markup of Figure 1A) and a bottommost higher piezoelectric coefficient layer (see examiner’s markup of Figure 1A) is in direct contact with the bottommost electrode layer (see examiner’s markup of Figure 1A). Below is an examiner’s fifth markup of Figure 1A of Goto pointing out a lower piezoelectric coefficient layer and a higher piezoelectric coefficient layer. PNG media_image8.png 544 1426 media_image8.png Greyscale However, Goto does not disclose a lower piezoelectric coefficient layer having a first piezoelectric coefficient, at least one higher piezoelectric coefficient layer having a second piezoelectric coefficient higher than the first piezoelectric coefficient, and a total thickness of lower piezoelectric coefficient layers is greater than a total thickness of higher piezoelectric coefficient layers. Choi teaches a lower piezoelectric coefficient layer (114 “second piezoelectric layer”, see examiner’s fourth markup of Figure 2) having a first piezoelectric coefficient and at least one higher piezoelectric coefficient layer (112 “first piezoelectric layer”, see examiner’s fourth markup of Figure 2) having a second piezoelectric coefficient higher than the first piezoelectric coefficient (first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient higher than that of the second piezoelectric layer 114” so therefore the average piezoelectric coefficient of the two 114 “second piezoelectric layers” will be lower than 112 “first piezoelectric layer” because the coefficient of 112 “first piezoelectric layer” is higher than 114 “second piezoelectric layer”). Below is an examiner’s fourth markup of Figure 2 of Choi pointing out a lower piezoelectric layer and two higher piezoelectric layers. PNG media_image9.png 458 953 media_image9.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the piezoelectric composite stack of a micro-electro-mechanical system (MEMS) device of Goto modified by at least one higher piezoelectric coefficient layer having a second piezoelectric coefficient higher than the first piezoelectric coefficient, as taught by Choi, in order improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize lower piezoelectric coefficient layers and higher piezoelectric coefficient layers such that a total thickness of lower piezoelectric coefficient layers is greater than a total thickness of higher piezoelectric coefficient layers, since such a modification would involve only a mere change in size of a component. Scaling up or down of an element which merely requires a change in size is generally considered as being within the ordinary skill in the art. In re Rinehart, 189 USPQ 143 (CCAP 1976). Regarding claim 12, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses wherein the number of n is equal to 2a and a is an integer greater than zero (see examiner’s sixth markup of Figure 1A which shows n = 2), the number of the lower piezoelectric coefficient layer of the piezoelectric composite stack is an integer (i) that is equal to n (see examiner’s sixth markup of Figure 1A which shows i = n), and the number of the at least one higher piezoelectric coefficient layer of the piezoelectric composite stack is an integer (j) that is equal to n see examiner’s sixth markup of Figure 1A which shows j = n). Below is an examiner’s sixth markup of Figure 1A of Goto pointing out an upper piezoelectric film, a lower piezoelectric film, a (2-2)-th higher piezoelectric coefficient layer, (2-1)-th lower piezoelectric coefficient layer, (1-2)-th higher piezoelectric coefficient layer, (1-1)-th lower piezoelectric coefficient layer, and an electrode layer. PNG media_image10.png 555 1427 media_image10.png Greyscale Regarding claim 13, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses wherein the number of n is equal to 2a-1, and a is an integer greater than zero (see examiners seventh markup of Figure 1A which shows n = 3), the number of the lower piezoelectric coefficient layer of the piezoelectric composite stack is an integer (i) that is equal to n (see examiners seventh markup of Figure 1A which shows i = n), and the number of the at least one higher piezoelectric coefficient layer of the piezoelectric composite stack is an integer (j) that is equal to n + 1 (see examiners seventh markup of Figure 1A which shows j = n + 1). Below is an examiner’s seventh markup of Figure 1A of Goto pointing out an upper piezoelectric film, a middle piezoelectric film, a lower piezoelectric film, a (2-2)-th higher piezoelectric coefficient layer, a (2-1)-th lower piezoelectric coefficient layer, two (3-2)-th higher piezoelectric coefficient layers, a (3-1)-th lower piezoelectric coefficient layer, a (1-2) -th higher piezoelectric coefficient layer, a (1-1)-th lower piezoelectric coefficient layer, and two electrode layers. PNG media_image11.png 586 1430 media_image11.png Greyscale Regarding claim 14, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses wherein the number of n is 1, and the piezoelectric film (102 “piezoelectric layer”, see examiner’s fifth markup of Figure 1A) comprises two higher piezoelectric coefficient layers (102 “piezoelectric layer”, see examiner’s fifth markup of Figure 1A) respectively stacked above and under the lower piezoelectric coefficient layer (102 “piezoelectric layer”, see examiner’s fifth markup of Figure 1A). Regarding claim 15, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses wherein the number of n is 2, and the piezoelectric composite stack comprises an upper piezoelectric film (see examiner’s sixth markup of Figure 1A) and a lower piezoelectric film (see examiner’s sixth markup of Figure 1A), wherein the upper piezoelectric film comprises a (2-2)-th higher piezoelectric coefficient layer (see examiner’s sixth markup of Figure 1A) stacked above a (2-1)-th lower piezoelectric coefficient layer (see examiner’s sixth markup of Figure 1A), the lower piezoelectric film comprises a (1-2)-th higher piezoelectric coefficient layer (see examiner’s sixth markup of Figure 1A) stacked under a (1-1)-th lower piezoelectric coefficient layer (see examiner’s sixth markup of Figure 1A), and one of the plurality of electrode layers is disposed between the upper piezoelectric film (see examiner’s sixth markup of Figure 1A) and the lower piezoelectric film (see examiner’s sixth markup of Figure 1A). Below is an examiner’s sixth markup of Figure 1A of Goto pointing out an upper piezoelectric film, a lower piezoelectric film, a (2-2)-th higher piezoelectric coefficient layer, (2-1)-th lower piezoelectric coefficient layer, (1-2)-th higher piezoelectric coefficient layer, (1-1)-th lower piezoelectric coefficient layer, and an electrode layer. PNG media_image10.png 555 1427 media_image10.png Greyscale However, Goto does not disclose the (2-2)-th and the (1-2)-th higher piezoelectric coefficient layers have the second piezoelectric coefficient, and the (2-1)-th and the (1-1)-th lower piezoelectric coefficient layers have the first piezoelectric coefficient. Choi teaches the (2-2)-th (114 “second piezoelectric layer”, see examiner’s fifth markup of Figure 2) and the (1-2)-th (114 “second piezoelectric layer”, see examiner’s fifth markup of Figure 2) higher piezoelectric coefficient layers have the second piezoelectric coefficient (first paragraph of page 3 of translation states “the second piezoelectric layer 114 has a piezoelectric charge coefficient”), and the (2-1)-th (112 “first piezoelectric layer”, see examiner’s fifth markup of Figure 2) and the (1-1)-th (112 “first piezoelectric layer”, see examiner’s fifth markup of Figure 2) lower piezoelectric coefficient layers have the first piezoelectric coefficient (first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient”). Below is an examiner’s fifth markup of Figure 2 of Choi pointing out a (2-2)-th higher piezoelectric coefficient layer, a (2-1)-th lower piezoelectric coefficient layer, a (1-2)-th higher piezoelectric coefficient layer, and a (1-1)-th lower piezoelectric coefficient layer. PNG media_image12.png 458 1027 media_image12.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the piezoelectric composite stack of a micro-electro-mechanical system (MEMS) device of Goto modified by the (2-2)-th and the (1-2)-th higher piezoelectric coefficient layers have the second piezoelectric coefficient, and the (2-1)-th and the (1-1)-th lower piezoelectric coefficient layers have the first piezoelectric coefficient, as taught by Choi, in order improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). Regarding claim 16, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses wherein the number of n is 3, and the piezoelectric composite stack comprises an upper piezoelectric film (see examiner’s seventh markup of Figure 1A), a middle piezoelectric film (see examiner’s seventh markup of Figure 1A) and a lower piezoelectric film (see examiner’s seventh markup of Figure 1A), wherein the upper piezoelectric film comprises a (2-2)-th higher piezoelectric coefficient layer (see examiner’s seventh markup of Figure 1A) stacked above a (2-1)-th lower piezoelectric coefficient layer (see examiner’s seventh markup of Figure 1A), the middle piezoelectric film comprises two (3-2)-th higher piezoelectric coefficient layers (see examiner’s seventh markup of Figure 1A) sandwiching a (3-1)-th lower piezoelectric coefficient layer (see examiner’s seventh markup of Figure 1A), the lower piezoelectric film comprises a (1-2) -th higher piezoelectric coefficient layer (see examiner’s seventh markup of Figure 1A) stacked under a (1-1)-th lower piezoelectric coefficient layer (see examiner’s seventh markup of Figure 1A), two of the plurality of electrode layers (see examiner’s seventh markup of Figure 1A) sandwich the middle piezoelectric film (see examiner’s seventh markup of Figure 1A). Below is an examiner’s seventh markup of Figure 1A of Goto pointing out an upper piezoelectric film, a middle piezoelectric film, a lower piezoelectric film, a (2-2)-th higher piezoelectric coefficient layer, a (2-1)-th lower piezoelectric coefficient layer, two (3-2)-th higher piezoelectric coefficient layers, a (3-1)-th lower piezoelectric coefficient layer, a (1-2) -th higher piezoelectric coefficient layer, a (1-1)-th lower piezoelectric coefficient layer, and two electrode layers. PNG media_image11.png 586 1430 media_image11.png Greyscale However, Goto does not disclose the (3-2)-th, the (2-2)-th and the (1-2)-th higher piezoelectric coefficient layers have the second piezoelectric coefficient, and the (3-1)-th, the (2-1)-th and the (1-1)-th lower piezoelectric coefficient layers have the first piezoelectric coefficient. Choi teaches the (3-2)-th (112 “first piezoelectric layer”, see examiner’s sixth markup of Figure 2), the (2-2)-th (112 “first piezoelectric layer”, see examiner’s sixth markup of Figure 2) and the (1-2)-th (112 “first piezoelectric layer”, see examiner’s sixth markup of Figure 2) higher piezoelectric coefficient layers have the second piezoelectric coefficient (first paragraph of page 3 of translation states “the first piezoelectric layer 112 is formed of a piezoelectric material having a piezoelectric charge coefficient”), and the (3-1)-th (114 “second piezoelectric layer”, see examiner’s sixth markup of Figure 2), the (2-1)-th (114 “second piezoelectric layer”, see examiner’s sixth markup of Figure 2) and the (1-1)-th (114 “second piezoelectric layer”, see examiner’s sixth markup of Figure 2) lower piezoelectric coefficient layers have the first piezoelectric coefficient (first paragraph of page 3 of translation states “the second piezoelectric layer 114 has a piezoelectric charge coefficient”). Below is an examiner’s sixth markup of Figure 2 of Choi pointing out a (2-2)-th higher piezoelectric coefficient layer, a (2-1)-th lower piezoelectric coefficient layer, two (3-2)-th higher piezoelectric coefficient layers, a (3-1)-th lower piezoelectric coefficient layer, a (1-2) -th higher piezoelectric coefficient layer, and a (1-1)-th lower piezoelectric coefficient layer. PNG media_image13.png 508 1015 media_image13.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the piezoelectric composite stack of a micro-electro-mechanical system (MEMS) device of Goto modified by the (3-2)-th, the (2-2)-th and the (1-2)-th higher piezoelectric coefficient layers have the second piezoelectric coefficient, and the (3-1)-th, the (2-1)-th and the (1-1)-th lower piezoelectric coefficient layers have the first piezoelectric coefficient, as taught by Choi, in order improve piezoelectric properties and control output more easily (page 2, paragraphs 2-3 of translation). Regarding claim 17, the combination of Goto and Choi disclose all the limitations of claim 16 and Goto further discloses wherein the middle piezoelectric film has a thickness different from both the thickness of the upper piezoelectric film and the thickness of the lower piezoelectric film (see examiner’s seventh markup of Figure 1A which shows that the thickness of the middle piezoelectric film is larger than the thickness of the upper piezoelectric film and the thickness of the lower piezoelectric film). Regarding claim 18, the combination of Goto and Choi disclose all the limitations of claim 11, however Goto does not disclose wherein a total thickness of the at least one higher piezoelectric coefficient layer in each the piezoelectric film is less than 50% of a total thickness of each the piezoelectric film. It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize at least one higher piezoelectric coefficient layer such that a total thickness of the at least one higher piezoelectric coefficient layer in each the piezoelectric film is less than 50% of a total thickness of each the piezoelectric film, since such a modification would involve only a mere change in size of a component. Scaling up or down of an element which merely requires a change in size is generally considered as being within the ordinary skill in the art. In re Rinehart, 189 USPQ 143 (CCAP 1976). Regarding claim 19, the combination of Goto and Choi disclose all the limitations of claim 11 and Goto further discloses being symmetric with respect to a horizontal plane in the middle of the piezoelectric composite stack (see examiner’s seventh markup of Figure 1A which shows that the piezoelectric stack is symmetric with respect to a horizontal plane in the middle of the piezoelectric stack). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Goto (CN 112262483 A)(see attached machine translation), in view of Choi (KR 20120079963 A)(see machine translation), and further in view of Kubota (US 20170155037 A1). Regarding claim 3, the combination of Goto and Choi disclose all the limitations of claim 1, however Goto does not disclose wherein a thickness of the at least one first piezoelectric layer is greater than the thickness of each of the second piezoelectric layers. Kubota teaches wherein a thickness of the at least one first piezoelectric layer (1033 "piezoelectric film intermediate layer") is greater than the thickness of each of the second piezoelectric layers (1032 "piezoelectric film lower layer", 1034 "piezoelectric film upper layer", paragraph 0172 states “It is preferred that a thickness of the piezoelectric film lower layer 1032 be smaller than a thickness of the piezoelectric film intermediate layer 1033. Similarly, it is preferred that a thickness of the piezoelectric film upper layer 1034 be smaller than the thickness of the piezoelectric film intermediate layer 1033”, Figure 1C shows that the thickness of 1033 "piezoelectric film intermediate layer" is greater than the thickness of 1032 "piezoelectric film lower layer" and 1034 "piezoelectric film upper layer"). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the micro-electro-mechanical system (MEMS) device of Goto modified by wherein a thickness of the at least one first piezoelectric layer is greater than the thickness of each of the second piezoelectric layers, as taught by Kubota, in order to reduce internal residual stress (paragraph 0088). Claims 7 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Goto (CN 112262483 A)(see attached machine translation), in view of Choi (KR 20120079963 A), and further in view of Zuo (US 20130214643 A1). Regarding claim 7, the combination of Goto and Choi disclose all the limitations of claim 6, however Goto does not disclose wherein the composition of the at least one first piezoelectric layer and the two third piezoelectric layers comprises aluminum nitride (AlN), zinc oxide (ZnO) , or gallium nitride (GaN), and the composition of the two second piezoelectric layers and the two fourth piezoelectric layers comprises lead zirconate titanate (PZT), or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf). Zuo teaches wherein the composition of the at least one first piezoelectric layer (110a “first piezoelectric material”) comprises aluminum nitride (AlN), zinc oxide (ZnO) , or gallium nitride (GaN) (paragraph 0035 states "the first piezoelectric material 110a may be A1N" and paragraph 0036 states "The first piezoelectric material 110a may have a quality factor (Q) 112a, a transverse piezoelectric coefficient (d.sub.31) 114a"), and the composition of the two second piezoelectric layers (110b “second piezoelectric material”) comprises lead zirconate titanate (PZT), or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf) (paragraph 0035 states "the second piezoelectric material 110b may be PZT or ZnO" and paragraph 0036 states "The second piezoelectric material 110b may have a quality factor (Q) 112b, a transverse piezoelectric coefficient (d.sub.31) 114b"). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the micro-electro-mechanical system (MEMS) device of Goto modified by the composition of the at least one first piezoelectric layer comprises aluminum nitride (AlN), zinc oxide (ZnO) , or gallium nitride (GaN), and the composition of the two second piezoelectric layers comprises lead zirconate titanate (PZT), or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf), as taught by Zuo, in order to reduce motional resistance, reduce filter insertion loss, and increase electromechanical coupling (paragraphs 0031, 0032). It would have been obvious to one of ordinary skill in the art before the effective filing date to duplicate the first piezoelectric material and the second piezoelectric material of Zuo such that additional piezoelectric layers are formed, wherein a third piezoelectric layer is a duplication of the first layer and a fourth layer is a duplication of the second layer, since it has been held that a mere duplication of working parts of a device involves only routine skill in the art. In re Harza 124 USPQ 378 (CCPA 1960). Regarding claim 20, the combination of Goto and Choi disclose all the limitations of claim 11, however Goto does not disclose wherein the composition of the lower piezoelectric coefficient layer comprises aluminum nitride (AlN), zinc oxide (ZnO), or gallium nitride (GaN), and the composition of the higher piezoelectric coefficient layer comprises lead zirconate titanate (PZT) , or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf). Zuo teaches wherein the composition of the lower piezoelectric coefficient layer (110a “first piezoelectric material”) comprises aluminum nitride (AlN), zinc oxide (ZnO), or gallium nitride (GaN) (paragraph 0035 states "the first piezoelectric material 110a may be A1N"), and the composition of the higher piezoelectric coefficient layer (110b “second piezoelectric material”) comprises lead zirconate titanate (PZT) (paragraph 0035 states "the second piezoelectric material 110b may be PZT or ZnO"), or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the micro-electro-mechanical system (MEMS) device of Goto modified by the composition of the lower piezoelectric coefficient layer comprises aluminum nitride (AlN), zinc oxide (ZnO), or gallium nitride (GaN), and the composition of the higher piezoelectric coefficient layer comprises lead zirconate titanate (PZT) , or AlN, ZnO or GaN doped with a dopant, and wherein the dopant comprises scandium (Sc), yttrium (Y), titanium (Ti), chromium (Cr), magnesium (Mg) or hafnium (Hf), as taught by Zuo, in order to reduce motional resistance, reduce filter insertion loss, and increase electromechanical coupling (paragraphs 0031, 0032). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Goto (CN 112262483 A)(see attached machine translation), in view of Choi (KR 20120079963 A)(see machine translation), and further in view of Bradley (US 20040246075 A1). Regarding claim 8, the combination of Goto and Choi disclose all the limitations of claim 1 and Goto further discloses wherein the MEMS structure (see examiner’s first markup of Figure 1A) further comprises: a passivation layer (108 “cover layer”) disposed on a top surface of the second electrode layer (02 “piezoelectric layer”, see examiner’s fourth markup of Figure 1A). However, Goto does not disclose a seed layer disposed on a bottom surface of the first electrode layer. Bradley teaches a seed layer (62 “seed layer”) disposed on a bottom surface of the first electrode layer (32 “bottom electrode”, paragraph 0050 states “The seed layer 62 provides a better surface on which the bottom electrode 32 and the composite layer 34 can be fabricated”, Figure 5). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the micro-electro-mechanical system (MEMS) device of Goto modified by a seed layer disposed on a bottom surface of the first electrode layer, as taught by Bradley, in order to provide a better surface on which to fabricate an electrode layer (paragraph 0050). Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Goto (CN 112262483 A)(see attached machine translation), in view of Choi (KR 20120079963 A)(see machine translation), and further in view of Wang (CN 113438588 A)(see attached machine translation). Regarding claim 9, the combination of Goto and Choi disclose all the limitations of claim 1, however Goto does not disclose wherein the MEMS structure has an interrupted portion penetrating the MEMS structure and disposed above the cavity, and the MEMS structure comprises a cantilevered beam or a cantilevered diaphragm above the cavity. Wang teaches wherein the MEMS structure (100 “micro-electromechanical system microphone”) has an interrupted portion (see examiner’s markup of Figure 2) penetrating the MEMS structure (100 “micro-electromechanical system microphone”) and disposed above the cavity (170 “cavity”, see examiner’s markup of Figure 2), and the MEMS structure (100 “micro-electromechanical system microphone”) comprises a cantilevered beam (page 9, paragraph 14 of translation states “using photolithography and etching process, the insulating layer 140, the piezoelectric layer 110, the first electrode 120 for patterning etching, defining the shape of the cantilever beam”, see examiner’s markup of Figure 2) or a cantilevered diaphragm above the cavity (170 “cavity”). Below is an examiner’s markup of Figure 2 of Wang pointing out an interrupted portion, a cantilevered beam, and a sacrificial layer. PNG media_image14.png 719 1174 media_image14.png Greyscale Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the micro-electro-mechanical system (MEMS) device of Goto modified by an interrupted portion, as taught by Wang, in order to define the shape of the cantilever beam (page 9, paragraphs 13-14 of translation). Regarding claim 10, the combination of Goto, Choi, and Wang disclose all the limitations of claim 9, however Goto does not disclose a sacrificial layer disposed between the substrate and the MEMS structure, wherein the sacrificial layer has an opening connected to the interrupted portion and the cavity. Wang teaches a sacrificial layer (see examiner’s markup of Figure 2) disposed between the substrate (160 “substrate”) and the MEMS structure (100 “micro-electromechanical system microphone”), wherein the sacrificial layer (see examiner’s markup of Figure 2) has an opening connected to the interrupted portion (see examiner’s markup of Figure 2) and the cavity (170 “cavity”). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the micro-electro-mechanical system (MEMS) device of Goto modified by a sacrificial layer, as taught by Wang, in order to prevent the stack of piezoelectric layers and electrode layers from being disposed directly on the substrate and to define the shape of the cantilever beam (page 9, paragraphs 13-14 of translation). Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALAINA M SWANSON whose telephone number is (703)756-5809. The examiner can normally be reached Mon-Fri, 7:30am-4:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pinping Sun can be reached at 571-270-1284. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALAINA MARIE SWANSON/Examiner, Art Unit 2872 /WILLIAM R ALEXANDER/Primary Examiner, Art Unit 2872
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Prosecution Timeline

Oct 19, 2022
Application Filed
Apr 25, 2025
Non-Final Rejection — §103
Jul 23, 2025
Response Filed
Sep 19, 2025
Final Rejection — §103
Dec 07, 2025
Request for Continued Examination
Dec 17, 2025
Response after Non-Final Action
Jan 12, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
99%
With Interview (+18.2%)
3y 3m
Median Time to Grant
High
PTA Risk
Based on 36 resolved cases by this examiner. Grant probability derived from career allow rate.

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