Prosecution Insights
Last updated: August 15, 2026

Vanguard International Semiconductor Corporation

13 pending office actions • 9 art units • 13 examiners • 0 of 13 (0%) have an AI response strategy ready • 41 patents granted in the last 365 days

Portfolio Summary

13
Total Pending OAs
8
Non-Final OAs
5
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 3 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

2
Overdue
0
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 3 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (2)Due ≤ 30 days (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

6
Hard (46%)
7
Medium (54%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only4 (31%)
§102 only3 (23%)
Multi-statute (no §101)6 (46%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
12
Semiconductors
92% of docket
0
Mechanical / Eng
0% of docket
1
Business / Other
8% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

130 h
Manual time on pending OAs
26 h
Time saved (low, 20%)
46 h
Time saved (mid, 35%)
1.1 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
LANDAU, MATTHEW C 1 26.0% +5.4%
CRAWFORD EASON, LATANYA N 1 78.4% +0.5%
LEWIS, MONICA 1 31.7% +17.1%
MALSAWMA, LALRINFAMKIM HMAR 1 90.5% +8.8%
JOHNSON, CHRISTOPHER A 1 84.2% +8.3%
GARCES, NELSON Y 1 80.4% +2.9%
ZARNEKE, DAVID A 1 70.8% +10.8%
MENZ, DOUGLAS M 1 88.5% +4.6%
CHEN, JACK S J 1 76.6% +5.2%
JUNGE, BRYAN R. 1 58.0% +9.0%

Quick Wins (2)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18518618 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF JOHNSON, CHRISTOPHER A
18507114 PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF GARCES, NELSON Y

Hard Cases (6)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 6 ordered by deadline are shown.

App #TitleExaminerDue in
17826181 MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) DEVICE and fabrication method thereof BLACKWELL, ASHLEY NICOLE 44d overdue
18343617 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME CHEN, JACK S J 12d
18677934 METHOD OF FABRICATING HIGH ELECTRON MOBILITY TRANSISTOR LANDAU, MATTHEW C
18677824 METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE CRAWFORD EASON, LATANYA N
18409801 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF MALSAWMA, LALRINFAMKIM HMAR
18493317 METHOD FOR FORMING SEMICONDUCTOR STRUCTURE MENZ, DOUGLAS M

Interview Candidates (2)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18623215 ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT LEWIS, MONICA
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A

Top Art Units

Art UnitApps
2897 3
2891 2
2838 1
2892 1
2899 1
2814 1
2893 1
2818 1
2872 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18677934 METHOD OF FABRICATING HIGH ELECTRON MOBILITY TRANSISTOR LANDAU, MATTHEW C 2891 §102§103 Final Rejection Pending May 30, 2024
18677824 METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE CRAWFORD EASON, LATANYA N §102§103 Non-Final OA Pending May 29, 2024
18623215 ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT LEWIS, MONICA 2838 §102 Final Rejection Pending Apr 01, 2024
18409801 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF MALSAWMA, LALRINFAMKIM HMAR 2892 §102§112 Non-Final OA Pending Jan 11, 2024
18518618 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF JOHNSON, CHRISTOPHER A 2899 §102 Non-Final OA Pending Nov 24, 2023
18507114 PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF GARCES, NELSON Y 2814 §103 Non-Final OA Pending Nov 13, 2023
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A 2891 §103 Non-Final OA Pending Nov 08, 2023
18493317 METHOD FOR FORMING SEMICONDUCTOR STRUCTURE MENZ, DOUGLAS M 2897 §102§103 Non-Final OA Pending Oct 24, 2023
18343617 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME CHEN, JACK S J 2893 §102§103 Final Rejection 12d Pending Jun 28, 2023
18168321 OPTICAL SENSOR DEVICE JUNGE, BRYAN R. 2897 §103 Final Rejection 18d overdue Pending Feb 13, 2023
18150106 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME RAHMAN, KHATIB A 2818 §102 Non-Final OA Pending Jan 04, 2023
17968812 MICRO-ELECTRO-MECHANICAL SYSTEM DEVICE AND PIEZOELECTRIC COMPOSITE STACK THEREOF SWANSON, ALAINA MARIE 2872 §103 Non-Final OA Pending Oct 19, 2022
17826181 MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) DEVICE and fabrication method thereof BLACKWELL, ASHLEY NICOLE 2897 §102§103 Final Rejection 44d overdue Pending May 27, 2022

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