Prosecution Insights
Last updated: October 04, 2026

Vanguard International Semiconductor Corporation

Technology area: Semiconductors, Circuits & Optics

11 pending office actions • 9 art units • 11 examiners • 0 of 11 (0%) have an AI response strategy ready • 48 patents granted in the last 365 days

Analysis

Vanguard International Semiconductor Corporation is currently navigating 10 pending office actions within the Semiconductors, Circuits & Optics technology area. These actions are handled by 10 distinct examiners, ensuring that no single examiner is tasked with more than a single active matter. This ratio between actions and examiners suggests a highly decentralized prosecution process across the Semiconductors, Circuits & Optics field.

The company's pending office actions are spread across 8 distinct art units, indicating a broad technical range within their semiconductor-related filings. ESIABA, NKECHINYERE OTUOMASIRICH is the busiest examiner for the portfolio, currently managing 1 busiest examiner pending action. Since 8 distinct art units are involved, ESIABA, NKECHINYERE OTUOMASIRICH represents only a small portion of the total examination effort. This diversity across examiners and art units may require the company to address a wide variety of examiner perspectives within the Semiconductors, Circuits & Optics sector. The 1 busiest examiner pending action reflects a balanced workload distribution.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

11
Total Pending OAs
4
Non-Final OAs
6
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 3 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
2
Due this month
0
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 3 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (1)Due ≤ 30 days (2)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

4
Hard (36%)
6
Medium (55%)
1
Easy (9%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only5 (45%)
§102 only1 (9%)
§112 only1 (9%)
Multi-statute (no §101)4 (36%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
10
Semiconductors
91% of docket
0
Mechanical / Eng
0% of docket
1
Business / Other
9% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

110 h
Manual time on pending OAs
22 h
Time saved (low, 20%)
38 h
Time saved (mid, 35%)
1.0 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
ESIABA, NKECHINYERE OTUOMASIRICH 1 57.9% +47.1%
VALENZUELA, PATRICIA D 1 90.3% +2.0%
TRAN, DZUNG 1 83.6% +5.7%
ANDERSON, WILLIAM H 1 85.1% +17.9%
ZARNEKE, DAVID A 1 71.0% +11.2%
CHEN, JACK S J 1 76.7% +5.6%
BEARDSLEY, JONAS TYLER 1 60.9% +28.5%
JUNGE, BRYAN R. 1 58.1% +8.9%
RAHMAN, KHATIB A 1 91.1% +5.0%
NICELY, JOSEPH C 1 77.7% +19.8%

Quick Wins (3)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18597567 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME VALENZUELA, PATRICIA D —
18421956 HIGH-VOLTAGE SEMICONDUCTOR DEVICE TRAN, DZUNG —
18150106 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME RAHMAN, KHATIB A —

Hard Cases (4)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18343617 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME CHEN, JACK S J 12d
18680081 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME ESIABA, NKECHINYERE OTUOMASIRICH —
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H —
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER —

Interview Candidates (5)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
18059265 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME NICELY, JOSEPH C 14d
18680081 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME ESIABA, NKECHINYERE OTUOMASIRICH —
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H —
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A —
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER —

Top Art Units

Art UnitApps
2893 2
2812 1
2817 1
2891 1
2811 1
2897 1
2818 1
2813 1
2872 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18680081 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME ESIABA, NKECHINYERE OTUOMASIRICH — §102§103 Non-Final OA — Pending May 31, 2024
18597567 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME VALENZUELA, PATRICIA D 2812 §103 Final Rejection — Pending Mar 06, 2024
18421956 HIGH-VOLTAGE SEMICONDUCTOR DEVICE TRAN, DZUNG 2893 §103 Final Rejection — Pending Jan 24, 2024
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H 2817 §102§103 Non-Final OA — Pending Jan 17, 2024
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A 2891 §103 Final Rejection — Pending Nov 08, 2023
18343617 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME CHEN, JACK S J 2893 §102§103 Final Rejection 12d Pending Jun 28, 2023
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER 2811 §102§103 Non-Final OA — Pending Jun 28, 2023
18168321 OPTICAL SENSOR DEVICE JUNGE, BRYAN R. 2897 §103 Final Rejection 18d overdue Pending Feb 13, 2023
18150106 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME RAHMAN, KHATIB A 2818 §102 Final Rejection — Pending Jan 04, 2023
18059265 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME NICELY, JOSEPH C 2813 §112 Non-Final OA 14d Pending Nov 28, 2022
17968812 MICRO-ELECTRO-MECHANICAL SYSTEM DEVICE AND PIEZOELECTRIC COMPOSITE STACK THEREOF SWANSON, ALAINA MARIE 2872 §103 Non-Final OA — Pending Oct 19, 2022

Managing Vanguard International Semiconductor Corporation's Patent Portfolio?

IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.

Start Free Trial

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month