Prosecution Insights
Last updated: October 02, 2026
Application No. 17/970,487

MICRO LIGHT-EMITTING DIODE PACKAGE STRUCTURE

Non-Final OA §103
Filed
Oct 20, 2022
Priority
Oct 22, 2021 — provisional 63/270,654 +1 more
Examiner
IQBAL, HAMNA FATHIMA
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Lextar Electronics Corporation
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
15 granted / 18 resolved
+15.3% vs TC avg
Strong +20% interview lift
Without
With
+20.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
42 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§103
70.5%
+30.5% vs TC avg
§102
19.0%
-21.0% vs TC avg
§112
10.5%
-29.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 18 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Taiwan, TW 11136672 on September 28, 2022. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Acknowledgment is made of applicant's claim for domestic priority based on a Provisional application, 63/270,654, filed on October 22, 2021. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/21/2026 has been entered. Response to Amendment An Amendment filed on 07/21/2026, responding to the Office Action mailed on 04/21/2026, has been acknowledged and entered into the record. The present Final Rejection is made with all the suggested amendments being fully considered. Response to Arguments On pages 4-7 of the remarks filed on 07/21/2026, with respect to the 103 rejection of Claim 1, Applicant argues that Iyer et al. does not teach or suggest "a first insulating layer disposed between the redistribution layer and the flexible material layer in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface," as recited in claim 1. This argument is fully considered but is not persuasive. One cannot show non-obviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). As such, while primary reference of Iyer does not, the secondary reference of Huitema does teach the above limitations as outlined in the rejection below. Therefore, the rejection of Claim 1 and its dependents is maintained. On pages 7-8 of the remarks filed on 07/21/2026, with respect to the 103 rejection of Claim 1, Applicant argues that Huitema's back side RDL 120 (the alleged flexible material layer) is not transmissive to light from the plurality of micro light-emitting diodes and thus, cannot be relied up to teach the alleged flexible material layer of claim 1. This argument is fully considered but is not persuasive. Huitema was not relied upon to teach the above limitation as the primary reference of Iyer already teaches this limitation as outlined in the rejection below. In fact, Huitema was only relied upon to teach the first insulating layer recited in Claim 1. Therefore, the rejection of Claim 1 and its dependents is maintained. On page 8 of the remarks filed on 07/21/2026, with respect to the 103 rejection of Claim 1, Applicant argues that Huitema's insulator layer 104 (the alleged first insulating layer) is not disposed between the front side RDL 110 (the alleged redistribution layer) and the flexible material layer. This argument is fully considered but is not persuasive. As outlined in the rejection below, Huitema teaches a first insulating layer 104 disposed between the redistribution layer 110 and the material layer 120 in a configuration of surrounding the control device 310, 320 and directly connected to the redistribution layer 110 and the side surface (of devices 200) (Fig. 5: 104, 110, 310, 320, 200, paragraph 0082, 0083). While Huitema does not explicitly teach the material layer 120 is a flexible material layer, a person of ordinary skill in the art would have applied the teachings of Huitema to Iyer in order to have a similar first insulating layer disposed between the redistribution layer and the flexible material layer of Iyer et al. in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface. Doing so would electrically isolate the micro light-emitting diodes from each other and from the control device. Therefore, the rejection of Claim 1 and its dependents is maintained. On page 8 of the remarks filed on 07/21/2026, with respect to the 103 rejection of Claim 1, Applicant argues that Huitema's pixel driver chips 200 (the alleged micro light-emitting diodes) are not micro light-emitting diodes and thus cannot be relied upon to teach the alleged micro light-emitting diodes of claim 1. Applicant further argues that Huitema discloses the LEDs 102 are arranged over a plurality of embedded pixel driver chips 200 and accordingly, Huitema's insulator layer 104 (the alleged first insulating layer) is not directly connected to the side surface of the LEDs 102, and thus, the combination of Iyer and Huitema fails to teach or suggest "a first insulating layer disposed between the redistribution layer and the flexible material layer and directly connected to the side surface," as recited in amended claim 1. These arguments are fully considered but are not persuasive. First, Huitema is not relied upon to teach the micro light-emitting diodes recited in claim 1, as the primary reference of Iyer already teaches this limitation. In fact, Huitema was relied upon only to teach the first insulating layer and its placement. As such, Huitema et al., an analogous art, teaches a first insulating layer 104 disposed between the redistribution layer 110 and the material layer 120 in a configuration of surrounding the control device 310, 320 and directly connected to the redistribution layer 110 and the side surface of devices 200) (see Fig. 5: 104, 110, 310, 320, 200, paragraph 0082, 0083). While the electronic components 200 of Huitema may not be the same control devices and micro LEDs of Iyer, a person of ordinary skill in the art would have applied the teachings of Huitema to Iyer in order to have a similar first insulating layer disposed between the redistribution layer and the flexible material layer of Iyer et al. in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface of the micro light-emitting diodes of Iyer. Therefore, the rejection of Claim 1 and its dependents is maintained. On page 8 of the remarks filed on 07/21/2026, with respect to the 103 rejection of Claim 1, Applicant argues Tu and Bower fails to cure the deficiencies in Iyer in view of Huitema and further, there is no teaching or suggestion in these references that would have led a person of ordinary skill in the art at the time of the invention to modify Iyer in view of Huitema to suggest "a first insulating layer disposed between the redistribution layer and the flexible material layer and directly connected to the side surface," as claimed. These arguments are fully considered but are not persuasive. According to MPEP § 2143.01, A "motivation to combine may be found explicitly or implicitly in market forces; design incentives; the ‘interrelated teachings of multiple patents’; ‘any need or problem known in the field of endeavor at the time of invention and addressed by the patent’; and the background knowledge, creativity, and common sense of the person of ordinary skill." Zup v. Nash Mfg., 896 F.3d 1365, 1371, 127 USPQ2d 1423, 1427 (Fed. Cir. 2018) (quoting Plantronics, Inc. v. Aliph, Inc., 724 F.3d 1343, 1354 [107 USPQ2d 1706] (Fed. Cir. 2013) (citing Perfect Web Techs., Inc. v. InfoUSA, Inc., 587 F.3d 1324, 1328 [92 USPQ2d 1849] (Fed. Cir. 2009) (quoting KSR, 550 U.S. at 418-21)). As such, it would have been obvious to a person of ordinary skill in the art at the time of the claimed invention to have combined the teachings of Iyer et al. and Huitema et al. in order to have the first insulating layer of Huitema et al. disposed between the redistribution layer and the flexible material layer of Iyer et al. in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface. Doing so would electrically isolate the micro light-emitting diodes from each other and from the control device. Therefore, the rejection of Claim 1 and its dependents is maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Rejection Note: Italicized claim limitations are limitations not explicitly disclosed in the primary reference but disclosed in the secondary references. Claims 1-3, 8, 9, 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Iyer et al. (US 20230238476 A1), in view of Huitema et al. (WO 2019168763 A1). Regarding Claim 1, Iyer et al. discloses a micro light-emitting diode package structure, comprising: a redistribution layer 630 (Fig. 8: 630, paragraph 0103); a control device 510, 512 disposed on and electrically connected to the redistribution layer 630 (Fig. 8: 510, 512, 630, paragraph 0103); a plurality of micro light-emitting diodes 430, 440, 450, each comprising a back surface, a side surface, and at least two electrodes, wherein the at least two electrodes are arranged to face and electrically connect to the redistribution layer 630 (Fig. 8: 430, 440, 450, 630, paragraph 0103); a flexible material layer 520, transmissive to light from the plurality of micro light-emitting diodes 430, 440, 450, covering the control device 510, 521 and directly connected to the plurality of micro light- emitting diodes 430, 440, 450 (Fig. 8: 520, paragraph 0103), Note that in Fig. 8, the light emitted from the micro light- emitting diodes 430, 440, 450 passes through the flexible material layer 520 into the light guide 810 placed above them (see fig. 8 and paragraph 0108), and thus, the flexible material layer 520 is inherently transmissive to light from the plurality of micro light-emitting diodes 430, 440, 450. a first insulating layer disposed between the redistribution layer and the flexible material layer in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface. Huitema et al. discloses a micro light-emitting diode package structure comprising the following limitations not disclosed by Iyer et al: a first insulating layer 104 disposed between the redistribution layer 110 and the material layer 120 in a configuration of surrounding the control device 310, 320 and directly connected to the redistribution layer 110 and the side surface (of devices 200) (Fig. 5: 104, 110, 310, 320, 200, paragraph 0082, 0083). Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the claimed invention to have combined the teachings of Iyer et al. and Huitema et al. in order to have the first insulating layer of Huitema et al. disposed between the redistribution layer and the flexible material layer of Iyer et al. in a configuration of surrounding the control device and directly connected to the redistribution layer and the side surface. Doing so would electrically isolate the micro light-emitting diodes from each other and from the control device. Regarding Claim 2, Iyer et al. discloses the micro light-emitting diode package structure as claimed in claim 1, wherein the control device 510, 521 comprises a micro driver integrated circuit device, a micro control integrated circuit device, a thin film transistor device or a combination thereof (paragraph 0006, 0100). Regarding Claim 3, the combination of Iyer et al. and Huitema et al. discloses the micro light-emitting diode package structure as claimed in claim 1, wherein the first insulating layer 104 is directly connected to the flexible material layer 120 (as taught by Huitema et al. Fig. 5: electrodes). Note that when the insulating layer 104 of Huitema et al. is disposed in the package structure of Iyer et al. according to the teachings of Huitema et al., the insulating layer will be directly connected to the flexible material layer 520 of Iyer et al. PNG media_image1.png 759 1430 media_image1.png Greyscale Annotated Fig. 8 of Iyer et al. (US 20230238476 A1) Regarding Claim 8, Iyer et al. discloses the micro light-emitting diode package structure as claimed in claim 1, wherein the redistribution layer 630 has a first side on which the control device 510, 512 and the micro light-emitting diodes 430, 440, 450 are disposed (see annotated Fig. 8: first side). Regarding Claim 9, Iyer et al. discloses the micro light-emitting diode package structure as claimed in claim 3, wherein the control device 510, 512 has a back surface level with the back surface of the micro light-emitting diode 430, 440, 450 (see Fig. 5C, annotated Fig. 8: contact pad). Regarding Claim 11, unlike Iyer et al., Huitema et al. discloses the micro light-emitting diode package structure as claimed in claim 1, wherein the control device 310, 320 has a back surface, wherein the back surface of the control device 310, 320 is exposed from the first insulating layer 104. Regarding Claim 12, Iyer et al. discloses the micro light-emitting diode package structure as claimed in claim 1, further comprising: a second insulating layer 640, and a bonding pad 650 passing through the second insulating layer 640 and electrically connected to the redistribution layer 630 (see annotated Fig. 8: 640, 650, 630, paragraph 0104). Further, a person of ordinary skill in the art, using the combined teachings of Iyer et al. and Huitema et al., would have recognized that when the insulating layer 104 of Huitema et al. is disposed in the package structure of Iyer et al., the first insulating layer (104 of Huitema et al., Fig. 5) and the second insulating layer (640 of Iyer et al., Fig. 8) will be arranged on two different sides (first side and second in annotated Fig. 8 of Iyer et al.) of the redistribution layer 630. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Iyer et al. (US 20230238476 A1), in view of Huitema et al. (WO 2019168763 A1), as applied to Claim 1 above, further in view of Tu et al. (US 9018655 B2). Regarding Claim 4, the combination of Iyer et al. and Huitema et al. fails to disclose the micro light-emitting diode package structure as claimed in claim 3, wherein the plurality of micro light-emitting diodes comprises a micro light-emitting diode which has a back surface with a rough surface. However, Tu et al. discloses a micro light-emitting diode package structure, wherein the plurality of micro light-emitting diodes 200 comprises a micro light-emitting diode 200 which has a back surface 102a with a rough surface (Fig. 2E: 200, Fig 2F: 102a, column 5, lines 10-12). Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the claimed invention to have combined the teachings of Iyer et al. and Tu et al. in order to have the plurality of micro light-emitting diodes comprise a micro light-emitting diode which has a back surface with a rough surface. Doing so would improve the light extraction efficiency of the micro light-emitting diodes by minimizing total internal reflection at the back surface, as recognized by Tu et al. (column 5, lines 18-21). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Iyer et al. (US 20230238476 A1), in view of Huitema et al. (WO 2019168763 A1), as applied to Claim 1 above, further in view of Bower et al. (US 20210193631 A1). Regarding Claim 5, , the combination of Iyer et al. and Huitema et al. fails to disclose the micro light-emitting diode package structure as claimed in claim 1, further comprising: a light-shielding layer disposed between the redistribution layer and the flexible material layer, and surrounding the micro light-emitting diodes. However, Bower et al. discloses a micro light-emitting diode package structure comprising a light-shielding layer 40 disposed between the redistribution layer 30 and the flexible material layer 10, and surrounding the micro light-emitting diodes 20 (Fig. 4: 40, 30, 10, 20, paragraph 0047, 0048). Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the claimed invention to have combined the teachings of Iyer et al. and Bower et al. in order to have a light-shielding layer disposed between the redistribution layer and the flexible material layer, and surrounding the micro light-emitting diodes. Doing so would improve the contrast of micro light-emitting diodes under ambient light by absorbing visible light, as recognized by Bower et al. (paragraph 0047). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAMNA F IQBAL whose telephone number is 571-272-1587. The examiner can normally be reached M-F: 8.30 am - 5.30 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at 571-272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 07/28/2026 /Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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Prosecution Timeline

Oct 20, 2022
Application Filed
Sep 30, 2025
Non-Final Rejection mailed — §103
Dec 31, 2025
Response Filed
Apr 21, 2026
Final Rejection mailed — §103
Jul 21, 2026
Request for Continued Examination
Jul 24, 2026
Response after Non-Final Action
Aug 03, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
99%
With Interview (+20.0%)
3y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 18 resolved cases by this examiner. Grant probability derived from career allowance rate.

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