DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Embodiment of Fig. 4 (Claims 1-2, 5-13, 18-20, 23-24) in the reply filed on 01/05/2026 is acknowledged.
Claims 3-4, 14-17, 21-22 and 25 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/05/2026.
Claims 12-13 recited the limitation “a portion of any one of the second source connection portion and the second drain connection portion constitutes the first layer of the first gate electrode; and a portion of the second conductive material layer disposed on any one of the second source connection portion and the second drain connection portion constitutes the second layer of the first gate electrode” which is drawn to unelected species of Fig. 8. Therefore, claims 12-13 also have been withdrawn from further consideration as being drawn to a nonelected species of Fig. 8.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/21/2022, 03/20/2023, 01/09/2024 and 11/04/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-11, 18 and 23-24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2021/0143189).
As for claim 1, Kim et al. disclose in Fig. 16 and the related text a thin film transistor substrate comprising a first thin film transistor and a second thin film transistor on a base substrate,
wherein the first thin film transistor TR1 includes:
a first active layer 110 on the base substrate SUB;
a first conductive material layer 191/192 on the first active layer (Fig. 16); and
a first gate electrode 131 spaced apart from the first active layer and at least partially overlapping with the first active layer (Fig. 16),
the second thin film transistor TR2 includes: a second active layer 151 on the base substrate (fig. 16);
a second conductive material layer 193/194 on the second active layer (fig. 16); and
a second gate electrode 171 spaced apart from the second active layer and at least partially overlapping with the second active layer (fig. 16), the first active layer 110 being disposed between the base substrate and the second active layer (fig. 16), the second active layer 151 beings disposed between the first active layer and the second gate electrode (fig. 16), and the first gate electrode 131 being disposed on the same layer 120 as the second active layer 151 (fig. 16).
As for claim 5, Kim et al. disclose the thin film transistor substrate of claim 1, wherein each of the first and second conductive material layers 191/192 includes at least one selected from titanium (Ti), molybdenum (Mo), aluminum (Al), silver (Ag), copper (Cu), chromium (Cr), tantalum (Ta), neodymium (Nd), calcium (Ca), barium (Ba) or a transparent conductive oxide (TCO) [0091].
As for claim 6, Kim et al. disclose the thin film transistor substrate of claim 1, wherein the first active layer includes: a first channel (middle) portion; a first source (left) connection portion connected to one side of the first channel portion (Fig. 16); a first drain connection (right) portion connected to the other side of the first channel portion (Fig. 16), and the first conductive material layer 191 is disposed on the first source connection portion and the first drain connection portion, and is not disposed on the first channel portion (Fig. 16).
As for claim 7, Kim et al. disclose the thin film transistor substrate of claim 6, wherein each of the first source connection portion and the first drain connection portion is disposed between the base substrate and the first conductive material layer (Fig. 16).
As for claim 8, Kim et al. disclose the thin film transistor substrate of claim 6, wherein each of the first source connection portion and the first drain connection portion is in (electrically) contact with the first conductive material layer (Fig. 16).
As for claim 9, Kim et al. disclose the thin film transistor substrate of claim 6, wherein the second active layer 171 includes: a second channel (middle) portion; a second source connection (left) portion connected to one side of the second channel portion; a second drain connection (right) portion connected to the other side of the second channel portion (Fig. 16), and the second conductive material layer 193/194 is disposed on the second source connection portion and the second drain connection portion and is not disposed on the second channel portion (Fig. 16).
As for claim 10, Kim et al. disclose the thin film transistor substrate of claim 9, wherein each of the second source connection portion and the second drain connection portion is disposed between the first active layer and the second conductive material layer (Fig. 16).
As for claim 11, Kim et al. disclose the thin film transistor substrate of claim 9, wherein each of the second source connection portion and the second drain connection portion is in contact with the second conductive material layer (Fig. 16).
As for claim 18, Kim et al. disclose the thin film transistor substrate of claim 1, further comprising a shielding layer 172 (Kim et al. teach the conductive layer 172 has the same material as claimed invention [0107], therefore it considers as the shielding layer) disposed on the same layer as the second gate electrode 171 and overlapped with the first gate electrode 131 (Fig. 16).
As for claim 23, Kim et al. disclose the thin film transistor substrate of claim 1, wherein the first conductive material layer 191/192 does not overlap the first gate electrode (Fig. 16).
As for claim 24, Kim et al. disclose the thin film transistor substrate of claim 1, wherein the second conductive material layer 193/194 does not overlap the second gate electrode (Fig. 16).
Claim Rejections - 35 USC § 103
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Park et al. (US 11,521,552).
As for claim 2, Kim et al. disclose the thin film transistor substrate of claim 1, wherein the first gate electrode includes a first layer and a second layer on the first layer, the first layer of the first gate electrode is disposed on the same layer as the second active layer and includes a same semiconductor material as that of the second active layer, and the second layer of the first gate electrode is disposed on the same layer as the second conductive material layer and includes a same conductive material as that of the second conductive material layer.
Park et al. teach in Fig. 7 and the related text a gate electrode includes a first layer 370 and a second layer 310 on the first layer, the first layer 370 of the first gate electrode is disposed on the same layer as the second active layer 450 and includes a same semiconductor material as that of the second active layer (Fig. 7, col. 13 lines 13-23), and the second layer 310 of the first gate electrode is disposed on the same layer as the second conductive material layer 430 and includes a same conductive material as that of the second conductive material layer (Fig. 7).
Kim et al. and Yuan are analogous art because they both are directed display devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Kim et al. to include said limitations as taught by Park et al., in order to secure characteristics as the driving transistor (Park et al: col. 12 lines 41-49).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Yuan (US 2020/0105799).
As for claims 19-20, Kim et al. disclose the thin film transistor substrate of claim 1, wherein the second active layer 151 includes an oxide semiconductor material [0080],D wherein the oxide semiconductor material includes at least one of an IZO(InZnO)-based, IGO(InGaO)-based, ITO(InSnO)-based, IGZO(InGaZnO)-based, IGZTO(lnGaZnSnO)-based, GZTO(GaZnSnO)- based, GZO(GaZnO)-based, ITZO(InSnZnO)-based, or FIZO(FeInZnO)-based oxide semiconductor material [0080].
Kim et al. do not disclose the first active layer includes an oxide semiconductor material, wherein the oxide semiconductor material includes at least one of an IZO(InZnO)-based, IGO(InGaO)-based, ITO(InSnO)-based, IGZO(InGaZnO)-based, IGZTO(lnGaZnSnO)-based, GZTO(GaZnSnO)- based, GZO(GaZnO)-based, ITZO(InSnZnO)-based, or FIZO(FeInZnO)-based oxide semiconductor material.
Yuan teaches Figs. 1-2 and the related text an active layer 111 includes an oxide semiconductor material [0074], wherein the oxide semiconductor material includes at least one of an IZO(InZnO)-based, IGO(InGaO)-based, ITO(InSnO)-based, IGZO(InGaZnO)-based, IGZTO(lnGaZnSnO)-based, GZTO(GaZnSnO)- based, GZO(GaZnO)-based, ITZO(InSnZnO)-based, or FIZO(FeInZnO)-based oxide semiconductor material [0074].
Kim et al. and Yuan are analogous art because they both are directed display devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Kim et al. to use oxide semiconductor as material of the first active layer as taught by Yuan, in order to provide the effective mobility of charge or reduce dark current.
Conclusion
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/TRANG Q TRAN/Primary Examiner, Art Unit 2811