Prosecution Insights
Last updated: August 18, 2026
Application No. 17/971,448

DISPLAY DEVICE INCLUDING SEMICONDUCTOR LIGHT EMITTING DEVICE

Final Rejection §102§112
Filed
Oct 21, 2022
Priority
Oct 22, 2021 — RE PCT/KR2021/014894
Examiner
BELL, LAUREN R
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
4 (Final)
40%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
72%
With Interview

Examiner Intelligence

Grants 40% of resolved cases
40%
Career Allowance Rate
154 granted / 384 resolved
-27.9% vs TC avg
Strong +31% interview lift
Without
With
+31.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
52 currently pending
Career history
453
Total Applications
across all art units

Statute-Specific Performance

§103
43.8%
+3.8% vs TC avg
§102
16.1%
-23.9% vs TC avg
§112
35.1%
-4.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 384 resolved cases

Office Action

§102 §112
DETAILED ACTION Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-2, 17, 21-24 and 26-27 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claims 1 and 17, the limitation “the semiconductor light emitting device is electrically separated from the first assembly electrode,” does not appear to have support in the originally filed disclosure. Specifically, as best understood, “electrically separated” requires electrically isolation or a lack of electrical connection. While it is noted that while there is a cross-section showing the insulating layer 210 between the first assembly electrode 210 and the light emitting device, it cannot be ascertained if any electrical connections are or are not made between 210 and the light emitting device, e.g. an electrical connection which is into or out of the page from the cross-sectional view. Accordingly, electrical isolation or a lack of electrical connection is not supported. Regarding claims 26 and 27, the limitation “a bottom most surface of the semiconductor light emitting device is disposed on a top most surface of the second assembly electrode,” does not appear to have support in the originally filed disclosure. Specifically, while a single cross section shows the relationship, it cannot be ascertained if any further bottom surfaces or top surfaces of the elements exist which are not shown in the cross section disclosed. Note the dependent claims do not cure the deficiencies of the claims on which they depend. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-2, 17, 21-24 and 26-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 1 and 17, the limitation “the semiconductor light emitting device is electrically separated from the first assembly electrode,” is unclear as to what is required by the claim. Specifically, it is noted that there is no disclosure of “electrically separated,” and the phrase is not a term of art. As best understood, it is interpreted as requiring electrically isolation or a lack of electrical connection. Regarding claims 26 and 27, the limitations “a bottom most surface,” and a top most surface,” are unclear as to if applicant intends to claim a “bottommost” and a “topmost” or as to what is intended by “bottom most” and “top most.” Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 17, 21-24, and 26-27 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Li et al. (US 2022/0231080; herein “Li”). Regarding claims 1 and 17, Li discloses in Fig. 9E and related text a display device comprising: a first assembly electrode (e.g. UE, see [0197]) disposed on a substrate (BSL); a second assembly electrode (ALE, see [0236]) disposed on the first assembly electrode; an insulating layer (e.g. a first layer of INS1, see [0175] and [0208]) disposed between the first assembly electrode and the second assembly electrode; an assembly barrier wall (e.g. a second layer of INS1) including an assembly hole and disposed on the second assembly electrode; and a semiconductor light emitting device (LD, see [0059]) disposed in the assembly hole and electrically connected to the second assembly electrode (ALE directly connected to end of LD, see Fig. 9E), wherein the second assembly electrode comprises an electrode hole (holes in ALE, see Fig. 9E) in a region overlapping the semiconductor light emitting device, and the electrode hole exposes a portion of the insulating layer (see Fig. 9E), and wherein the semiconductor light emitting device is entirely spaced apart from the first assembly electrode (LD is spaced apart from UE) and the semiconductor light emitting device is electrically separated from the first assembly electrode (e.g. by PSV). Regarding claim 2, Li further discloses wherein a size of the electrode hole is less than a size of the semiconductor light emitting device (e.g. width, see Fig. 9E). Regarding claims 21 and 23, Li further discloses at least one portion of the first assembly electrode (UE) is configured to overlap at least one portion of the second assembly electrode (ALE) in a vertical direction. Regarding claims 22 and 24, Li further discloses a bottom surface of the second assembly electrode (ALE) is disposed higher than a top surface of the first assembly electrode (UE). Regarding claims 26 and 27, Li further discloses wherein a bottom most surface of the semiconductor light emitting device (LD) is disposed on a top most surface of the second assembly electrode (ALE) (see Fig. 9E). Response to Arguments Applicant's arguments filed 6/2/2026 have been fully considered but are moot in view of the new grounds of rejection presented above. In particular, it is noted that the claimed “first assembly electrode” is newly interpreted. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAUREN R BELL/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Show 2 earlier events
Sep 22, 2025
Response Filed
Nov 07, 2025
Final Rejection mailed — §102, §112
Jan 07, 2026
Response after Non-Final Action
Jan 27, 2026
Request for Continued Examination
Feb 03, 2026
Response after Non-Final Action
Mar 02, 2026
Non-Final Rejection mailed — §102, §112
Jun 02, 2026
Response Filed
Jul 30, 2026
Final Rejection mailed — §102, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12701831
LIGHT EMITTING DIODE PACKAGE AND LIGHT EMITTING APPARATUS COMPRISING THE SAME
5y 7m to grant Granted Aug 04, 2026
Patent 12696605
DISPLAY DEVICE AND MANUFACTURING METHOD THEREFOR
3y 6m to grant Granted Jul 28, 2026
Patent 12690222
INNER SPACER LINER FOR GATE-ALL-AROUND DEVICE
2y 7m to grant Granted Jul 21, 2026
Patent 12684905
LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY APPARATUS
2y 6m to grant Granted Jul 14, 2026
Patent 12672278
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
2y 6m to grant Granted Jun 30, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
40%
Grant Probability
72%
With Interview (+31.4%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 384 resolved cases by this examiner. Grant probability derived from career allowance rate.

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