Prosecution Insights
Last updated: April 19, 2026
Application No. 17/973,046

IMAGE SENSING DEVICE

Non-Final OA §103
Filed
Oct 25, 2022
Examiner
NETTLES, CORALIE ANN
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK Hynix Inc.
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
3y 7m
To Grant
96%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
22 granted / 30 resolved
+5.3% vs TC avg
Strong +22% interview lift
Without
With
+22.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
51 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§103
58.1%
+18.1% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
17.0%
-23.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on November 20, 2025 has been entered. Response to Amendment This Office Action is in response to Applicant's amendments filed November 20, 2025. Claim 9 has been amended. No claims have been added. Claim 11 has been canceled. Currently, claims 9, and 12-20 are pending. Response to Arguments Applicant’s arguments with respect to claim 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 9, and 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 20220013552 A1) herein after “Baek” in view of Jin (US 20180366504 A1). Regarding claim 9, Figs. 1, 14, and 16 of Baek disclose an image sensing device (Fig. 1, “an image sensor”, ¶ [0034]), comprising: a pixel array (Fig. 1, active pixel sensor array (APS) 10, ¶ [0035]) of a plurality of unit pixels configured to produce electric charge in response to incident light for imaging sensing (“The APS 10 may include a plurality of individual pixels, e.g. unit pixels arranged two-dimensionally, and may convert an optical signal into an electrical signal”, ¶ [0036]), wherein each of the plurality of unit pixels includes: a recess gate (Fig. 16, first transfer gate TG1L, a second transfer gate TG1R, ¶ [0043]) extending in a direction from a surface of the semiconductor substrate (Fig. 16, substrate 100, ¶ [0052]) to an inside of the semiconductor substrate (100); wherein, the second photoelectric conversion region (Fig. 16, photoelectric conversion regions 122 and 124, ¶ [0067]) is spaced apart from the recess gate (TG1R, TG1L), wherein, a depth between the recess gate (TG1R, TG1L) and the second photoelectric conversion region (122, 124) is determined depending on a depth of the recess gate (TG1R, TG1L) and a depth at which the second photoelectric conversion region (122, 124) is formed, wherein, in a first unit pixel (Fig. 14, first target unit pixel UPa, ¶ [0142]) and a second unit pixel (Fig. 14, second target unit pixel UPb, ¶ [0142]) that are included in the pixel array (10), wherein a depth (Fig. 16, first depth D1, ¶ [0147]) of the recess gate (TG1L) included in the first unit pixel (UPa) and measured from the surface of the semiconductor substrate (100) to a bottom surface of the recess gate (TG1L) in the first unit pixel (UPa) is greater than a depth (Fig. 16, second depth D2, ¶ [0147]) of the recess gate (TG1R) included in the second unit pixel (UPb) and measured from the surface of the semiconductor substrate (100) to a bottom surface of the recess gate (TG1R) in the second unit pixel (UPb) (“the first depth D1 at which the first transfer gate TG1L is buried from the first surface 100a of the substrate 100 may be greater than the second depth D2”, ¶ [0147]) (Each unit pixel UPa and UPb contain both TG1L and TG1R. Therefore, the Examiner is comparing TG1L in UPa with TG1R in UPb), and wherein a thickness (see Annotation 1, Fig. 16 of Baek, T1) of a second photoelectric conversion region (122) included in the first unit pixel (UPa) is smaller than a thickness (see Annotation 1, Fig. 16 of Baek, T2) of a second photoelectric conversion region (124) included in the second unit pixel (UPb). PNG media_image1.png 512 726 media_image1.png Greyscale Annotation 1, Fig. 16 of Baek Baek fails to disclose a first photoelectric conversion region disposed in a semiconductor substrate; and a second photoelectric conversion region disposed between the recess gate and the first photoelectric conversion region. In the similar field of endeavor of image sensors, Fig. 3A of Jin discloses a first photoelectric conversion region (Fig. 3A, first photoelectric conversion region 232, ¶ [0052]) disposed in a semiconductor substrate (Fig. 3A, semiconductor substrate 210, ¶ [0048]); and a second photoelectric conversion region (Fig. 3A, second photoelectric conversion region 234, ¶ [0052]) disposed between the recess gate (Fig. 3A, transfer gate structure 240, ¶ [0056]) and the first photoelectric conversion region (232). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Baek with the photoelectric conversion regions as disclosed by Jin, to concentrate the charge (see Jin, ¶ [0053]). Regarding claim 12, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, but Baek fails to disclose wherein: in each of the plurality of unit pixels, the second photoelectric conversion region is doped with impurities having a conductivity type as same as that of the first photoelectric conversion region. In the similar field of endeavor of image sensors, Fig. 3A of Jin discloses wherein: in each of the plurality of unit pixels, the second photoelectric conversion region (234) is doped with impurities having a conductivity type as same as that of the first photoelectric conversion region (232) (“The photoelectric conversion region 230 may have a second conductivity type”, ¶ [0052]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Baek with the photoelectric conversion regions as disclosed by Jin, to concentrate the charge (see Jin, ¶ [0053]). Regarding claim 13, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, and Fig. 16 of Baek further discloses wherein the recess gate (TG1R, TG1L) further includes: a gate electrode (TG1R, TG1L); and a gate insulation layer (Fig. 16, first gate dielectric layer 142, ¶ [0080]) disposed between the gate electrode (TG1R, TG1L) and the second photoelectric conversion region (122, 124). Regarding claim 14, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, and Fig. 16 of Baek further discloses wherein a first distance (see Annotation 1, Fig. 16 of Baek, F1) between the bottom surface of the recess gate (TG1R, TG1L) and the second photoelectric conversion region (122, 124) of the first unit pixel (UPa) is equal to a second distance (see Annotation 1, Fig. 16 of Baek, F2) between the bottom surface of the recess gate (TG1R) and the second photoelectric conversion region (122, 124) of the second unit pixel (UPb). Regarding claim 15, Baek and Jin together disclose the image sensing device according to claim 14 as applied above, and Fig. 16 of Baek further discloses wherein: a sum (see Annotation 1, Fig. 16 of Baek, S1) of the depth (D1) of the recess gate (TG1R, TG1L) of the first unit pixel (UPa) and the thickness (T1) of the second photoelectric conversion region (122, 124) of the first unit pixel (UPa) is equal to a sum (see Annotation 1, Fig. 16 of Baek, S2) of the depth (D2) of the recess gate (TG1R) of the second unit pixel (UPb) and the thickness (T2) of the second photoelectric conversion region (122, 124) of the second unit pixel (UPb). Regarding claim 16, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, but Baek fails to disclose wherein the first photelectric conversion regions of the first unit pixel and the second unit pixel include a first surface closer to the surface of the semiconductor substrate and a second surface opposite to the first surface. In the similar field of endeavor of image sensors, Fig. 3A of Jin discloses wherein the first photelectric conversion regions (232) of the first unit pixel (PX1) and the second unit pixel (PX2) include a first surface closer to the surface of the semiconductor substrate (210) and a second surface opposite to the first surface. It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Baek with the photoelectric conversion regions as disclosed by Jin, to concentrate the charge (see Jin, ¶ [0053]). Regarding claim 17, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, and Fig. 16 of Baek further discloses wherein the thickness of the second photoelectric conversion region (122, 124) of each of the first unit pixel (UPa) and the second unit pixel (UPb) depends on a concentration of impurities, a strength of impurity implantation, or a number of times of impurity implantations (“the impurity concentration of the first photoelectric conversion region 122 and/or the second photoelectric conversion region 124 may decrease in a direction from the first surface 100a to the second surface 100b. The potential gradient may be formed during an ion implantation process”, ¶ [0068]). Regarding claim 18, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, and Fig. 16 of Baek further discloses wherein the recess gate (TG1R, TG1L) corresponds to a transfer transistor gate included in a transfer transistor (“a first transfer gate TG1L, a second transfer gate TG1R”, ¶ [0043]). Regarding claim 19, Baek and Jin together disclose the image sensing device according to claim 9 as applied above, and Fig. 16 of Baek further discloses wherein the first unit pixel (UPa) and the second unit pixel (UPb) further comprises floating diffusion regions (Fig. 16, floating diffusion region FD1, ¶ [0076]) disposed to respectively contact the recess gates (TG1R, TG1L) of the first unit pixel (UPa) and the second unit pixel (UPb). Regarding claim 20, Baek and Jin together disclose the image sensing device according to claim 19 as applied above, and Fig. 16 of Baek further discloses wherein, in each of the first unit pixel (UPa) and the second unit pixel (UPb), a length of a channel region formed between the floating diffusion region (FD1) and the second photoelectric conversion region (122, 124) depend on a distance between the floating diffusion region (FD1) and the second photoelectric conversion region (122, 124) (“The first channel region CH1 may be formed below the first transfer gate TG1L between the first photoelectric conversion region 122 and the first floating diffusion region FD1”, ¶ [0081]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORALIE NETTLES whose telephone number is (571)270-5374. The examiner can normally be reached Mon-Fri. 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.N./Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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Prosecution Timeline

Oct 25, 2022
Application Filed
Apr 22, 2025
Non-Final Rejection — §103
Aug 04, 2025
Response Filed
Aug 15, 2025
Final Rejection — §103
Nov 20, 2025
Request for Continued Examination
Nov 25, 2025
Response after Non-Final Action
Feb 23, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
96%
With Interview (+22.2%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allow rate.

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