DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 4/29/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-5 and 26-27 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for a FET-based power stage circuit that includes first and second power stages, first and second switches and a sense amplifier, with the first and second power stages and the sense amplifier being coupled to a load terminal, does not reasonably provide enablement for a FET-based power stage circuit that includes first and second power stages, first and second switches and a sense amplifier, with only the first and second power stages being coupled to a load terminal. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to use the invention commensurate in scope with these claims.
Teachings of the Application
The application at Fig. 1A illustrates an embodiment of a system including first and second power stages 102, 162, first and second switches 160, 130, and a sense amplifier 132.
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As can be seen in Fig. 1A, the positive input 136 of sense amplifier 132 is connected to the load terminal 140. See also:
[0021] Sense FET 106 has a gate 124 coupled to gate 108 of power FET 104. Sense FET 106 has a drain 126 coupled to node 122 and a source 128 coupled to switch 130. Switch 130 couples sense FET 106 to sense amplifier 132. Sense amplifier has a first amplifier input 134, a second amplifier input 136, and an amplifier output 138. First amplifier input 134 is coupled to switch 130. Second amplifier input 136 is coupled to load 140 (or to a load terminal). Amplifier output 138 is coupled to transistor 142. Transistor 142 is coupled to resistor R3 144, which is coupled to ground 146. Resistor R3 and transistor 142 are also coupled to current sense amplifier 148. Current sense amplifier 148 has a first current sense amplifier input 150 coupled to a voltage reference V.sub.REF. Current sense amplifier 148 has a second current sense amplifier input 152 coupled to resistor R3 144. Current sense amplifier 148 has a current sense amplifier output 154 coupled to charge pump 114.
In other words, the application teaches that the second (positive) amplifier input 136 is connected to the load terminal 140.
Fig. 1B illustrates similar embodiment in which the positive input 136 of the sense amplifier 132 is also connected to the load terminal 140 in the same way as in Fig. 1A.
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In other words, the application teaches several embodiments of the invention in the form of complex circuits having particular structures. However, certain key elements are consistent among the embodiments, including the connection between the sense amplifier 132 and load terminal 140.
Scope of the Claims
Claim 1 has been amended to recite:
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In other words, claim 1 has been amended to no longer require, among other things, connection of the sense amplifier to the load terminal. This results in a claim scope in which the sense amplifier is not connected to the load terminal at all, which appears to be considerably broader than the scope of the disclosure. The application does not appear to teach how to use such an embodiment of the application. This supports a finding that the broad scope of the claim may not be commensurate with the teachings in the disclosure.
No Teaching of a General Case for the Full Scope of the Claims
The examiner also notes that there is no teaching of an apparatus/method with the broad scope recited in the claims. For example, there is no teaching of a general case in which the sense amplifier is not connected to the load terminal. If such a general case were contemplated or discovered by the inventors, its disclosure and a description of its operation would be expected as part of the application in order to support broad claims, such as claim 1. This is particularly true because, as discussed above, the embodiments that are disclosed in the application require fairly complex and particular structures (e.g., the particular circuitry of Figs. 1A and 1B) and corresponding operational methods. These structures and methods would be unnecessary if a general case had been known by the inventors, but the application does not include a disclosure of a general case. This supports a conclusion that the scope of the claims is not commensurate with the teachings of the application.
Undue Experimentation
The question of whether one skilled in the art could use the entire scope of the invention of claim 1 without undue experimentation is now considered in light of so-called Wands factors. See MPEP 2164.01(a). The nature of the invention is drawn to FET-based power stage circuitry. Although levels of ordinary skill and predictability in power stage circuit design are generally high, the scope of claim 1 is considerably broader than the scope of the disclosure because the claim encompasses an arrangement in which the sense amplifier is connected only to a third terminal of the second switch. No other connection to the sense amplifier is recited by the claim. At the time the application was filed, one of ordinary skill in the art would have been aware of various FET-based power stage topologies, including arrangements that include sense transistors for scaling currents and sense amplifiers for controlling current flow, for example. Although the present specification provides direction and guidance for making and using a FET-based power stage circuit that includes first and second power stages, first and second switches and a sense amplifier, with the first and second power stages and the sense amplifier being coupled to a load terminal, the specification is not understood to provide any direction or guidance regarding how to use a FET-based power stage circuit that includes first and second power stages, first and second switches and a sense amplifier, with only the first and second power stages being coupled to a load terminal. Weighing the above-identified factors, particularly the breadth of the claim with respect to the disclosure and the amount of direction and guidance provided, the examiner concludes that one skilled in the art could only use the entire scope of the claimed invention by resorting to undue experimentation. Claim 1 is therefore rejected under 35 U.S.C. 112(a) because the scope of enablement provided to one skilled in the art by the disclosure is not commensurate with the scope of protection sought by the claims. Because none of dependent claims 2-5 and 26-27 appear to address this deficiency, claims 2-5 and 26-27 are rejected under 35 U.S.C. 112(a), scope of enablement, by virtue of their dependence from claim 1.
Allowable Subject Matter
Claims 6-20 and 28 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL R MILLER whose telephone number is (571)270-1964. The examiner can normally be reached 9AM-5PM EST M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak, can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANIEL R MILLER/Primary Examiner, Art Unit 2858
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