Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-2, 4-5 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. (US 2021/0043616, hereinafter Jung) in view of Komiya (US 2006/0244695, hereinafter Komiya).
With respect to claim 1, Jung discloses a manufacturing method of an electronic device (Para 0028; and 0074; manufacturing method of electronic devices), comprising: providing a tuning element substrate (101 of Fig. 6) having a circuit layer (Para 0085; 0090-TFT driver circuit equivalent to a circuit layer) disposed on a substrate (103) and a plurality of tuning elements disposed on the circuit layer (Para 0090; A light emitting diode (LED) 300 configured to supply light to the corresponding sub-pixel may be provided for each sub-pixel. A thin film transistor (TFT) driver circuit configured to drive the LED 300 may include a switching transistor 200′, a driving transistor 200, and a capacitor 201, wherein according to applicant’s specs tuning elements may comprise of capacitors and resistors); testing a first variation of an electrical property of each of the tuning elements (Para 0124; After transferring the LED to the backplane, a test may be performed to identify whether the LED is defective. LEDs are defective when the electrical properties vary from the expected ones and emit abnormal light); and analyzing the first variation of the electrical property of each of the tuning elements (Para 0124; As a result of the test, when there is a defect such as a case in which the LED transferred to the backplane does not emit light normally, a repair inorganic LED corresponding to the defective LED may be mounted on the backplane).
Jung does not explicitly disclose applying a first reverse bias voltage to the tuning elements, so as to test the electrical property.
In an analogous art, Komiya discloses applying a first reverse bias voltage to the tuning elements, so as to test the electrical property (Abstract – reverse bias voltage applied to LED to check if the LED is defective).Therefore, It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung’s method/system by having Komiya’s disclosure in order to improve the reliability of semiconductor devices by identifying the defective devices and taking the corrective measures.
With respect to claim 2, Jung discloses wherein after the first variation of the electrical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired (Para 0017; 0024; and 0124-0125).
With respect to claim 4, Jung discloses wherein providing a processing chip electrically connected to the tuning elements (Para 0089 – chip).
With respect to claim 5, Jung does not explicitly disclose applying a second reverse bias voltage to the tuning elements, so as to test a second variation of the electrical property of each of the tuning elements.
In an analogous art, Komiya discloses applying a second reverse bias voltage to the tuning elements, so as to test a second variation of the electrical property of each of the tuning elements (Para 0019; 0021; and 0085 – second reverse bias transistor to supply reverse bias voltage).Therefore, It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung’s method/system by having Komiya’s disclosure in order to improve the reliability of semiconductor devices by identifying the defective devices and taking the corrective measures.
With respect to claim 8, Jung does not explicitly disclose wherein the step of applying the first reverse bias voltage to the tuning elements comprises providing a signal to the tuning elements by a testing device.
In an analogous art, Komiya discloses wherein the step of applying the first reverse bias voltage to the tuning elements comprises providing a signal to the tuning elements by a testing device (Para 0021-0022; 0038-0039; and 0059). Therefore, It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung’s method/system by having Komiya’s disclosure in order to improve the reliability of semiconductor devices by identifying the defective devices and taking the corrective measures.
With respect to claim 9, Jung discloses wherein the testing device comprises a light emitting element, a high-pressure capacitor, a radio-frequency transmitter, a radio- frequency receiver, or a combination thereof (Para 0006 ; 0012-0013– LED).
With respect to claim 10, Jung discloses wherein the signal provided by the testing device comprises an optical signal, an electrical signal, a radio-frequency signal, or a combination thereof (Para 0087 – data signal is an electrical signal).
Claims 3, and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Jung/Komiya in view of Elberbaum (US 2011/0110673, hereinafter Elberbaum).
With respect to claim 3, Jung/Komiya does not explicitly disclose placing a package layer on the tuning elements.
In an analogous art, Elberbaum discloses placing a package layer on the tuning elements (Para 0007; 0027 and 0092). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Komiya’s method/system by having Elberbaum’s disclosure in order to protect the device during processing.
With respect to claim 6, Jung/Komiya does not explicitly disclose wherein the processing chip is configured to receive the second variation, convert the second variation to electrical data, and store the electrical data.
In an analogous art, Elberbaum discloses wherein the processing chip is configured to receive the second variation, convert the second variation to electrical data, and store the electrical data (Para 0025; 0033; 0105; 0123). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Komiya’s method/system by having Elberbaum’s disclosure in order to analyze the test results to take the corrective measures.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Jung/Komiya in view of Shida (US 2014/0346971, hereinafter Shida).
With respect to claim 7, Jung/Komiya does not explicitly disclose wherein after the first variation of the electrical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired before the second reverse bias voltage is applied.
In an analogous art, Shida discloses wherein after the first variation of the electrical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired before the second reverse bias voltage is applied (Para 0008; 0010; 0067-0068). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Komiya’s method/system by having Shida’s disclosure in order to analyze the test results to take the corrective measures.
Claims 11-12, 14, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. (US 2021/0043616, hereinafter Jung) in view of Esfahlani et al. (US 2023/0058694, hereinafter Esfahlani).
With respect to claim 11, Jung discloses a manufacturing method of an electronic device (Para 0028; and 0074; manufacturing method of electronic devices), comprising: providing a tuning element substrate (101 of Fig. 6) having a circuit layer (Para 0085; 0090-TFT driver circuit equivalent to a circuit layer) disposed on a substrate (103) and a plurality of tuning elements disposed on the circuit layer (Para 0090; A light emitting diode (LED) 300 configured to supply light to the corresponding sub-pixel may be provided for each sub-pixel. A thin film transistor (TFT) driver circuit configured to drive the LED 300 may include a switching transistor 200′, a driving transistor 200, and a capacitor 201, wherein according to applicant’s specs tuning elements may comprise of capacitors and resistors); testing a first variation of an optical property of each of the tuning elements (Para 0124; After transferring the LED to the backplane, a test may be performed to identify whether the LED is defective. LEDs are defective when the optical properties vary from the expected ones and emit abnormal light); and analyzing the first variation of the optical property of each of the tuning elements (Para 0124; As a result of the test, when there is a defect such as a case in which the LED transferred to the backplane does not emit light normally, a repair inorganic LED corresponding to the defective LED may be mounted on the backplane).
Jung does not explicitly disclose applying a first forward bias voltage to the tuning elements, so as to test the optical property.
In an analogous art, Esfahlani discloses applying a first forward bias voltage to the tuning elements, so as to test the optical property (Para 0019- 0020; 0064). Therefore, It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung’s method/system by having Esfahlani’s disclosure in order to improve the reliability of semiconductor devices by identifying the defective devices and taking the corrective measures.
With respect to claim 12, Jung discloses wherein after the first variation of the electrical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired (Para 0017; 0024; and 0124-0125).
With respect to claim 14, Jung discloses applying a second forward bias voltage to the tuning elements, so as to test a second variation of the optical property of each of the tuning elements (It’s obvious to have multiple times testing to improve the reliability of a semiconductor device).
With respect to claim 17, Jung does not explicitly disclose wherein the step of applying the first forward bias voltage to the tuning elements comprises receiving a signal from the tuning elements by a testing device.
In an analogous art, Esfahlani discloses wherein the step of applying the first forward bias voltage to the tuning elements comprises receiving a signal from the tuning elements by a testing device (Para 0040; 0056 and 0060). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung’s method/system by having Esfahlani’s disclosure in order to improve the reliability of semiconductor devices by identifying the defective devices and taking the corrective measures.
With respect to claim 18, Jung discloses wherein the testing device comprises a high-pressure capacitor, a light emitting element, a photosensitive element, or a combination thereof (Para 0006; 0012-0013– LED).
With respect to claim 19, Jung discloses wherein the signal received from the tuning elements comprises an optical signal, an electrical signal, or a combination thereof (Para 0087 – data signal is an electrical signal).
Claims 13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Jung/Esfahlani in view of Elberbaum (US 2011/0110673, hereinafter Elberbaum).
With respect to claim 13, Jung/Esfahlani does not explicitly disclose placing a package layer on the tuning elements.
In an analogous art, Elberbaum discloses placing a package layer on the tuning elements (Para 0007; 0027 and 0092). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Esfahlani’s method/system by having Elberbaum’s disclosure in order to protect the device during processing.
With respect to claim 15, Jung/Esfahlani does not explicitly disclose wherein the processing chip is configured to receive the second variation, convert the second variation to electrical data, and store the electrical data.
In an analogous art, Elberbaum discloses wherein the processing chip is configured to receive the second variation, convert the second variation to electrical data, and store the electrical data (Para 0025; 0033; 0105; 0123). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Esfahlani’s method/system by having Elberbaum’s disclosure in order to analyze the test results to take the corrective measures.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Jung/Esfahlani in view of Yamazaki (US 2002/0181276, hereinafter Yamazaki).
With respect to claim 16, Jung/Esfahlani does not explicitly disclose wherein after the first variation of the optical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired before the second forward bias voltage is applied.
In an analogous art, Yamazaki discloses wherein after the first variation of the optical property of each of the tuning elements is analyzed and one or more of the tuning elements are determined to be defective through the test, the defective one or more of the tuning elements are repaired before the second forward bias voltage is applied (Para 01116). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Esfahlani’s method/system by having Yamazaki’s disclosure in order to improve the reliability of a semiconductor device by performing corrections before the failure propagates.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Jung/Esfahlani in view of Hirokubo (US 2015/0346479, hereinafter Hirokubo).
With respect to claim 20, Jung/Esfahlani does not explicitly disclose wherein the first variation of the optical property comprises a variation of a wavelength, a variation of a vibration amplitude, a variation of light intensity, or a combination thereof.
In an analogous art, Hirokubo discloses wherein the first variation of the optical property comprises a variation of a wavelength, a variation of a vibration amplitude, a variation of light intensity, or a combination thereof (Para 0154 – wavelength). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung/Esfahlani’s method/system by having Hirokubo’s disclosure in order to improve the reliability of a semiconductor device by performing corrections by testing different parameters.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
MOHAMMAD M. CHOUDHRY
Primary Examiner
Art Unit 2816
/MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899
Prosecution Insights