DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-16 in the reply filed on 10/21/25 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takizawa(USPGPUB DOCUMENT: 2016/0365320, hereinafter Takizawa) in view of Takizawa (USPGPUB DOCUMENT: 2016/0322274, hereinafter Takizawa-274).
Re claim 1 Takizawa discloses in Fig 2A/B a semiconductor device, comprising: a first semiconductor chip(16/17); a metal base plate(11) which is rectangular in a plan view of the semiconductor device, has a joining region(X1/X2/X3/X4)[0024] disposed on a front surface thereof, and has a first center line(center line of 15a/15b) that is parallel to a pair of first sides which face each other and in a middle so as to be interposed between the pair of first sides; a first joining member(left/right 12a); and a first insulated circuit board(14b) including a first insulated board(13) that is rectangular in the plan view, a first circuit pattern(14b1/14b2/14b3) that is formed on a front surface of the first insulated board(13) and has the first semiconductor chip(16/17) joined thereto, and a first metal plate(left/right14a) that is formed on a rear surface of the first insulated board(13) and joined to the joining region(X1/X2/X3/X4)[0024] by the first joining member(left/right 12a), wherein the first joining member(left/right 12a): joins the metal base plate(11) and the first metal plate(left/right14a),
Takizawa does not disclose has a fillet formed so as to flare outwardly from an outer peripheral end portion of the first metal plate(left/right14a), and part of a first edge portion(edge of left/right 12a) of the first joining member(left/right 12a), which is located away from the first center line(center line of 15a/15b), is provided with a first stress relieving region, the first joining member(left/right 12a) having plural regions including the first stress relieving region, that contain voids, a density of the voids contained in the first stress relieving region being higher than densities of the voids contained in others of the plural regions of the first joining member(left/right 12a).
Takizawa-274 disclose in Fig 7 a fillet (outermost portion of 4) formed so as to flare outwardly from an outer peripheral end portion(21) of the first metal plate(2), and part of a first edge portion of the first joining member(4), which is located away from the first center line(center line of 15a/15b of Takizawa), is provided with a first stress relieving region (warped region of 21)[0054], the first joining member(left/right 12a of Takizawa) having plural regions including the first stress relieving region(warped region of 21)[0054], that contain voids (22c/22cb),
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Takizawa-274 to the teachings of Takizawa in order to have improvement in the reliability of the joining material [0010, Takizawa-274]. In doing so, a density of the voids(22c/22cb of Takizawa-274) contained in the first stress relieving region being higher than densities of the voids contained in others of the plural regions of the first joining member(left/right 12a of Takizawa).
Re claim 2 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein in the plan view, the first semiconductor chip(16/17) is joined to the first circuit pattern(14b1/14b2/14b3) on the front surface in a region that is not a region positioned above the first stress relieving region.
Re claim 3 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein in the plan view, the first circuit pattern(14b1/14b2/14b3) includes a non-overlapping region and an overlapping region that is positioned above the first stress relieving region and extends to the first edge portion(edge of left/right 12a), the non-overlapping region being a region of the first circuit pattern(14b1/14b2/14b3) other than the overlapping region, and the first semiconductor chip(16/17) is joined to the non- overlapping region and is not joined to the overlapping region.
Re claim 4 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein in the plan view, the first insulated circuit board(14b) further includes another circuit pattern(14b1/14b2/14b3) formed in a region of the first insulated board(13) that is positioned above the first stress relieving region.
Re claim 5 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the metal base plate(11) has a second center line(center line of 15a/15b) that is perpendicular to the pair of first sides, parallel to a pair of second sides that face each other, and interposed in a middle between the pair of second sides, and the plural regions of the first joining member(left/right 12a) that contain voids further include a second stress relieving region at a second edge portion(edge of left/right 12a) that is away from the second center line(center line of 15a/15b), a density of the voids contained in the second stress relieving region being higher than densities of the voids contained in others of the plural regions aside from the first stress relieving region.
Re claim 6 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 5, wherein the first insulated circuit board(14b) is also disposed on the metal base plate(11) so as to be centered on the second center line(center line of 15a/15b), and the second stress relieving region is disposed at an other second edge portion(edge of left/right 12a) that face the second edge portion(edge of left/right 12a), the second edge portion(edge of left/right 12a) and the other second edge portion(edge of left/right 12a) being parallel to the pair of second sides.
Re claim 7 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 5, wherein the voids contained in at least one of the first stress relieving region or the second stress relieving region include a void that extends inwardly from the first edge portion(edge of left/right 12a) or the second edge portion(edge of left/right 12a) of the first joining member(left/right 12a).
Re claim 8 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein a thickness of the first joining member(left/right 12a) is less at the first edge portion(edge of left/right 12a) than at a portion above the first center line(center line of 15a/15b).
Re claim 9 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein at least one of the metal base plate(11) or the first insulated circuit board(14b) is warped, for warpage of the metal base plate(11), the metal base plate(11) is warped with a rear surface of the metal base plate(11) down, so as to be downwardly convex centered on the first center line(center line of 15a/15b), and for warpage of the first insulated circuit board(14b), the first insulated circuit board(14b) is warped with the front surface of the first insulated circuit board(14b) being up, so as to be upwardly convex centered on a position above the first center line(center line of 15a/15b).
Re claim 10 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the metal base plate(11) has a plurality of the joining region(X1/X2/X3/X4)[0024]s, which are formed in a plurality of columns, and which have line symmetry about the first center line(center line of 15a/15b) and are aligned along a pair of facing second sides that are perpendicular to the pair of first sides, the first insulated circuit board(14b) is provided in plurality, the plurality of insulated circuit board(14b)s being respectively joined to the joining region(X1/X2/X3/X4)[0024]s in the plurality of columns by the first joining member(left/right 12a) and including two adjacent first insulated circuit board(14b)s along the second sides, and for the two adjacent first insulated circuit board(14b)s, a width in a direction parallel to the second sides of the first stress relieving region in one of the adjacent first insulated circuit board(14b)s is wider than a width of the first stress relieving region in the other one of the adjacent first insulated circuit board(14b)s, which is closer to the first center line(center line of 15a/15b) than the one of the adjacent first insulated circuit board(14b)s.
Re claim 11 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 10, wherein the first stress relieving region of the first joining member(left/right 12a) is not disposed at an edge portion(edge of left/right 12a) that is adjacent to the first center line(center line of 15a/15b).
Re claim 12 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 10, wherein the metal base plate(11) has a second center line(center line of 15a/15b) that is parallel to the pair of second sides and is interposed in a middle between the pair of second sides, and the plurality of joining region(X1/X2/X3/X4)[0024]s in the columns are positioned in a plurality of rows along the pair of first sides and have line symmetry across the second center line(center line of 15a/15b), the first insulated circuit board(14b)s are respectively joined by the first joining member(left/right 12a) to the joining region(X1/X2/X3/X4)[0024]s in the plurality of rows, and the first joining member(left/right 12a) includes the plural regions, including a second stress relieving region at a second edge portion(edge of left/right 12a) that is away from the second center line(center line of 15a/15b), that contain voids, a density of the voids contained in the second stress relieving region being higher than densities of the voids contained in others of the plural regions of the first joining member(left/right 12a) aside from the first stress relieving region.
Re claim 13 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the joining region(X1/X2/X3/X4)[0024] of the metal base plate(11) is provided in a center of the metal base plate(11) as a first joining region(X1/X2/X3/X4)[0024], and the metal base plate(11) further has a pair of second joining region(X1/X2/X3/X4)[0024]s that are arranged adjacent to respective ones of both sides of the first joining region(X1/X2/X3/X4)[0024] so as to have line symmetry about the first center line(center line of 15a/15b), and the first stress relieving region of the first joining member(left/right 12a) is provided at an entire peripheral edge portion(edge of left/right 12a) thereof including the first edge portion(edge of left/right 12a), the semiconductor device further comprising: a pair of second semiconductor chip(16/17)s; a pair of second joining member(left/right 12a)s; a pair of second insulated circuit board(14b)s each including a second insulated board(13) that is rectangular in the plan view, a second circuit pattern(14b1/14b2/14b3) that is formed on a front surface of the second insulated board(13) and has a respective one of the second semiconductor chip(16/17)s joined thereto, and a second metal plate(2)[0019] that is formed on a rear surface of the second insulated board(13) and joined to a respective one of the second joining region(X1/X2/X3/X4)[0024]s via a respective one of the second joining member(left/right 12a)s, wherein each of the second joining member(left/right 12a)s: joins the metal base plate(11) and the second metal plate(2)[0019], and has a fillet formed so as to flare outwardly from an outer peripheral end portion of the second metal plate(2)[0019], each of the second joining member(left/right 12a)s having plural regions, including a second stress relieving region at a first edge portion(edge of left/right 12a) that is away from the first center line(center line of 15a/15b) and at a pair of second edge portion(edge of left/right 12a)s, containing voids, a density of the voids contained in the second stress relieving region being higher than densities of voids contained in others of the plural regions of the second joining member(left/right 12a).
Re claim 14 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the first insulated circuit board(14b) and the first joining member(left/right 12a) each are provided in a plurality of two, the joining region(X1/X2/X3/X4)[0024] of the metal base plate(11) includes a pair of row joining region(X1/X2/X3/X4)[0024]s, each of which includes one of the first joining region(X1/X2/X3/X4)[0024] at a center of the metal base plate(11) and a pair of second joining region(X1/X2/X3/X4)[0024]s that are arranged adjacent to respective ones of both sides of the one of the first joining region(X1/X2/X3/X4)[0024]s so as to have line symmetry about the first center line(center line of 15a/15b), and the first metal plate(left/right14a)s of respective ones of the first insulated circuit board(14b)s are joined to respective ones of the first joining region(X1/X2/X3/X4)[0024]s of the row joining region(X1/X2/X3/X4)[0024]s by respective ones of the first joining member(left/right 12a)s, each first joining member(left/right 12a) further includes an other first edge portion(edge of left/right 12a) and a second edge portion(edge of left/right 12a), and the first stress relieving region of each first joining member(left/right 12a) is provided at the first edge portion(edge of left/right 12a), the other first edge portion(edge of left/right 12a), and the second edge portion(edge of left/right 12a) that is away from a second center line(center line of 15a/15b) that is parallel to a pair of second sides that are perpendicular to the pair of first sides and is interposed in a middle between the pair of second sides, the semiconductor device further comprising: a plurality of second semiconductor chip(16/17)s; a plurality of second joining member(left/right 12a)s; a plurality of second insulated circuit board(14b)s each including a second insulated board(13) that is rectangular in the plan view, a second circuit pattern(14b1/14b2/14b3) that is formed on a front surface of the second insulated board(13) and has one of the second semiconductor chip(16/17)s joined thereto, and a second metal plate(2)[0019] that is formed on a rear surface of the second insulated board(13) and joined to a respective one of the second joining region(X1/X2/X3/X4)[0024]s via a respective one of the second joining member(left/right 12a)s, wherein each of the second joining member(left/right 12a)s: joins the metal base plate(11) and the second metal plate(2)[0019], and has a fillet formed so as to flare outwardly from an outer peripheral end portion of the second metal plate(2)[0019], each of the second joining member(left/right 12a)s having plural regions, including a second stress relieving region at a first edge portion(edge of left/right 12a) that is away from the first center line(center line of 15a/15b) and at a second edge portion(edge of left/right 12a) that is away from the second center line(center line of 15a/15b), that contain voids, a density of the voids contained in the second stress relieving region being higher than densities of the voids contained in others of the plural regions of the second joining member(left/right 12a).
Re claim 15 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the first joining member(left/right 12a) is solder.
Re claim 16 Takizawa and Takizawa-274 disclose the semiconductor device according to claim 1, wherein the metal base plate(11) further includes protruding portions, which are integrally formed therewith, and are respectively formed at corner portions of the joining region(X1/X2/X3/X4)[0024] of the metal base plate(11).
Conclusion
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812