Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments directed to the newly amened claims filed 2/5/2026 have been fully considered but they are not persuasive.
Applicant argues that Chung fails to disclose a bilayer metal arrangement incorporating via elements. However, Chung explicitly discloses a "metal layer" that includes a "primary layer" and an "anti-reflection coating", note that both are metals and in combination meet the scope of the common definition of bilayer metal. This structural combination constitutes a bilayer arrangement. Furthermore, Chung discloses that the "via is considered to be the foundation" for the metal layer. The physical integration of the tungsten plug and the Al-Cu bilayer in Chung meets the "incorporating" limitation, as the two components form a singular conductive path within the interconnect level.
Regarding Claims 8 and 15:
Applicant argues that the "cap dielectric" lateral extensions and the "T-shaped bridge" are not found in the prior art. However, these geometric features are inherent results of standard manufacturing. As noted in the previous Office Action, "wiring layers are understood in the art to be complex and include numerous rows and shapes". The use of a dielectric layer as an "etch stop layer" with an overlay margin is a routine design choice to ensure structural integrity. Similarly, the "T-shaped" geometry is the predictable physical result of a wider metal line contacting a narrower via plug.
Accordingly, the rejections under 35 U.S.C. §§ 102 and 103 are maintained.
Prior Art of Record
The applicant's attention is directed to additional pertinent prior art cited in the accompanying PTO-892 Notice of References Cited, which, however, may not be currently applied as a basis for the following rejections. While these references were considered during the examination of this application and are deemed relevant to the claimed subject matter, they are not presently being applied as a basis for rejection in this Office action. The pertinence of these documents, however, may be revisited, and they may be applied in subsequent Office actions, particularly in light of any amendments or further clarification of the claimed invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 & 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chung et al. (US 5858875 A).
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CLAIM 1. Chung et al. disclose a semiconductor structure comprising:
a first level of interconnect wiring (e.g. first metal lines 224 – fig. 12); and
a second level of interconnect wiring having a bilayer metal (i.e. metal lines are commonly known to be “bilayer”, as secondary layers are commonly used for barrier, adhesion, etc to provide known benefits. The Ti/TaN barrier layer in combination with the primary conductive material form a bilayer structure.) arrangement (e.g. Al-Cu metal line 218– fig. 12) incorporating via elements (Plug), as a first layer and trench elements as a second layer that is disused directly above the first layer (Chung et al. fig. 12),
the second level of interconnect wiring electrically connected to the first level of interconnect wiring (Chung et al. fig. 12).
CLAIM 8. Chung et al. disclose a semiconductor structure comprising:
a first level of interconnect wiring (Chung et al. fig. 12); and
a second level of interconnect wiring (Chung et al. fig. 12) having a bilayer metal arrangement (e.g. barrier layer/primary metal) incorporating via elements (Plug) and a cap dielectric material 222 disposed directly above the via elements (The cap material 222 is depicted directly above the via/plugs in a vertical direction.), the cap dielectric material having lateral edges that extend beyond a width of the via elements (e.g. plugs) (Chung et al. fig. 12 – As the lines extend past the edges of the via, the structure as shown in Chung meets the broad scope of the claim language.), the second level of interconnect wiring electrically connected to the first level of interconnect wiring (Chung et al. fig. 12).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-7, 9-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chung et al. in view of Kang et al. (US 20230019790 A1).
CLAIM 2. Chung et al. disclose a semiconductor structure of claim 1, however may not explicitly depict wherein the bilayer metal arrangement of the second level of interconnect wiring includes a first row of bilayer metals and a second row of bilayer metals disposed over the first row of bilayer metals. It is at least obvious if not implicitly understood, a second level may include a second or more rows. Wiring layers are understood in the art to be complex and include numerous rows and shapes. For support see Kang et al. figure 15 below.
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A person of ordinary skill in the art (POSITA), upon reviewing Kang et al., would have found it obvious to modify the structures of Chung et al. to include varying patterns or numbers of rows in the metal levels because these are recognized in the art as mere design choices or routine optimizations. The prior art (Kang et al. and Chung et al.) collectively shows that integrated circuits can be fabricated with various metal layer configurations. MPEP § 2144.04 provides guidance that such modifications are considered obvious if the general conditions are disclosed in the prior art and the selection involves only routine experimentation to find the optimal or workable parameters, such as specific dimensions or arrangements, without producing unexpected results or a different function. Therefore, a POSITA would have been motivated to implement different numbers of rows as a straightforward matter of design discretion to achieve desired performance characteristics (e.g., routing, density, speed, power consumption) without any undue experimentation or inventive effort.
CLAIM 3. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 2, wherein the second row of bilayer metals directly contacts the first row of bilayer metals (Chung fig. 12 & Kang fig. 15- Note: the language does not exclude the use of the via for a direct electrical contact as understood from the language of the parent claim. ).
CLAIM 4. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 2, wherein spacers are formed adjacent the first row of bilayer metals (Chung et al. fig. 12 – Metal lines/vias may have adjacent sidewall spacers .).
CLAIM 5. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 2, Chung et al. is silent upon wherein a first metal layer of the first and second rows of bilayer metals includes ruthenium (Ru), however Kang et al. teaches Ru is a known metal for the purpose, and further is commonly used with the same barrier layer material (Ti/TaN) as used in Chung et al. As such, Ru would be a obvious material for selection in the device of Chung et al. as a functional equivalent known for the purpose. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select RU, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
CLAIM 6. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 5, wherein a second metal layer of the first and second rows of bilayer metals includes tantalum nitride (TaN) or titanium nitride (TiN) (Both Chung et al. and Kang et al. TaN and TiN [Ti/TaN] are a conventional barrier metal used when forming metallization levels in semiconductor devices.).
CLAIM 7. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 1, wherein the first level of interconnect wiring has a first pattern and the second level of interconnect wiring has a second pattern, the first and second patterns being different from each other (Chung fig. 12 and Kang et al. fig. 15 – Both references depict “different” patterns. Further, a simple change in the shape or patterning of features constitutes an obvious modification for a person of ordinary skill in the art (POSITA), provided no unexpected results are achieved. MPEP § 2144.04 guidance supports this, stating that routine modifications like altering the shape or proportions of a prior art device are considered obvious design choices unless they produce a new or unexpected function or benefit not previously disclosed.)
CLAIM 9. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 8, wherein the cap dielectric material isolates a first bilayer metal from a second bilayer metal (Chung et al. fig. 12 – The dielectric cap 222 on the lower level in the cross sectional view is located between the upper bilayer and lower bilayer thus meets the implied structure of the functional language of the claim.).
CLAIM 10. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 8, wherein the second level of interconnect wiring further includes a metal bridge (Figures 1-3 of Chung et al. disclose a structure capable of "bridge" wiring. It would be an obvious modification for a person of ordinary skill in the art (POSITA) to implement a bridge shape/pattern in the metalization level because a simple change in shape, as guided by the prior art, is a mere design choice. PEP § 2144.04 confirms that routine modifications like altering shape or proportions are obvious unless they produce new or unexpected results or benefits not previously disclosed. Implementing the bridge pattern is a predictable application of known techniques, within the scope of routine design choices for a POSITA.).
CLAIM 11. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 8, wherein spacers are formed adjacent a first metal layer and a second metal layer of the bilayer metal arrangement (Chung et al. fig. 12 – Metal lines/vias may have adjacent sidewall spacers.).
CLAIM 12. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 11, Chung et al. is silent upon wherein the first metal layer of the bilayer metal arrangement includes ruthenium (Ru), however Kang et al. teaches Ru is a known metal for the purpose, and further is commonly used with the same barrier layer material (Ti/TaN) as used in Chung et al. As such, Ru would be a obvious material for selection in the device of Chung et al. as a functional equivalent known for the purpose. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select RU, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
CLAIM 13. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 12, wherein the second metal layer of the bilayer metal arrangement includes tantalum nitride (TaN) or titanium nitride (TiN) (Both Chung et al. and Kang et al. TaN and TiN [Ti/TaN] are a conventional barrier metal used when forming metallization levels in semiconductor devices.).
CLAIM 14. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 8, wherein the first level of interconnect wiring has a first pattern and the second level of interconnect wiring has a second pattern, the first and second patterns being different from each other (Chung fig. 12 and Kang et al. fig. 15 – Both references depict “different” patterns. Further, a simple change in the shape or patterning of features constitutes an obvious modification for a person of ordinary skill in the art (POSITA), provided no unexpected results are achieved. MPEP § 2144.04 guidance supports this, stating that routine modifications like altering the shape or proportions of a prior art device are considered obvious design choices unless they produce a new or unexpected function or benefit not previously disclosed.)
CLAIM 15. Chung et al. in view of Kang et al. disclose a semiconductor structure comprising:
a first level of interconnect wiring (Chung et al. fig. 12 – See Regarding claim 1); and
a second level of interconnect wiring having (Chung et al. fig. 12 – See Regarding claim 1) a bilayer metal (Chung et al. fig. 12 – e.g. primary metal and barrier layers) arrangement incorporating via elements plug and a metal bridge (Chung et al. figs. 1-3 – See regarding claim 10), disposed between adjacent via elements, the metal bridge having lateral edges that extend into top portions of the adjacent via elements to form a T-shaped structure (Chung et al. figs. 1-3 – The crossing of metal lines over vias predictably creates T-shape structures, which are routine, characteristic features of metallization wiring. Consequently, this layout is a well-known, trivial design convention to a PHOSITA.)
the second level of interconnect wiring electrically connected to the first level of interconnect wiring (Chung et al. fig. 12 – See Regarding claim 1).
CLAIM 16. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 15, wherein the metal bridge directly contacts the bilayer metal arrangement (Chung et al. figs. 1-3 & 12 – See Regarding claim 10).
CLAIM 17. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 15, Chung et al. is silent upon wherein the first metal layer of the bilayer metal arrangement includes ruthenium (Ru), however Kang et al. teaches Ru is a known metal for the purpose, and further is commonly used with the same barrier layer material (Ti/TaN) as used in Chung et al. As such, Ru would be a obvious material for selection in the device of Chung et al. as a functional equivalent known for the purpose. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select RU, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
CLAIM 18. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 17, wherein a second metal layer of the bilayer metal arrangement includes tantalum nitride (TaN) or titanium nitride (TiN) (Both Chung et al. and Kang et al. TaN and TiN [Ti/TaN] are a conventional barrier metal used when forming metallization levels in semiconductor devices.).
CLAIM 19. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 15, wherein the first level of interconnect wiring has a first pattern and the second level of interconnect wiring has a second pattern, the first and second patterns being different from each other (Chung fig. 12 and Kang et al. fig. 15 – Both references depict “different” patterns. Further, a simple change in the shape or patterning of features constitutes an obvious modification for a person of ordinary skill in the art (POSITA), provided no unexpected results are achieved. MPEP § 2144.04 guidance supports this, stating that routine modifications like altering the shape or proportions of a prior art device are considered obvious design choices unless they produce a new or unexpected function or benefit not previously disclosed.)
CLAIM 20. Chung et al. in view of Kang et al. disclose a semiconductor structure of claim 15, wherein the metal bridge extends from the first level of interconnect wiring to the second level of interconnect wiring (Chung et al. figs. 1-3 & 12 – See Regarding claim 10).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARRETT J STARK whose telephone number is (571)272-6005. The examiner can normally be reached 8-4 M-F.
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JARRETT J. STARK
Primary Examiner
Art Unit 2822
2/24/2026
/JARRETT J STARK/Primary Examiner, Art Unit 2898