Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kang et al. (US 2008/0203529, hereinafter Kang).
With respect to claim 1, Kang discloses a semiconductor device (Fig. 3), comprising:
a first electrode (110);
a second electrode (150);
a tetragonal seed layer (120; Para 0026-0027; 0062) disposed between the first electrode and the second electrode (120 is between 110 and 150);
a first tetragonal hafnium oxide layer (132 – Para 0041-0042) disposed between the first electrode and the tetragonal seed layer (132 is between 110 and 120); and
a second tetragonal hafnium oxide layer (134- Para 0041-0042) disposed between the second
electrode and the tetragonal seed layer (134 is between 120 and 150).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Kang.
With respect to claim 4, Kang discloses the semiconductor device of claim 1.
Kang in the same embodiment does not explicitly disclose a leakage blocking layer disposed between the second tetragonal hafnium oxide layer and the second electrode.
In another embodiment Kang discloses a leakage blocking layer disposed between the second tetragonal hafnium oxide layer and the second electrode (Para 0069 – Fig. 9B&C).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s first embodiment by having disclosure from second embodiment in order to reduce current leakage.
With respect to claim 14, Kang discloses the semiconductor device of claim 1.
In the same embodiment, Kang does not explicitly disclose a first zirconium oxide layer disposed between the first electrode and the first tetragonal hafnium oxide layer; and a second zirconium oxide layer disposed between the second electrode and the second tetragonal hafnium oxide layer.
In another embodiment, Kang discloses a first zirconium oxide layer disposed between the first electrode and the first tetragonal hafnium oxide layer (Fig. 9B-9C- There are multiple repetitions of layer 120 wherein 120 comprises of zirconium oxide -Para 0027; 0068- any layer 120 between 110 and 130 can be a first tetragonal hafnium oxide layer); and a second zirconium oxide layer disposed between the second electrode and the second tetragonal hafnium oxide layer (Fig. 9B-9C- There are multiple repetitions of layer 120 wherein 120 comprises of zirconium oxide -Para 0027; 0068- any layer 120 between 130 and 150 can be a second tetragonal hafnium oxide layer). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s first embodiment by having disclosure from second embodiment in order to reduce current leakage.
With respect to claim 15, Kang discloses the semiconductor device of claim 14.
Kang further discloses wherein the first and second zirconium oxide layer includes a tetragonal zirconium oxide layer (Para 0028).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Choi et al. (US 2013/0130465, hereinafter Choi).
With respect to claim 5, Kang discloses the semiconductor device of claim 4.
Kang does not explicitly disclose wherein the leakage blocking layer
includes an aluminum-containing material or a beryllium-containing material.
In an analogous art, Choi discloses wherein the leakage blocking layer
includes an aluminum-containing material or a beryllium-containing material (Para 0062-0063). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Choi’s disclosure in order to manufacture a device having a reduced leakage of the current.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Tao et al. (US 2015/0076437, hereinafter Tao).
With respect to claim 6, Kang discloses the semiconductor device of claim 1.
Kang does not explicitly disclose a thermal source layer disposed between the second tetragonal hafnium oxide layer and the second electrode.
In an analogous art, Tao discloses a thermal source layer (Para 0029; 108 of Fig. 1 – according to applicant’s specs thermal source layer can comprise of TiN) disposed between the second tetragonal hafnium oxide layer (106 – Para 0028) and the second electrode (110). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Tao’s disclosure in order to control the capacitance stability.
With respect to claim 7, Kang/Tao discloses the semiconductor device of claim 6.
Kang does not explicitly disclose wherein the thermal source layer includes a conductive material.
In an analogous art, Tao discloses wherein the thermal source layer includes a conductive material (Para 0029; 108 of Fig. 1 – according to applicant’s specs thermal source layer can comprise of TiN). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Tao’s disclosure in order to control the capacitance stability.
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Kil et al. (US 2007/0223176, hereinafter Kil).
With respect to claim 8, Kang discloses the semiconductor device of claim 1.
Kang does not explicitly disclose an interface control layer disposed between the second tetragonal hafnium oxide layer and the second electrode.
In an analogous art, Kil discloses an interface control layer disposed between the second tetragonal hafnium oxide layer and the second electrode (Para 0038; 0051; 0066 – aluminum oxide alloyed layer works as interface control layer – according to applicant’s spec interface control layer can be aluminum oxide). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Kil’s disclosure in order to protect the dielectric from degrading.
With respect to claim 9, Kang/Kil discloses the semiconductor device of claim 8.
Kang does not explicitly disclose wherein the interface control layer
includes a material having higher electronegativity than the first and second tetragonal
hafnium oxide layer.
In an analogous art, Kil discloses wherein the interface control layer
includes a material having higher electronegativity than the first and second tetragonal
hafnium oxide layer (Para 0038; 0051; 0066 – aluminum oxide alloyed layer works as interface control layer – according to applicant’s spec interface control layer can be aluminum oxide, it’s implied that aluminum oxide has higher electronegativity than hafnium oxide). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Kil’s disclosure in order to protect the dielectric from degrading.
With respect to claim 10, Kang/Kil discloses the semiconductor device of claim 8.
Kang does not explicitly disclose that wherein the interface control layer
includes titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon oxide,
tin oxide, germanium oxide, molybdenum dioxide, molybdenum trioxide, iridium oxide,
ruthenium oxide, nickel oxide or combinations thereof.
In an analogous art, Kil discloses wherein the interface control layer
includes titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon oxide,
tin oxide, germanium oxide, molybdenum dioxide, molybdenum trioxide, iridium oxide (Para 0038; 0051; 0066 – aluminum oxide). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Kil’s disclosure in order to protect the dielectric from degrading.
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Gosavi et al. (US 2020/0212193, hereinafter Gosavi).
With respect to claim 12, Kang discloses the semiconductor device of claim 1.
Kang does not explicitly disclose wherein the first and second
tetragonal hafnium oxide layer are doped with a crystallization promoting dopant.
In an analogous art, Gosavi discloses wherein the first and second
tetragonal hafnium oxide layer are doped with a crystallization promoting dopant (Para 0059). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Gosavi’s disclosure in order to improve the dielectric capability of hafnium oxide.
With respect to claim 13, Kang/Gosavi discloses the semiconductor device of claim 12.
Kang does not explicitly disclose wherein the crystallization
promoting dopant includes strontium (Sr), lanthanum (La), gadolinium (Gd), aluminum
(Al), silicon (Si), yttrium (Y), zirconium (Zr), niobium (Nb), bismuth (Bi), germanium
(Ge), dysprosium (Dy), titanium (Ti), cerium (Ce), magnesium (Mg), nitrogen (N) or
combinations thereof.
In an analogous art, Gosavi discloses wherein the crystallization
promoting dopant includes strontium (Sr), lanthanum (La), gadolinium (Gd), aluminum
(Al), silicon (Si), yttrium (Y), zirconium (Zr), niobium (Nb), bismuth (Bi), germanium
(Ge), dysprosium (Dy), titanium (Ti), cerium (Ce), magnesium (Mg), nitrogen (N) or
combinations thereof (Para 0059 – Si, Al). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Gosavi’s disclosure in order to improve the dielectric capability of hafnium oxide.
Claims 16 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Lee et al. (US 2004/0188850, hereinafter Lee).
With respect to claim 16, Kang discloses a capacitor (Figs. 5-6 Para 0005), comprising:
a first electrode (110);
a second electrode (150);
a first tetragonal seed layer (lower layer 120) disposed between the first electrode and the second electrode (lower layer 120 is between 110 and 150);
a second tetragonal seed layer (there are multiple repetitions of layer 120) disposed between the first tetragonal seed layer and the second electrode (upper layer 120 is between lower layer 120 and 150);
a first tetragonal hafnium oxide layer (lower layer 130 -Para 0027-0028; 0037; and 0046) disposed between the first electrode and the first tetragonal seed layer (lower layer 130 is between 110 and lower layer 120);
a second tetragonal hafnium oxide layer (there are multiple repetitions of layer 130) disposed between the second electrode and the second tetragonal seed layer (upper layer 130 can be between any upper layer 120 and 150);
a first tetragonal zirconium oxide layer disposed between the first electrode and
the first hafnium oxide layer (Fig. 9B-9C- There are multiple repetitions of layer 120 wherein 120 comprises of zirconium oxide -Para 0027; 0068- any layer 120 between 110 and 130 can be a first tetragonal hafnium oxide layer; and a second tetragonal zirconium oxide layer disposed between the second electrode and the second hafnium oxide layer (Fig. 9B-9C- There are multiple repetitions of layer 120 wherein 120 comprises of zirconium oxide -Para 0027; 0068- any layer 120 between 130 and 150 can be a second tetragonal hafnium oxide layer).
Kang does not explicitly disclose a doping layer disposed between the first tetragonal seed layer and the second tetragonal seed layer.
In an analogous art, Lee discloses a doping layer disposed between the first tetragonal seed layer and the second tetragonal seed layer (Para 0018 and claim 17). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang’s device by having Lee’s disclosure in order to optimize the mechanical, chemical and electrical interface of a semiconductor device.
Claims 17 is rejected under 35 U.S.C. 103 as being unpatentable over Kang/Lee in view of Chen et al. (US 2012/0156889, hereinafter Chen).
With respect to claim 17, Kang/Lee discloses the capacitor of claim 16.
Kang discloses wherein the first and second tetragonal seed layer includes tetragonal zirconium oxide (Para 0027 and 0068).
Kang/Lee does not explicitly disclose wherein the doping layer includes aluminum doped-tetragonal zirconium oxide.
In an analogous art, Chen discloses wherein the doping layer includes aluminum doped-tetragonal zirconium oxide (Para 0053).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang/Lee’s device by having Chen’s disclosure in order to improve the insulating properties of the dielectric layer.
Allowable Subject Matter
Claims 2, 11 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 3, and 19-20 are objected because of their dependency on claims 2 and 18 respectively.
With respect to claim 2, none of the prior art on record disclose or render obvious the claimed limitations including “a lower tetragonal seed layer; an upper tetragonal seed layer; and 15 a tetragonal doping layer disposed between the lower tetragonal seed layer and the upper tetragonal seed layer, wherein the tetragonal doping layer has a thickness not to separate crystal grains of the lower seed layer and crystal grains of the upper seed layer ” when considered as a whole along with all of the limitations of the base claim and any intervening claims.
With respect to claim 11, none of the prior art on record disclose or render obvious the claimed limitations including “a leakage blocking layer disposed between the second tetragonal hafnium oxide layer and the second electrode; 10 a thermal source layer disposed between the leakage blocking layer and the second electrode; and an interface control layer disposed between the leakage blocking layer and the thermal source layer” when considered as a whole along with all of the limitations of the base claim and any intervening claims.
With respect to claim 18, none of the prior art on record disclose or render obvious the claimed limitations including “a leakage blocking layer disposed between the second tetragonal zirconium oxide layer and the second electrode; and an interface control layer disposed between the leakage blocking layer and the second electrode”.
when considered as a whole along with all of the limitations of the base claim and any intervening claims.
Conclusion
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/MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899