DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
RE: the rejection of claim(s) 1-2, 4, 11-12, 14, and 19-20 under 35 USC 103, Applicant’s arguments and/or amendments have been fully considered but are not persuasive as discussed hereafter.
Applicant argues According to the Office Action, the second electrode 160 in Yang is equivalent to the Applicant's transparent conductive layer. (Office Action p. 5). Applicant respectfully submits that Yang's second electrode is not the same as Applicant's claimed transparent conductive oxide layer. As established in the present application, "the optically transparent layer may act as a protective layer for the metallic contact layers and prohibit a laser's interaction with the metallic layers" and "the optically transparent layer comprises zinc oxide (ZnO)". (Specification at [0037]). Moreover, "a cathode layer, or n-type contact...may comprise...an n-contact material selected from one or more of silver (Ag) and aluminum (AI). (Id. at [0062]). In other words, both Applicant's cathode layer and Yang's second electrode disclose overlapping metal materials and both serve as n-type electrodes, which is not true of Applicant's transparent conductive layer.
Applicant appears to argue features in the instant specification not present in the claims. Though understanding the claim language may be aided by explanations contained in the written description, it is important not to import into a claim limitations that are not part of the claim, see MPEP 2111.01.
Applicant further argues Yang discloses a separate transparent electrode that is not the second electrode, stating "[i]n an implementation, a transparent electrode may be further formed between the first electrode and the first semiconductor pattern, which may include, e.g., indium tin oxide (ITO)." (Yang at [0058]). Yang even states "[a] transparent electrode may be further formed between the second electrode and the second semiconductor pattern", illustrating that the second electrode may be deposited on top of the transparent electrode. (Id. at [0070], emphasis added). In other words, the second electrode of Yang cannot equate to the transparent conductive layer of the present application because the second electrode and the transparent electrode of Yang are two separate entities that exist in the same device.
However, Yang does not teach away from the proposed modification, i.e., modifying the second electrode 160 to be a transparent conductive layer.
Applicant further argues Not only is the second electrode not equivalent to Applicant's transparent conductive layer, but the transparent electrode in Yang also does not read on the transparent conductive layer in the present disclosure.
However, the transparent electrode in Yang is not relied upon to reject the claim limitations involving the claimed transparent conductive layer.
Applicant further argues Additionally, Yang does not disclose conformal deposition of the transparent conductive layer, nor does Yang disclose uniform coating of the layer.
However, Yang discloses an electrode 160 is formed conformally, [0067]. Further, while Yang does not explicitly disclose 160 is transparent, Lee is relied upon to modify the electrode 160 to be a transparent conductive layer. Further the word “uniform” is not present in any claim. Accordingly, this word cannot be given patentable weight.
Applicant further argues Moreover, as illustrated in annotated Applicant FIG.2, the cathode layer fills the trench. Specifically, "the spacer layer is formed in the trench adjacent to the transparent conductive layer" and "a cathode layer, or an n-type contact, is deposited in the trench directly adjacent to/on top of the spacer layer". (Specification at [0072] and [0074]) and FIG. 2). According to Yang, "a substrate may be bonded to the insulating layer 180 having the first and second contact plugs 192 and 194 therein, and the base substrate may be upended using the substrate". (Yang at [0074]). In other words, Yang does not disclose a spacer layer and cathode layer that fill the trenches of the device.
However, in Yang, the spacer layer 180 and the layer 194 fill the trench formed by 110 and mesas formed by 115, 125 and 135. Kim is relied upon to modify 194 to be a cathode layer.
Applicant further argues Additionally, the present application describes an "improved, more uniform, and reproducible fabrication process for monolithic LED arrays that require laser lift-off for substrate removal by removing the laser lift-off laser's interaction with metallic layers". (Specification at [0036], emphasis added). Yang does not disclose a transparent conductive layer that is configured to prevent a laser's interaction with a cathode layer, or other metallic layer, during laser lift-off.
Applicant appears to argue features (e.g., laser interaction, laser lift-off) in the instant specification not present in the claims. Though understanding the claim language may be aided by explanations contained in the written description, it is important not to import into a claim limitations that are not part of the claim, see MPEP 2111.01.
Applicant further argues The Office Action relies upon Lee and Kim as allegedly remedying the deficiencies of Yang in this regard. (Id.). Lee relates to a semiconductor light emitting device and a method of manufacturing the same. (Lee at [0002]). Kim relates to a light- emitting diode and a display device including the same. (Kim at [0002]). Neither Lee nor Kim, however, disclose, teach, or suggest a transparent conductive layer that is deposited directly and conformally on the on the at least one side wall and on the bottom surface of the trench, a transparent conductive layer that comprises zinc oxide (ZnO), a cathode layer that fills the trench, or a transparent conductive layer that is configured to prevent a laser's interaction with a cathode layer, or other metallic layer, during laser lift-off. Thus, neither Lee nor Kim remedy the deficiencies of Yang.
However Applicant is arguing references individually rather than the combination presented in the Office Action. Lee is relied upon to modify the conformal electrode 160 in Yang to be a transparent conductive layer or a zinc oxide layer. Kim is relied upon to modify the layer 194 in Yang to be a cathode layer. In combination the claimed limitations are met.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-15, 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 11 includes “depositing the spacer layer on a side surface of the transparent conductive layer” and it is unclear if this refers to the same or different side surface of the transparent conductive layer introduced in claim 1. For the purposes of examination, this will be interpreted as referring to the same side surface of the transparent conductive layer introduced in claim 1.
Claims 12-15 and 18 are rejected due to their dependency from claim 11.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 4, 11-12, 14, 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20210167248A1 (“Yang”) in view of US 20170040490 A1 (“Lee”), further in view of US20180047929A1 (“Kim”).
RE: Claim 1, Yang discloses A light emitting diode (LED) device (light emitting device in FIGs. 1-2A, 14; referencing upper portion of FIG. 14 below since this portion of FIG. 14 shows a portion of FIG. 2A flipped upside down, [0074]) comprising:
a mesa comprising semiconductor layers (FIG. 14 shows a middle mesa comprising semiconductor layers 115, 125, 135), the semiconductor layers including an N-type layer (115 has n-type conductivity, [0021]), an active layer (125), and a P-type layer (135 has p-type conductivity, [0019]), the P-type layer having a top surface and at least one side surface (FIG. 14 shows 135 has a top surface and side surface), the active layer having a top surface and at least one side surface (FIG. 14 shows 125 having a top surface and side surface), and the N-type layer having a top surface and at least one side surface (FIG. 14 shows 115 having a top surface and side surface), the mesa having a top surface and at least one side wall (FIG. 14 shows the middle mesa having a top surface and at least one left side wall), the at least one side wall formed by the N-type layer, the active layer, and the P-type layer (FIG. 14 shows the at least one left side wall of the mesa formed by 115, 125, 135), the at least one side wall defining a trench having a bottom surface (FIG. 14 shows the at least one left side wall of the middle mesa defining a trench having a bottom surface, the trench defined between the left mesa, the middle mesa, and 110);
a conductive layer (160, [0015]) directly and conformally on the at least one side wall and on the bottom surface of the trench (160 is formed conformally, [0067]; FIG. 14 shows 160 directly and conformally on 115 and 110 as 160 conforms to 115 and 110; the at least one left side wall of the mesa is formed by 115, 125, 135; Accordingly, 115 forms part of the at least one sidewall of the mesa; 110 defines the bottom surface of the trench);
a dielectric layer (155 is silicon oxide or silicon nitride, [0023]; the instant application describes these materials as being dielectric, [0054]) disposed along the side surface of the P-type layer, the side surface of the active layer, and a portion of the side surface of the N-type layer (FIG. 14 shows 155 disposed along the side surfaces of 135, 125, and along a portion of the side surface of 115), the dielectric layer disposed between the conductive layer and the side surface of the P-type layer, the side surface of the active layer, and the portion of the side surface of the N-type layer (FIG. 14 shows 155 disposed between 160 and the side surfaces of 135, 125, and the portion of the side surface of 115);
a spacer layer (180) on a side surface of the conductive layer (FIG. 14 shows 180 on a side surface of 160);
a layer (194, [0015]) on the spacer layer filling the trench (FIG. 14 shows 194 on 180; FIG. 14 shows each of 194 and 180 fill the trench defined by 110 and the left and middle mesas formed by 115, 125, 135); and
a p-type contact (192) on the top surface of the mesa.
Yang does not explicitly disclose:
the electrode 160 is a transparent conductive layer;
the contact plug 194 is a cathode layer.
However, in the same field of endeavor, Lee discloses at least one of the first and second electrodes 160 and 170 may be a transparent electrode, and for example, may be formed of indium tin oxide (ITO), aluminum zinc oxide (AZO), indium zinc oxide (IZO), zinc oxide (ZnO), [0078],
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode 160 to be made of a transparent oxide material such as zinc oxide in order to more efficiently allow light to be emitted outward from the device. The instant application describes the material zinc oxide as being transparent and conductive. Accordingly, the electrode 160 would be a transparent conductive layer.
Further, Yang discloses the contact plug 194 is in electrical contact with the electrode 160, [0072].
Accordingly, the combination of the contact plug 194 and the electrode 160, which are electrically connected to n-type semiconductor layer 115, function as an electrode for the n-type semiconductor layer 115.
In the same field of endeavor, Kim discloses a light emitting diode in FIG. 1, [0034].
Kim further discloses a first electrode 10, a second electrode 20 disposed to overlap the first electrode 10, and an emission layer 30 disposed between the first electrode 10 and the second electrode 20. A hole-transporting layer 40 is disposed between the second electrode 20 and the emission layer 30. In addition, an electron-transporting layer 50 is disposed between the first electrode 10 and the emission layer 30, and an electron-injection layer 60 is disposed between the electron-transporting layer 50 and the first electrode 10, [0034].
Kim further discloses the first electrode 10 may serve as a cathode, and the second electrode 20 may serve as an anode, [0038], and according to another exemplary embodiment, the first electrode 10 may serve as the anode, and the second electrode 20 may serve as the cathode [0038].
Accordingly, before the effective filing date of the claimed invention, there was a need to determine if the electrode 194, 160 would be operated as a cathode or anode.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to operate the electrode 194 as a cathode as this would have been obvious to try since this is one solution for operating an electrode for an N-type layer identified by Kim and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 2, Yang in view of Lee, Kim discloses The LED device of claim 1, wherein the transparent conductive layer comprises zinc oxide (As modified above, 160 includes indium zinc oxide which includes zinc oxide).
RE: Claim 4, Yang in view of Lee, Kim discloses The LED device of claim 1, wherein the spacer layer comprises silicon oxide (Yang teaches silicon oxide is an insulating material, [0059] and that interlayer 180 is insulating, [0071]; Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for 180; It would have been obvious to one of ordinary skill in the art to use silicon oxide as the insulating material in insulating layer 180 since this would have been obvious to try since silicon oxide is identified by Yang as a solution for insulating material and this would have had a reasonable expectation of success, see MPEP 2143).
RE: Claim 11, Yang in view of Lee, Kim discloses A method of manufacturing light emitting diode (LED) device of claim 1, the method comprising:
depositing the plurality of semiconductor layers including the N-type layer (From Yang: 115), the active layer (125), and the P-type layer (135) on a substrate (100);
etching a portion of the semiconductor layers to form the trench and the mesa defining a pixel, the at least one mesa comprising the semiconductor layers, the top surface and the at least one side wall (In Yang: 130, 120, 110 are etched in FIGs. 3-10 to form layers 115, 125, 135 and the trench between the mesas, [0048]-[0062]; each mesa would define a pixel as each would correspond to a discrete component that, in combination with the other mesas, would emit light constituting an image; “pixel” is defined as “any of the small discrete elements that together constitute an image” by Merriam-Webster);
depositing the dielectric layer on the side surface of the P-type layer, the side surface of the active layer, and the portion of the side surface of the N-type layer (Yang FIG. 10 shows 155 deposited on the side surfaces of 135, 125 and the portion of the side surface of 115);
depositing the transparent conductive layer directly and conformally on the dielectric layer, on an exposed portion of the side surface of the N-type layer, on the top surface of the at least one mesa, and on the bottom surface of the trench (Yang discloses 160 is formed conformally, [0067]; FIGs. 12, 14 show 160 deposited directly and conformally on 155, on an exposed portion of the side surface of 115, on the top surface of the mesa formed partially by 115, and the bottom surface of the trench defined by 110 as 160 conforms to 155, 115 and 110);
depositing the spacer layer on a side surface of the transparent conductive layer (FIG. 13 shows 180 deposited on the side surface of 160);
depositing the cathode layer on the transparent conductive layer (FIG. 13 shows 194 deposited on 160); and
forming the p-type contact on the top surface of the at least one mesa (FIG. 13 shows 192 deposited on the top surface of the mesa).
RE Claim 12, Yang in view of Lee, Kim discloses The method of claim 11, wherein the transparent conductive layer comprises zinc oxide (As modified, 160 includes zinc oxide).
RE: Claim 14, Yang in view of Lee, Kim discloses The method of claim 11, wherein the spacer layer comprises silicon oxide (Yang teaches silicon oxide is an insulating material, [0059] and that interlayer 180 is insulating, [0071]; Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for 180; It would have been obvious to one of ordinary skill in the art to use silicon oxide as the insulating material in insulating layer 180 since this would have been obvious to try since silicon oxide is identified by Yang as a solution for insulating material and this would have had a reasonable expectation of success, see MPEP 2143).
RE: Claim 19, Yang discloses A light emitting diode (LED) device (light emitting device in FIGs. 1-2A, 14; referencing upper portion of FIG. 14 below since this portion of FIG. 14 shows a portion of FIG. 2A flipped upside down, [0074]) comprising:
a mesa comprising semiconductor layers (FIG. 14 shows a middle mesa comprising semiconductor layers 115, 125, 135), the semiconductor layers including an N-type layer (115 has n-type conductivity, [0021]), an active layer (125), and a P-type layer (135 has p-type conductivity, [0019]), the P-type layer having a top surface and at least one side surface (FIG. 14 shows 135 has a top surface and side surface), the active layer having a top surface and at least one side surface (FIG. 14 shows 125 having a top surface and side surface), and the N-type layer having a top surface and at least one side surface (FIG. 14 shows 115 having a top surface and side surface), the mesa having a top surface and at least one side wall (FIG. 14 shows the middle mesa having a top surface and at least one left side wall), the at least one side wall formed by the N-type layer, the active layer, and the P-type layer (FIG. 14 shows the at least one left side wall of the mesa formed by 115, 125, 135), the at least one side wall defining a trench having a bottom surface (FIG. 14 shows the at least one left side wall of the middle mesa defining a trench having a bottom surface, the trench defined between the left mesa, the middle mesa, and 110);
a dielectric layer (155 is silicon oxide or silicon nitride, [0023]; the instant application describes these materials as being dielectric, [0054]) disposed along the side surface of the P-type layer, the side surface of the active layer, a first portion of the side surface of the N-type layer, and on the top surface of the mesa (FIG. 14 shows 155 disposed along the side surfaces of 135, 125, and along a first upper portion of the side surface of 115, and along the top surface of 135 of the mesa);
a first layer (160, [0015]) directly and conformally on the dielectric layer, on a second portion of the side surface of the N-type layer, and on the bottom surface of the trench (Yang discloses 160 is formed conformally, [0067]; FIG. 14 shows 160 directly and conformally on 155, on a second lower portion of the side surface of 115, and on the top surface of 110 defining the bottom surface of the trench as 160 conforms to 155, 115 and 110), the dielectric layer disposed between the first layer and the side surface of the P-type layer, the side surface of the active layer, and the first portion of the side surface of the N-type layer (FIG. 14 shows 155 disposed between 160 and the side surfaces of 135, 125, and the first upper portion of the side surface of 115);
a spacer layer (180) on a side surface of the first layer (FIG. 14 shows 180 on a side surface of 160);
a second layer (194, [0015]) on the spacer layer filling the trench (FIG. 14 shows 194 on 180; FIG. 14 shows each of 194 and 180 fill the trench defined by 110 and the left and middle mesas formed by 115, 125, 135); and
a p-contact (192) on the top surface of the mesa.
Yang does not explicitly disclose:
the electrode 160 is a zinc oxide layer;
the contact plug 194 is a cathode layer.
However, in the same field of endeavor, Lee discloses at least one of the first and second electrodes 160 and 170 may be a transparent electrode, and for example, may be formed of indium tin oxide (ITO), aluminum zinc oxide (AZO), indium zinc oxide (IZO), zinc oxide (ZnO), [0078],
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode 160 to be made of a transparent oxide material such as zinc oxide in order to more efficiently allow light to be emitted outward from the device. The instant application describes the material zinc oxide as being transparent and conductive. Accordingly, the electrode 160 would be a transparent conductive layer.
Further, Yang discloses the contact plug 194 is in electrical contact with the electrode 160, [0072].
Accordingly, the combination of the contact plug 194 and the electrode 160, which are electrically connected to n-type semiconductor layer 115, function as an electrode for the n-type semiconductor layer 115.
In the same field of endeavor, Kim discloses a light emitting diode in FIG. 1, [0034].
Kim further discloses a first electrode 10, a second electrode 20 disposed to overlap the first electrode 10, and an emission layer 30 disposed between the first electrode 10 and the second electrode 20. A hole-transporting layer 40 is disposed between the second electrode 20 and the emission layer 30. In addition, an electron-transporting layer 50 is disposed between the first electrode 10 and the emission layer 30, and an electron-injection layer 60 is disposed between the electron-transporting layer 50 and the first electrode 10, [0034].
Kim further discloses the first electrode 10 may serve as a cathode, and the second electrode 20 may serve as an anode, [0038], and according to another exemplary embodiment, the first electrode 10 may serve as the anode, and the second electrode 20 may serve as the cathode [0038].
Accordingly, before the effective filing date of the claimed invention, there was a need to determine if the electrode 194, 160 would be operated as a cathode or anode.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to operate the electrode 194 as a cathode as this would have been obvious to try since this is one solution for operating an electrode for an N-type layer identified by Kim and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 20, Yang in view of Lee, Kim discloses The LED device of claim 19, wherein the spacer layer comprises silicon oxide (Yang teaches silicon oxide is an insulating material, [0059] and that interlayer 180 is insulating, [0071]; Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for 180; It would have been obvious to one of ordinary skill in the art to use silicon oxide as the insulating material in insulating layer 180 since this would have been obvious to try since silicon oxide is identified by Yang as a solution for insulating material and this would have had a reasonable expectation of success, see MPEP 2143).
Claim(s) 3, 13, 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, Lee, Kim, as applied to claim 2, 12, or 19 above, and further in view of US 20160005917 to Jung et al. (hereinafter “Jung”).
RE: Claim 3, Yang, in view of Lee, Kim does not explicitly disclose The LED device of claim 2, wherein the transparent conductive layer has a thickness in a range of from 10 nm to 500 nm.
However, in a similar field of endeavor, Jung teaches that wherein the first electrode includes a first ohmic contact layer contacting the first semiconductor layer and formed of a transparent conductive oxide and a first reflective layer disposed on the first ohmic contact layer, [0022]. Jung further teaches the thickness of the ohmic contact layer is 1 nm or more and less than 60 nm, [0022].
Jung teaches that The ohmic contact layer 151 may include a transparent conductive oxide, for example, at least one of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO) and gallium zinc oxide (GZO), and be formed in a single layered structure or a multi-layered structure. The ohmic contact layer 151 is formed of a transparent conductive oxide and may thus improve light reflectance and light extraction efficiency, [0077].
Accordingly, it would have been obvious to one of ordinary skill in the art to form the conductive oxide layer 160 with a thickness in the range between 10nm and 60nm as taught by Jung in order to improve light reflectance and light extraction efficiency.
RE: Claim 13, Yang in view of Lee, Kim does not explicitly disclose The method of claim 12, wherein the transparent conductive layer has a thickness in a range of from 10 nm to 500 nm.
However, in a similar field of endeavor, Jung teaches that wherein the first electrode includes a first ohmic contact layer contacting the first semiconductor layer and formed of a transparent conductive oxide and a first reflective layer disposed on the first ohmic contact layer, [0022]. Jung further teaches the thickness of the ohmic contact layer is 1 nm or more and less than 60 nm, [0022].
Jung teaches that The ohmic contact layer 151 may include a transparent conductive oxide, for example, at least one of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO) and gallium zinc oxide (GZO), and be formed in a single layered structure or a multi-layered structure. The ohmic contact layer 151 is formed of a transparent conductive oxide and may thus improve light reflectance and light extraction efficiency, [0077].
Accordingly, it would have been obvious to one of ordinary skill in the art to form the conductive oxide layer 160 with a thickness in the range between 10nm and 60nm as taught by Jung in order to improve light reflectance and light extraction efficiency.
RE: Claim 22, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 19, wherein the zinc oxide layer has a thickness in a range of from 10 nm to 500 nm.
However, in a similar field of endeavor, Jung teaches that wherein the first electrode includes a first ohmic contact layer contacting the first semiconductor layer and formed of a transparent conductive oxide and a first reflective layer disposed on the first ohmic contact layer, [0022]. Jung further teaches the thickness of the ohmic contact layer is 1 nm or more and less than 60 nm, [0022].
Jung teaches that The ohmic contact layer 151 may include a transparent conductive oxide, for example, at least one of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO) and gallium zinc oxide (GZO), and be formed in a single layered structure or a multi-layered structure. The ohmic contact layer 151 is formed of a transparent conductive oxide and may thus improve light reflectance and light extraction efficiency, [0077].
Accordingly, it would have been obvious to one of ordinary skill in the art to form the conductive oxide layer 160 with a thickness in the range between 10nm and 60nm as taught by Jung in order to improve light reflectance and light extraction efficiency.
Claim(s) 5, 15, 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, Lee, Kim as applied to claim 4, 14, or 20 above, and further in view of U.S. 20220384516A1 (“Tan”).
RE: Claim 5, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 4, wherein the spacer layer has a thickness in a range of from 10 nm to 500 nm.
However, in the same field of endeavor, Tan teaches that Dielectric layer 1460 may be, for example, a layer of SiO2. Dielectric layer 1460 may have any desired thickness. In one aspect, the dielectric layer 1460 may have a thickness greater than about 50 nm and lower than about 500 nm in a surface normal direction of the mesa sidewall surfaces, [0165].
Thus, before the effective filing date of the claimed invention, there was a need to select a thickness for dielectric layer 180 in Yang in a direction normal to the mesa sidewall surfaces.
Accordingly, it would have been obvious to one of ordinary skill in the art before
the effective filing date of the claimed invention to modify the thickness of dielectric layer 180 so it is greater than 50 nm and lower than about 500 nm since this would have been obvious to try as this is one solution provided by Tan for the thickness of a dielectric layer and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 15, Yang in view of Lee, Kim does not explicitly disclose The method of claim 14, wherein the spacer layer has a thickness in a range of from 10 nm to 500 nm.
However, in the same field of endeavor, Tan teaches that Dielectric layer 1460 may be, for example, a layer of SiO2. Dielectric layer 1460 may have any desired thickness. In one aspect, the dielectric layer 1460 may have a thickness greater than about 50 nm and lower than about 500 nm in a surface normal direction of the mesa sidewall surfaces, [0165].
Thus, before the effective filing date of the claimed invention, there was a need to select a thickness for dielectric layer 180 in Yang in a direction normal to the mesa sidewall surfaces.
Accordingly, it would have been obvious to one of ordinary skill in the art before
the effective filing date of the claimed invention to modify the thickness of dielectric layer 180 so it is greater than 50 nm and lower than about 500 nm since this would have been obvious to try as this is one solution provided by Tan for the thickness of a dielectric layer and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 21, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 20, wherein the spacer layer has a thickness in a range of from 10 nm to 500 nm.
However, in the same field of endeavor, Tan teaches that Dielectric layer 1460 may be, for example, a layer of SiO2. Dielectric layer 1460 may have any desired thickness. In one aspect, the dielectric layer 1460 may have a thickness greater than about 50 nm and lower than about 500 nm in a surface normal direction of the mesa sidewall surfaces, [0165].
Thus, before the effective filing date of the claimed invention, there was a need to select a thickness for dielectric layer 180 in Yang in a direction normal to the mesa sidewall surfaces.
Accordingly, it would have been obvious to one of ordinary skill in the art before
the effective filing date of the claimed invention to modify the thickness of dielectric layer 180 so it is greater than 50 nm and lower than about 500 nm since this would have been obvious to try as this is one solution provided by Tan for the thickness of a dielectric layer and this would have had a reasonable expectation of success, see MPEP 2143.
Claim(s) 8, 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, Lee, Kim as applied to claim 1 or 19 above, and further in view of US 20060227531 A1 (“Iou”).
RE: Claim 8, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 1, wherein the transparent conductive layer is a CVD transparent conductive layer or a sputtered transparent conductive layer.
However, in a similar field of endeavor, Iou discloses that The OLED element 220 may comprise a first electrode 212 such as a transparent electrode disposed on the substrate 210. The first electrode 212 comprises indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), or zinc oxide deposited by sputtering, electron beam (e-beam) evaporation, thermal evaporation, chemical vapor deposition (CVD), or thermal spray decomposition, [0018].
Accordingly, before the effective filing date of the claimed invention, there was a need to select the method for depositing the zinc oxide in 160 in Yang.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to deposit the zinc oxide in 160 by sputtering or chemical vapor deposition since this would have been obvious to try as both are solutions out of a finite number of solutions identified by Iou for depositing zinc oxide and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 23, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 19, wherein the zinc oxide layer is a CVD transparent conductive layer or a sputtered transparent conductive layer.
However, in a similar field of endeavor, Iou discloses that The OLED element 220 may comprise a first electrode 212 such as a transparent electrode disposed on the substrate 210. The first electrode 212 comprises indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), or zinc oxide deposited by sputtering, electron beam (e-beam) evaporation, thermal evaporation, chemical vapor deposition (CVD), or thermal spray decomposition, [0018].
Accordingly, before the effective filing date of the claimed invention, there was a need to select the method for depositing the zinc oxide in 160 in Yang.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to deposit the zinc oxide in 160 by sputtering or chemical vapor deposition since this would have been obvious to try as both are solutions out of a finite number of solutions identified by Iou for depositing zinc oxide and this would have had a reasonable expectation of success, see MPEP 2143.
Claim(s) 9, 18, 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, Lee, Kim as applied to claim 1, 11, or 19 above, and further in view of US 20180019378 A1 (“Seong”).
RE: Claim 9, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 1, wherein the cathode layer comprises one or more of silver (Ag) and aluminum (Al).
However, Lee teaches 194 is a contact plug, [0015].
In the same field of endeavor, Seong discloses The contact plug may be aluminum (Al), Al alloy, silver (Ag), Ag alloy, rhodium (Rh) or Rh alloy, [0043].
Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for the contact plug 194.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the contact plug 194 out of silver and/or aluminum since this would have been obvious to try as both are solutions out of a finite number of solutions identified by Seong for the material in a contact plug and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 18, Yang in view of Lee, Kim does not explicitly disclose The method of claim 11, wherein the cathode layer comprises one or more of silver (Ag) and aluminum (Al).
However, Lee teaches 194 is a contact plug, [0015].
In the same field of endeavor, Seong discloses The contact plug may be aluminum (Al), Al alloy, silver (Ag), Ag alloy, rhodium (Rh) or Rh alloy, [0043].
Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for the contact plug 194.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the contact plug 194 out of silver and/or aluminum since this would have been obvious to try as both are solutions out of a finite number of solutions identified by Seong for the material in a contact plug and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 24, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 19, wherein the cathode layer comprises one or more of silver (Ag) and aluminum (AI).
However, Lee teaches 194 is a contact plug, [0015].
In the same field of endeavor, Seong discloses The contact plug may be aluminum (Al), Al alloy, silver (Ag), Ag alloy, rhodium (Rh) or Rh alloy, [0043].
Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for the contact plug 194.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the contact plug 194 out of silver and/or aluminum since this would have been obvious to try as both are solutions out of a finite number of solutions identified by Seong for the material in a contact plug and this would have had a reasonable expectation of success, see MPEP 2143.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, Lee, Kim as applied to claim 1 above, and further in view of US 20210288222 (“Young”).
RE: Claim 10, Yang in view of Lee, Kim does not explicitly disclose The LED device of claim 1, wherein the semiconductor layers are epitaxial semiconductor layers having a thickness at least 1 micron.
However, in a similar field of endeavor, Young discloses semiconductor layers 104 are grown on a substrate 102. The semiconductor layers 104 according to one or more embodiments comprise epitaxial layers, III-nitride layers or epitaxial III-nitride layers, [0040].
Young further discloses that the semiconductor layers 104 comprises one or more of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium aluminum nitride (InAlN), aluminum indium gallium nitride (AlInGaN) and the like. In one or more specific embodiments, the semiconductor layers 104 comprises a p-type layer, an active region, and an n-type layer, [0042].
Young discloses that the semiconductor layers 104 have a combined thickness in a range of from about 2 μm to about 10 μm, [0045].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to grow the semiconductor layers in the mesa as epitaxial layers and to have a combined thickness in the range from 2 μm to about 10 μm as taught by Young in order to better control the orientation of the structure of the semiconductor layers and to reduce the size of the device.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MICHAEL ANGUIANO/Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899
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