DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 16-17 are objected to because of the following informalities:
Claim 16, lines 5-6 recite: “…an outer sidewall of the first dielectric layer extend in a second direction…”. It is recommended to change “extend” to “extends” for grammatical formality. Appropriate correction is required.
Claim 17 is objected to based on its dependency on claim 16.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9, lines 17-21 recite: “wherein an outer diameter of the second dielectric layer keeps consistent with an inner diameter of the first trench”. It is unclear what is meant by “keeps consistent with” since the outer diameter of the second dielectric layer 117 and the inner diameter of the first trench 1121 both vary in FIG. 2.
Claims 10-17 are rejected at least based on their dependency on claim 9.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 9-11 and 13-17, as best understood, are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cai et al. in US 2019/0109216 (hereinafter Cai).
Regarding claim 9, Cai teaches in FIG. 1 and related text, a split-gate MOSFET, comprising:
a semiconductor layer of a first dopant type (101, [0011]);
a first trench (see annotated FIG .1) extending from an upper surface of the semiconductor layer (101) to an interior of the semiconductor layer (101), a second trench (annotated FIG. 1) communicated with a bottom of the first trench, wherein the first trench and the second trench extend in a same direction (north/south in FIG. 1);
a first dielectric layer (102, [0012]) covering an inner surface of the second trench, a second dielectric layer (114, [0013]) covering an inner surface of the first trench, and a third dielectric layer (105, [0012]) between the first dielectric layer (102) and the second dielectric layer (108);
a first conductor (104, [0012]) located in the second trench and a second conductor (109, [0012]) located in the first trench, wherein the first conductor (104) is isolated from the semiconductor layer (101) by the first dielectric layer (102), the second conductor (109) is isolated from the semiconductor layer (101) by the second dielectric layer (114; noting if 114 were not present between second conductor 109 and source electrode 116, second conductor 109 would be in electrical contact with the semiconductor layer 101), and the first conductor (104) is isolated from the second conductor (109) by the third dielectric layer (105);
and a body region of a second dopant type (111, [0013]) which is located in the semiconductor layer (101) and adjacent to the first trench,
wherein an outer diameter of the second dielectric layer (114) keeps consistent with an inner diameter of the first trench (“consistent” is interpreted as “constant”, and d1 as labeled in annotated FIG. 1 below is constant), and an outer diameter (d2, annotated FIG. 1) of the first dielectric layer (102) keeps consistent with an inner diameter of the second trench (annotated FIG. 1 shows this limitation inasmuch as Applicant’s FIG. 2 does; d2 is constant in the majority of the second trench), and an outer (d1, annotated FIG. 1) diameter of a top portion of the second dielectric layer (114) is larger than an outer diameter (d2, annotated FIG. 1) of a top portion of the first dielectric layer (102).
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Regarding claim 10, Cai teaches the split-gate MOSFET according to claim 9. Cai further teaches wherein the inner diameter of the first trench gradually increases from bottom to top (the inner diameter at the bottom of the first trench in the annotated Fig. 1 above increases from bottom to top in a non-abrupt, i.e. gradual, manner).
Regarding claim 11, Cai teaches the split-gate MOSFET according to claim 9. Cai further teaches wherein an inner diameter of a bottom of the first trench (see annotated FIG. 1 below) is smaller than an inner diameter of a top of the first trench (annotated FIG. 1), and an inner diameter of the second trench (annotated FIG. 1) substantially keeps consistent with the inner diameter of the bottom of the first trench (“substantially keeps consistent with” is interpreted extending for some length while maintaining a constant and similar diameter to the inner diameter of the bottom of the first trench, noting the claim does not require the two inner diameters be the same).
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Regarding claim 13, Cai teaches the split-gate MOSFET according to claim 9. Cai teaches further comprising: a source region of the first dopant type (113, [0013]) in the body region (111); an interlayer dielectric layer (part of 114) on the source region (113); and a source electrode (116, [0013]) located on the interlayer dielectric layer (114).
The limitations "a second dielectric layer…" as recited in claim 1 followed by “an interlayer dielectric layer…” in claim 14 are considered product-by-process limitations. “[E]ven though product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). In the instant case, forming the second dielectric layer and interlayer dielectric layer as claimed does not produce a final structure that is distinct from a structure in which the second dielectric layer and interlayer dielectric layer are formed as a single layer.
Regarding claim 14, Cai teaches the split-gate MOSFET according to claim 9. Cai teaches further comprising: a body contact region of the second dopant type (112, [0013]) in the body region (111); and a conductive channel (115, [0013]) penetrating the interlayer dielectric layer (portion of 114) and the source region (113) to reach the body contact region (112), wherein the source electrode (116) is connected to the body contact region (112) via the conductive channel (115).
Regarding claim 15, Cai teaches the split-gate MOSFET according to claim 9. Cai teaches further comprising: a semiconductor substrate (121, [0010]) located on a lower surface of the semiconductor layer (101), wherein the upper surface of the semiconductor layer (101) is opposite to the lower surface of the semiconductor layer (102); and a drain electrode (122, [0011]) located on the lower surface of the semiconductor substrate (121).
Regarding claim 16, Cai teaches the split-gate MOSFET according to claim 9. Cai further teaches wherein an outer sidewall of the second dielectric layer (114, sidewall in the middle region of the first trench, see annotated FIG. 1 below) extends in a first direction which is not perpendicular to the upper surface of the semiconductor layer (101; outer sidewall of 114 in middle region has curvature), to make the outer diameter of the top portion (annotated FIG. 1) of the second dielectric layer (114) larger than an outer diameter of a bottom portion of the second dielectric layer (114); and an outer sidewall (d2, see annotated FIG. 1 in the rejection of claim 1) of the first dielectric layer (102) extend in a second direction (north/south in FIG. 1) which is different from the first direction (diagonal in annotated FIG. 1).
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Regarding claim 17, Cai teaches the split-gate MOSFET according to claim 16. Cai further teaches wherein the second direction (north/south in FIG. 1) is perpendicular to the upper surface of the semiconductor layer (101).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim 12, as best understood, is rejected under 35 U.S.C. 103 as being unpatentable over Cai et al. in US 2019/0109216 (hereinafter Cai).
Regarding claim 12, Cai teaches the split-gate MOSFET according to claim 9. Cai does not explicitly state wherein a thickness of the first dielectric layer (102; vertical thickness equaling the depth of the second trench) is greater than a thickness of the second dielectric layer (114; vertical thickness). However, it would have been obvious to one of ordinary skill in the art to have created a thickness of the first dielectric layer greater than a thickness of the second dielectric layer, in order to create the trench MOSFET device of Cai. Additionally, it is noted although the drawings are not to scale, they may be relied upon for what they would reasonably teach one of ordinary skill in the art when interpreted in view of the specification. (MPEP 2125(II); In re Wright, 569 F.2d 1124, 1127-28, 193 USPQ 332, 335-36 (CCPA 1977)).
Response to Arguments
Applicant’s remarks on page 9 in the reply filed on 07/02/2025 in regarding the status of the claims in the Instant Application are acknowledged. Applicant requests in the first paragraph of page 9 a rejoinder of claims 1-8 which were previously withdrawn per the restriction requirement mailed on 01/16/2025.
In response, claims 1-8 remain withdrawn since claims 9-17 are rejected in the Instant Office Action.
Applicant’s remarks on page 9 regarding drawing objections made in the Non-Final Office Action mailed on 03/26/2025 (hereinafter previous Office Action) are acknowledged.
In response, the Examiner finds the replacement drawing sheets acceptable and hereby withdraws those drawing objections in the Instant Office Action. However, new drawing objections are noted in the Instant Office Acton.
Applicant’s remarks on page 9 regarding claim objections made in the previous Office Action are acknowledged.
In response, the Examiner finds the amendment to claim 9 acceptable to remedy the informality and hereby withdraws the objection in the Instant Office Action. However, new claim objections are noted in the Instant Office Acton.
Applicant’s arguments on pages 9-13 regarding the rejections made under 35 USC 102 in the previous Office Action are acknowledged. Specifically, Applicant argues on page 13 the Cai reference fails to teach “an outer diameter of a top portion of the second dielectric layer is larger than an outer diameter of a top portion of the first dielectric layer (wherein the outer diameter of the second dielectric layer keeps consistent with the inner diameter of the first trench, and the outer diameter of the first dielectric layer keeps consistent with the inner diameter of the second trench”.
In response, the Examiner finds this argument non persuasive. As explained in the Instant Office Action, Cai does teach the above quoted limitation when reference character 114 is interpreted as the second dielectric layer.
Applicant’s arguments on pages 10-14 regarding dependent claims 10-17 are acknowledged. Applicant specifically argues on page 10 “… since the base claim 9 is allowable, the dependent claims 10-17 are also allowable…”.
In response, the Examiner finds this argument moot since claim 9 does not contain allowable subject matter. Additionally, Applicant does not challenge or argue any rejections of dependent claims made in the previous Office Action.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN LEE JOHNSON JR whose telephone number is (571)270-3217. The examiner can normally be reached Mon-Fri: 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/S.L.J./Examiner, Art Unit 2811
/ORI NADAV/Primary Examiner, Art Unit 2811