Prosecution Insights
Last updated: October 02, 2026
Application No. 17/989,937

SEMICONDUCTOR MEMORY DEVICE

Non-Final OA §112
Filed
Nov 18, 2022
Priority
May 31, 2022 — RE 10-2022-0066702
Examiner
PARENDO, KEVIN A
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK hynix Inc.
OA Round
3 (Non-Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
557 granted / 771 resolved
+4.2% vs TC avg
Moderate +12% lift
Without
With
+11.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
41 currently pending
Career history
794
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
19.7%
-20.3% vs TC avg
§112
28.3%
-11.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 771 resolved cases

Office Action

§112
DETAILED ACTION Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/2/26 has been entered. Election/Restrictions – NO TRAVERSE - PREVIOUS ACTION Applicant’s election without traverse to the restriction requirement mailed on 8/6/25, of species II, in the reply filed on 9/25/25 was acknowledged in a previous office action. Foreign Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim(s) 9 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant) regards as the invention. Claim 9 recites the limitation “… a distance between the line isolation structure”. The metes and bounds of the claimed limitation can not be determined for the following reasons: a distance needs two reference points for its clear definition (e.g. a distance between A and B), whereas the claim has only set forth one point of reference (“the line isolation structure”) for the claimed distance. Thus, it is unclear what other end point referred to in the limitation. Allowable Subject Matter Claim(s) 1-8 and 21-26 is/are allowed. The following is an examiner’s statement of reasons for allowance: the prior art does not explicitly teach, or reasonably suggest as obvious to one of ordinary skill in the art, an invention having all of the limitations of claim 1 or claim 21 including: (claim 1) a first vertical structure having a sidewall in contact with the first stack structure, the first vertical structure including a first memory layer and a first channel pattern; a first bit line contact structure on the first vertical structure; a first bit line overlapping with the first bit line contact structure, and an isolation structure between the first channel pattern and the second channel pattern, wherein the first bit line contact structure has a shape which is widened toward the first bit line, wherein the first bit line contact structure comprises a same material as the first channel pattern, wherein a sidewall of the first channel pattern is in contact with the isolation structure, and wherein a sidewall of the first bit line contact structure (230a) is connected to the sidewall of the first channel pattern. (claim 21) a first vertical structure having a sidewall in contact with the first stack structure, the first vertical structure including a first memory layer and a first channel pattern; a first bit line contact structure on the first vertical structure; a first bit line on the upper contact; and an isolation structure between the first channel pattern and the second channel pattern, wherein the first bit line contact structure and the first channel pattern include a first material, wherein the upper contact includes a second material different from the first material, wherein a sidewall of the first channel pattern is in contact with the isolation structure, and wherein a sidewall of the first bit line contact structure is connected to the sidewall of the first channel pattern. The other allowed claims each depend from one of these claims, and each is allowable for the same reasons as the claim from which it depends. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant's arguments with respect to the pending claims have been considered but are moot in view of the new ground(s) of rejection. Conclusion Conclusion / Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Parendo who can be contacted by phone at (571) 270-5030 or by direct fax at (571) 270-6030. The examiner can normally be reached Monday-Friday from 9 am to 4 pm ET. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Billy Kraig, can be reached at (571) 272-8660. The fax number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Kevin Parendo/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Show 1 earlier event
Nov 17, 2025
Non-Final Rejection (signed) — §112
Dec 23, 2025
Non-Final Rejection mailed — §112
Mar 23, 2026
Response Filed
Apr 03, 2026
Final Rejection mailed — §112
Jun 03, 2026
Response after Non-Final Action
Jul 02, 2026
Request for Continued Examination
Jul 08, 2026
Response after Non-Final Action
Jul 22, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751022
SEMICONDUCTOR DEVICE WITH MIM CAPACITOR AND METHOD FOR MANUFACTURING SAME
3y 11m to grant Granted Sep 29, 2026
Patent 12751120
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
3y 7m to grant Granted Sep 29, 2026
Patent 12733318
LIGHT EMITTING DIODE MODULE AND METHOD FOR MANUFACTURING LIGHT EMITTING DIODE MODULE
3y 9m to grant Granted Sep 08, 2026
Patent 12733166
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
3y 8m to grant Granted Sep 08, 2026
Patent 12720731
CONDUCTIVE STRUCTURES
4y 0m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
84%
With Interview (+11.5%)
2y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 771 resolved cases by this examiner. Grant probability derived from career allowance rate.

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