Prosecution Insights
Prosecution Insights
Tech Center 2800 • Art Units: 2819 2823 2896
This examiner grants 72% of resolved cases
Kevin A. Parendo is an examiner in Tech Center 2800 and Art Unit 2819, with 771 resolved cases. His allowance rate of 72.2% indicates a high probability of success for patent applicants. This 72.2% rate suggests that a majority of applications result in a grant. The 771 resolved cases provide a solid statistical basis for understanding the prosecution landscape in this art unit.
The median days to allowance for his cases is 990. This 990-day metric provides a benchmark for the time required to reach a successful resolution. For practitioners, the 990 days to allowance is an important piece of information for managing client expectations and project timelines. This 990-day figure reflects the typical pace of prosecution within Tech Center 2800 for this examiner.
The interview lift of 11.5% highlights the value of direct communication with the examiner. This 11.5% lift suggests that applications are more likely to be allowed if an interview is conducted. When combined with the 72.2% base allowance rate, the 11.5% lift underscores the effectiveness of oral advocacy. Practitioners should consider the 11.5% lift as a useful tool for managing the 771 resolved cases in Art Unit 2819.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18660324 | SEMICONDUCTOR DEVICE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18489224 | SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING SEMICONDUCTOR DEVICE | Final Rejection | Samsung Electronics Co., Ltd. |
| 18532449 | WIRING STRUCTURE OF TRANSISTOR FOR DRIVING A DISPLAY PANEL AND A DISPLAY DRIVER IC INCLUDING THE SAME | Final Rejection | LX SEMICON CO., LTD. |
| 18489076 | DISPLAY PANEL AND METHOD OF MANUFACTURING DISPLAY PANEL | Final Rejection | Samsung Display Co., Ltd. |
| 17707536 | GROOVED PACKAGE | Final Rejection | Intel Corporation |
| 18400697 | HYBRID BONDING WITH SONIC ENERGY | Non-Final OA | Adeia Semiconductor Bonding Technologies Inc. |
| 18186441 | SEMICONDUCTOR DEVICES HAVING SHIELDING ELEMENT | Non-Final OA | Yangtze Memory Technologies Co., Ltd. |
| 18702264 | IMAGING DEVICE | Non-Final OA | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18549450 | SOLID-STATE IMAGING DEVICE | Final Rejection | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18257926 | IMAGING ELEMENT AND IMAGING DEVICE | Non-Final OA | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18703499 | MICRO-NETWORK INTERCONNECTED NANOSTRUCTURES | Non-Final OA | The Regents of the University of Michigan |
| 18569162 | ELECTRON OVERFLOW OF AIGaN DEEP ULTRAVIOLET LIGHT EMITTING DIODES | Non-Final OA | THE REGENTS OF THE UNIVERSITY OF MICHIGAN |
| 18732584 | SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF | Non-Final OA | MEDIATEK INC. |
| 18044780 | METHOD OF PATTERNING A LAYER OF SUPERCONDUCTOR MATERIAL | Final Rejection | Microsoft Technology Licensing, LLC |
| 17989937 | SEMICONDUCTOR MEMORY DEVICE | Non-Final OA | SK hynix Inc. |
| 18182765 | SEMICONDUCTOR STORAGE DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE, AND SEMICONDUCTOR WAFER | Non-Final OA | Kioxia Corporation |
| 18182529 | SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Non-Final OA | Kioxia Corporation |
| 18240065 | SEMICONDUCTOR PACKAGE AND METHOD | Final Rejection | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18489172 | PHASE CHANGE RAM DEVICE AND METHOD FOR FABRICATING THE SAME | Final Rejection | Korea Advanced Institute of Science and Technology |
| 17879091 | SELECTIVE SILICIDE DEPOSITION FOR 3-D DRAM | Final Rejection | Applied Materials, Inc. |
| 18744946 | MEMORY DEVICE HAVING MEMORY CELL WITH REDUCED PROTRUSION | Non-Final OA | NANYA TECHNOLOGY CORPORATION |
| 18628587 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME | Non-Final OA | NANYA TECHNOLOGY CORPORATION |
| 18632669 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | Non-Final OA | Winbond Electronics Corp. |
| 18480996 | HIGH VOLTAGE AND HIGH-POWER DIAMOND BASED JUNCTION-GATE FIELD EFFECT TRANSISTOR (JFET) SWITCH WITH PHOTO-CONTROLLED GATE | Final Rejection | Lawrence Livermore National Security, LLC |
| 18169780 | SEMICONDUCTOR DEVICE HAVING A SUPER JUNCTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME | Final Rejection | SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
| 18413837 | LIGHT-EMITTING PACKAGE | Final Rejection | SEOUL VIOSYS CO., LTD. |
| 18755249 | METHODS OF FORMING STACKED INTEGRATED CIRCUITS USING SELECTIVE THERMAL ATOMIC LAYER DEPOSITION ON CONDUCTIVE CONTACTS AND STRUCTURES FORMED USING THE SAME | Non-Final OA | Wayne State University |
| 18149210 | PATTERNING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE | Non-Final OA | CHANGXIN MEMORY TECHNOLOGIES, INC. |
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