Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in reply to communication filed on 11/07/2025.
Response to Amendment/Argument
Applicant's arguments filed on 11/07/2025 have been fully considered but they are not persuasive. The Examiner attempted to reach Attorney for Applicant, Robert C. Kowert, Reg. #39,255, tel. 512-853-8850, via phone on January to discuss previous and current allowable subject matter, in order to expedite prosecution of the application to no avail. The current rejection is necessitated by Applicant’s amendment to the claims.
In this reply, independent claims 1, 8, and 15 have been amended to include the language of claim 4, currently cancelled, and previously objected to. The prior art of record teaches this limitation of the claim as explained below.
Claims 1-3, and 5-20 are pending and represent a system/method for Generation Neural Networks.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 7, 8, 15, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over TOMIDA et al., US 20230316071 A1, in view of SHIN et al., US 20220382976 A1.
Regarding claim 1, TOMIDA teaches the invention substantially as claimed. TOMIDA discloses: A processor (item 300), comprising: one or more circuits to generate one or more first neural networks based, at least in part, on; one or more convolutional neural network operations (par. 0004, 0041, 0088, and 0250; disclosure of claims 3, 11, and 15), and one or more memory constraints (par. 0120). However TOMIDA does not disclose a processor comprising one or more circuits to generate one or more first neural networks based, at least in part, on one or more transformer neural network operations. This feature is well-known in the art as evidenced by SHIN. In the same field of invention, SHIN teaches: “... a neural network architecture transformer performing one or more perturbations to generate a plurality of perturbed neural network architectures for a reference neural network architecture...” (SHIN, par. 0024). Note that perturbed neural networks are a specific type of neural network architectures.
Accordingly, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to substitute the Transformers of SHIN within the system of TOMIDA because the person would have realized that the remaining element would perform the same functions as before. "Omission of element and its function in combination is obvious expedient if the remaining elements performs the same functions as before." See In re Karlson (CCPA) 136 USPQ 184, decide Jan 16, 1963, Appl. No. 6857, U.S. Court of Customs and Patent Appeals. SHIN provides reason to combine by stating that the use for a generalization technique, generating and using neural network architecture with numerical vectors, to improve system optimization (SHIN, 0003, and 0004). By this rationale, claim 1 is rejected.
Regarding claims 2, 3, 5, 7, 8, 15, 19 and 20, the combination TOMIDA-SHIN teaches:
2.The processor of claim 1, wherein the one or more circuits are further to: calculate a set of values corresponding to a set of convolutional neural network operations and transformer neural network operations; and generate the one or more first neural networks based, at least in part, on the set of values (TOMIDA, par. 0054).
3. The processor of claim 1, wherein the one or more circuits are further to select the one or more convolutional neural network operations and the one or more transformer neural network operations based, at least in part, on one or more results of processing a set of images (SHIN, par. 0030, and 0048; see that the input data inherently includes images).
4. (Canceled)
5. (Original) The processor of claim 1, wherein the one or more first neural networks include one or more skip-connection operations. The Examiner takes the Office Notice that this feature is well-known in the art as evidenced by KIM, US 20220348229 A1, par. 0016 (the fusion artificial neural network generated is made of skip-connection operation).
7. (Original) The processor of claim 1, wherein the one or more first neural networks include one or more image processing neural networks (SHIN, par. 0030, and 0048; see the input neural network and that the input data inherently includes images).
8. (Currently amended) A system, comprising: one or more computers having one or more processors to generate one or more first neural networks based, at least in part, on; one or more convolutional neural network operations and one or more transformer neural network operations, and one or more memory constraints (TOMIDA, par. 0004, 0041, 0088, 0250; and par. 0120, disclosure of claims 3, 11 and 15; SHIN, par. 0024). The same motivation/reason to combine used for the rejection of claim 1 is also valid for this claim.
15. (Currently amended) A method, comprising: generating one or more first neural networks based, at least in part, on_ one or more convolutional neural network operations and one or more transformer neural network operations, and one or more memory constraints (TOMIDA, par. 0004, 0041, 0088, 0250; and par. 0120, disclosure of claims 3, 11 and 15; SHIN, par. 0024). The same motivation/reason to combine used for the rejection of claim 1 is also valid for this claim.
19. (Original) The method of claim 15, wherein the one or more transformer neural network operations comprise one or more encoder operations and one or more decoder operations (SHIN, par. 0135; TOMIDA, par. 0031 and 0033).
20. (Original) A non-transitory computer readable medium having stored thereon a set of instructions, which if performed by one or more processors, cause the one or more processors to at least perform the method of claim 15 (SHIM, par. 0135 and TOMIDA, par. 0031 and 0033).
Allowable Subject Matter
Claims 6, 9-14, 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Cancelled Claims
Claim 4 has been cancelled without prejudice or disclaimer.
CONCLUSION
THIS ACTION IS FINAL. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jude Jean-Gilles whose telephone number is 571-272-3914. The examiner can normally be reached on Mon-Fri, from 9:00AM-5:00PM.
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/JUDE JEAN GILLES/Primary Examiner, Art Unit 2459
February 1, 2026