DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-16, in the reply filed on 3/9/26 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liao, US 12,288,748, in view of Shaviv et al., US 2022/0108917.
Regarding claim 1, Liao (figure 3) teaches an integrated circuit (IC) structure comprising electrical interconnects, wherein a level of the electrical interconnects comprises:
a first via 239a in contact with a first line under (on 201 under 239a), wherein the first via 239a comprises a first electrically conductive material layer 237a/235a of a first height;
a second via 219a in contact with a second line (on 201 under 219a), wherein the second via 219a comprises the first electrically conductive material layer 217a/215a of the first height, and the second electrically conductive material layer 223a of the second height.
Liao, which only teaches a semiconductor substrate 201 which it is presumed that the vias (239a & 219a) are connected to an electrically conductive material layer on the surface thereof, fails to specifically teach a first line (on 201 under 239a) comprising a second electrically conductive material layer of a second height, and the second line (on 201 under 219a) comprises a third electrically conductive material layer of a third height.
Shaviv (figure 2F) teaches first and second lines 204a in contact with vias 214 and of an electrically conductive material having a height.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the first and second lines 204a of Shaviv in the invention of Liao because Shaviv teaches vias are necessarily connected to an electrical interconnect, such as lines 204a. An electrical connection of the vias must be made in order to conduct electrical signals though the device and lines are a commonly known and used type of electrical connection. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
With respect to claim 2, Shaviv (figure 2F) teaches the first line (left 204a) further comprises the third electrically conductive material layer 204b of the third height.
As to claim 3, Shaviv (figure 2F) teaches a height of the first via (left 214) summed with a height of the first line (left 204a) is substantially equal to a height of the second via (right 214) summed with a height of the second line (right 204a).
In re claim 4, though Liao fails to teach the first electrically conductive material layer is in direct contact with the second electrically conductive material layer and the second electrically conductive material layer is in direct contact with the third electrically conductive material layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this combination of materials in the invention of Liao because since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice (In re Leshin 125 USPQ 416).
Concerning claim 5, Shaviv (figure 2F) teaches one of the first 204a, second 214 and third 204b electrically conductive material layers has a first composition and wherein a second of the first, second and third electrically conductive material layers has a second composition, different than the first composition.
Pertaining to claim 6, Shaviv teaches the first composition comprises a first of Ru, Mo, or W (paragraph 0042) and wherein the second composition comprises a second or Ru, Mo, or W (paragraph 0043).
In claim 7, Shaviv (figure 2F) teaches the first via (left 214) or the first line (left 204a) further comprises an electrically conductive etch stop layer 206 between the first (left 204a) and second (left 214) electrically conductive material layers.
Regarding claim 8, Liao (figure 3) teaches the second via 219a or the second line (on 201 under 219a) comprises an electrically conductive etch stop layer 221 between the second 217a/215a and third 223a electrically conductive material layers.
With respect to claim 9, Shaviv teaches the first via (left 214) or the first line (left 204a) further comprises a second electrically conductive etch stop layer (paragraph 0034 states one or more etch stop layers 206) between the first and second electrically conductive material layers.
As to claim 10, Shaviv teaches the first, second and third electrically conductive material layers have a first composition (they are all electrically conductive) and the first and second etch stop layers have a second composition (they are nonconductive (paragraph 0034).
In re claim 11, wherein the first composition comprises a first of Ru, Mo, or W (paragraph 0042) and wherein the second composition comprises Ti, Ta, or a second of Ru, Mo, or W (paragraph 0043).
Concerning claim 12, Shaviv (figure 2F) a centerline of the first via (left 214) is coincident with a longitudinal centerline of the first line (left 204a), and wherein a centerline of the second via (right 214) is coincident with a longitudinal centerline of the second line (right 204a).
Pertaining to claim 13, Liao (figure 3) teaches planes coincident with an interface of each of the first (on 201), second 217a/215a and third 223a electrically conductive material layers are all substantially parallel to each other.
Claim(s) 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liao, US 12,288,748, in view of Shaviv et al., US 2022/0108917, and Lee et al., US 12,444,675.
In claim 14, Liao (figure 3) teaches an integrated circuit (IC) structure, comprising:
a device level 201 comprising semiconductor device structures; and
electrical interconnects 239a/219a coupling the semiconductor device structures into circuitry, wherein a level of the electrical interconnects comprises:
a first via 239a in contact with a first line (on 201 under 239a), wherein the first via 239a comprises a first electrically conductive material layer 237a/235a of a first height;
a second via 219a in contact with a second line (on 201 under 239a), wherein the second via 219a comprises the first electrically conductive material 215a/217a layer of the first height, and the second electrically conductive material layer 223a of the second height.
Shaviv (figure 2F) teaches first and second lines 204a in contact with vias 214 and of an electrically conductive material having a height.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the first and second lines 204a of Shaviv in the invention of Liao because Shaviv teaches vias are commonly known to be connected to lines 204a. An electrical connection of the vias must be made in order to conduct electrical signals though the device and lines are a commonly known and used type of electrical connection. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Liao fails to teach wherein a second interconnect level comprises one or more third lines over, and in contact with, the first via and the second via.
Lee (figure 2) teaches a second interconnect level 270 comprises one or more third lines 270 over, and in contact with, the first via SB2 and the second via 220.
Regarding claim 15, Lee (figure 1) teaches the first (one 210) and second lines (another 210) are substantially parallel and extend in a first direction, and wherein the one or more third lines 270 comprise a single line extending in a direction substantially orthogonal to the first direction.
With respect to claim 16, Shaviv (figure 2F) a first intervening material layer 206 is between the first 204a and second 214 electrically conductive material layers and Liao (figure 3) wherein a second intervening material layer 221 is between the second 217a/215a and third 223a electrically conductive material layers.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art teach various aspects of the invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 4/29/26
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