DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 2 in the reply filed on 8/11/25 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 9 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Huang et al (US 2017/0077158).
9. An electronic device, comprising:
a semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) having: opposite first (Fig.1A-1H (100a) and [0019]) and second sides (Fig.1B-1H (100b) and [0026]),
a first conductive routing structure (Fig.1A-1H (140) and [0021]) on the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]), and a via opening (Fig.1B-1H (190) and [0026]) extending from the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) to the second side (Fig.1B-1H (100b) and [0026]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]),
a portion of the first conductive routing structure (Fig.1A-1H (140) and [0021]) extending over the via opening (Fig.1B-1H (190) and [0026]),
a transparent cover (Fig.1A-1H (170) and [0023]) over a portion of the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]), the transparent cover (Fig.1A-1H (170) and [0023]) covering the patterned first conductive routing structure(Fig.1A-1H (140) and [0021]);
an insulator layer (Fig.1C-1H (210) and [0028]) on the second side (Fig.1B-1H (100b) and [0026]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) and along a sidewall of the via opening (Fig.1C-1H (190) and [0026 and 0028]), the insulator layer (Fig.1C-1H (210) and [0028]) including a polyimide material [0028]; and
a second conductive routing structure (Fig.1C-1H (220) and [0029]) on an outer side of the insulator layer (Fig.1C-1H (210) and [0028]), the second conductive routing structure (Fig.1C-1H (220) and [0029]) extending through the via opening (Fig.1C-1H (190) and [0026 and 0029]) and directly contacting the portion of the first conductive routing structure (Fig.1A-1H (140) and [0021]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al (US 2017/0077158) in further view of Oganesian (US 2013/0056844).
Huang teaches the following claimed limitations as cited below:
1. An electronic device, comprising:
a semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) having: opposite first (Fig.1A-1H (100a) and [0019]) and second sides (Fig.1B-1H (100b) and [0026]),
a first conductive routing structure (Fig.1A-1H (140) and [0021]) on the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]), and a via opening (Fig.1B-1H (190) and [0026]) extending from the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) to the second side (Fig.1B-1H (100b) and [0026]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]), a portion of the first conductive routing structure (Fig.1A-1H (140) and [0021]) extending over the via opening (Fig.1B-1H (190) and [0026]),
a transparent cover (Fig.1A-1H (170) and [0023]) over a portion of the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]), the transparent cover (Fig.1A-1H (170) and [0023]) covering the patterned first conductive routing structure(Fig.1A-1H (140) and [0021]);
an insulator layer (Fig.1C-1H (210) and [0028]) on the second side (Fig.1B-1H (100b) and [0026]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) and along a sidewall of the via opening (Fig.1C-1H (190) and [0026 and 0028]), the insulator layer (Fig.1C-1H (210) and [0028]) including a photo-imageable material [0028]; and
a second conductive routing structure (Fig.1C-1H (220) and [0029]) on an outer side of the insulator layer (Fig.1C-1H (210) and [0028]), the second conductive routing structure (Fig.1C-1H (220) and [0029]) extending through the via opening (Fig.1C-1H (190) and [0026 and 0029]) and directly contacting the portion of the first conductive routing structure (Fig.1A-1H (140) and [0021]).
However, Huang fails to teach the additional limitation required by claim 1 as follows: the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) having a thickness distance between the first (Fig.1A-1H (100a) and [0019]) and second sides (Fig.1B-1H (100b) and [0026]) of approximately 20 um or more and less than 150 um.
Oganesian teaches a substantially similar image sensor (Fig.1E) including the semiconductor substrate (Fig.1E (6) and [ 0017]) having a thickness distance between the first (Fig.1E (8) and [0017]) and second sides (Fig.1E (10) and [0017]) of approximately 20 um or more and less than 150 um [0017].
It would have been obvious to one of ordinary skill in the art to modify Huang’s teachings to include the thickness ranges 20 to 150 um- which values are suggested by Oganesian [0017] which teaches the openings/cavities (Fig.1E (12) would extend no further than ¾ the substrate thickness, leaving a minimum thickness at the maximum depth to be 50 um [0017-thus is it readily calculated that Oganesian suggests the thicknesses to be within the ranges of 20um and 150 um], since such thicknesses are considered known and suitable for image sensor with an underlying opening.
The remaining claimed citations are in reference to the Huang reference; they are considered obvious for the same rationale provided above for claim 1, based upon their dependency:
2. The electronic device of claim 1, wherein the first (Fig.1A-1H (140) and [0021]) and second conductive routing structures (Fig.1C-1H (220) and [0029]) include copper [0030].
3. The electronic device of claim 1, wherein the transparent cover includes glass (Fig.1A-1H (170) and [0023]).
4. The electronic device of claim 1, wherein the insulator layer includes polyimide material (Fig.1C-1H (210) and [0028]).
7. The electronic device of claim 1, further comprising a solder structure (Fig.1E-1H (280) and [0033]) attached to the second conductive routing structure (Fig.1C-1H (220) and [0029]) and extending outward from a bottom side of the electronic device (Fig.1E-1H (280) and [0033]).
8. The electronic device of claim 1, wherein the semiconductor substrate comprises a sensing area (Fig.1A-1H (120) and [0019]) exposed along the first side (Fig.1A-1H (100a) and [0019]) of the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) and spaced apart from the first conductive routing structure (Fig.1A-1H (140) and [0021]).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al (US 2017/0077158), as applied to claim 9 above, in further view of Oganesian (US 2013/0056844).
Huang teaches the limitations of claim 9 as cited above.
However, Huang fails to teach the additional limitation required by claim 10 as follows: the semiconductor substrate (Fig.1A-1H (100) and [ 0018-0019]) having a thickness distance between the first (Fig.1A-1H (100a) and [0019]) and second sides (Fig.1B-1H (100b) and [0026]) of approximately 20 um or more and less than 150 um.
Oganesian teaches a substantially similar image sensor (Fig.1E) including the semiconductor substrate (Fig.1E (6) and [ 0017]) having a thickness distance between the first (Fig.1E (8) and [0017]) and second sides (Fig.1E (10) and [0017]) of approximately 20 um or more and less than 150 um [0017].
It would have been obvious to one of ordinary skill in the art to modify Huang’s teachings to include the thickness ranges 20 to 150 um- which values are suggested by Oganesian [0017] which teaches the openings/cavities (Fig.1E (12) would extend no further than ¾ the substrate thickness, leaving a minimum thickness at the maximum depth to be 50 um [0017 thus is it readily calculated that Oganesian suggests the thicknesses to be within the ranges of 20um and 150 um], since such thicknesses are considered known and suitable for image sensor with an underlying opening.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hayashi et al (EP 2802005); Aggarwal et al (US 20240038695; US 20240038694) teach similar structures.
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/LAURA M MENZ/Primary Examiner, Art Unit 2813
10/9/25