Prosecution Insights
Last updated: April 19, 2026
Application No. 17/996,271

SOLID-STATE IMAGING ELEMENT, SENSING SYSTEM, AND CONTROL METHOD OF SOLID-STATE IMAGING ELEMENT

Non-Final OA §103
Filed
Oct 14, 2022
Examiner
AHMED, JAMIL
Art Unit
2877
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
97%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
559 granted / 683 resolved
+13.8% vs TC avg
Strong +15% interview lift
Without
With
+15.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
28 currently pending
Career history
711
Total Applications
across all art units

Statute-Specific Performance

§101
2.9%
-37.1% vs TC avg
§103
53.8%
+13.8% vs TC avg
§102
21.5%
-18.5% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 683 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections 2. Claim 5 is objected to because of the following informalities: Regarding Clam 5, line 2, change “comprising” to –comprising:--. Appropriate correction is required. CLAIM INTERPRETATION 3. The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. 4. Use of the word “means” (or “step for”) in a claim with functional language creates a rebuttable presumption that the claim element is to be treated in accordance with 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is invoked is rebutted when the function is recited with sufficient structure, material, or acts within the claim itself to entirely perform the recited function. Absence of the word “means” (or “step for”) in a claim creates a rebuttable presumption that the claim element is not to be treated in accordance with 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is not invoked is rebutted when the claim element recites function but fails to recite sufficiently definite structure, material or acts to perform that function. Claim elements in this application that use the word “means” (or “step for”) are presumed to invoke 35 U.S.C. 112(f) except as otherwise indicated in an Office action. Similarly, claim elements that do not use the word “means” (or “step for”) are presumed not to invoke 35 U.S.C. 112(f) except as otherwise indicated in an Office action. 5. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. 6. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitations use a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “a pulse signal generation section”, “a light-emitting section”, and “a pulse signal generation procedure” in claims 1, 5, 10-11 . Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. For more information, see MPEP § 2173 et seq. and Supplementary Examination Guidelines for Determining Compliance With 35 U.S.C. 112 and for Treatment of Related Issues in Patent Applications, 76 FR 7162, 7167 (Feb. 9, 2011). Claim Rejections - 35 USC § 103 7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 8. Claims 1-4 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Pub. No. 2020/0088843 A1 by Tsai (hereinafter Tsai) in view of US Patent No. 5682562 A by Mizukoshi et al. (hereinafter Mizukoshi). Regarding Claim 1, Tsai teaches a solid-state imaging element (Fig. 1) comprising: a pulse signal generation section (Fig. 1 @ 11, Par. [0028]. Also see Fig. 2 @ light emission, Par. [0028]) that is provided with an avalanche photodiode (Fig. 1 @ AD, Par. [0029]) that converts incident light including reflected light of irradiation light radiated during a predetermined light-on period into a photocurrent (Fig. 1 @ O, Par. [0028-0029]); and an up-down counter that performs one of up counting and down counting each time the pulse signal is generated during the light-on period, and performs another of the up counting and the down counting each time the pulse signal is generated during a light-off period that does not correspond to the light-on period (Fig. 1 @ 15, Par. [0049]) but does not explicitly teach multiplies the photocurrent and a quench circuit that generates a pulse signal on a basis of the multiplied photocurrent. However, Mizukoshi teaches multiplies the photocurrent and a quench circuit that generates a pulse signal on a basis of the multiplied photocurrent (Fig. 2, Fig. 3 @ 20, 70, Abstract). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tsai by Mizukoshi as taught above such that multiplies the photocurrent and a quench circuit that generates a pulse signal on a basis of the multiplied photocurrent is accomplished in order to design a quenched flash circuit for an electronic camera to decide when the film exposure is adequate, so that the flash light output can be halted at the appropriate time (Mizukoshi, Col. 1, line 5-7, 20-22). Regarding Claim 2, Tsai teaches the irradiation light includes intermittent light (Fig. 2 @ light emission, Par. [0028]). Regarding Claim 3, Tsai teaches the up-down counter includes first and second up- down counters (Fig. 1), the first up-down counter performs either the up counting or the down counting on a basis of a first clock signal having a phase difference of 0 degrees or 180 degrees from the intermittent light (Fig. 4 @ T1 (up counting), T3 (down counting), Par. [0049-0050, 0058]. T1 has a phase difference of 0 degree and T3 has a phase difference of 180 degree with respect to light emission (i.e. the intermittent light)), and the second up-down counter performs either the up counting or the down counting on a basis of a second clock signal having a phase difference of 90 degrees or 270 degrees from the intermittent light (Fig. 4 @ T2 (up counting), T4 (down counting), Par. [0049-0050, 0058]. T2 has a phase difference of 90 degree and T4 has a phase difference of 270 degree with respect to light emission (i.e. the intermittent light)). Regarding Claim 4, Tsai teaches the up-down counter performs either the up counting or the down counting on a basis of a predetermined clock signal (Fig. 1, Fig. 4 Par. [0049-0050, 0058]), and a phase difference of the clock signal with respect to the intermittent light is set to 0 degrees or 180 degrees during a first period, and set to 90 degrees or 270 degrees during a second period (Fig. 1, Fig. 4 @ T1 (i.e. the first period), T2 (i.e. the second period), Par. [0014, 0049-0050, 0058]. T1 has a phase difference of 0 degree and T2 has a phase difference of 90 degree with respect to light emission (i.e. the intermittent light)). Regarding Claim 10, Tsai as modified by Mizukoshi teaches a sensing system (See Claim 1 rejection) comprising: a light-emitting section that radiates irradiation light during a predetermined light-on period (See Claim 1 rejection); a pulse signal generation section that is provided with an avalanche photodiode that converts incident light including reflected light of the irradiation light into a photocurrent and multiplies the photocurrent and a quench circuit that generates a pulse signal on a basis of the multiplied photocurrent (See Claim 1 rejection); and an up-down counter that performs one of up counting and down counting each time the pulse signal is generated during the light-on period, and performs another of the up counting and the down counting each time the pulse signal is generated during a light-off period that does not correspond to the light-on period (See Claim 1 rejection). Regarding Claim 11, Tsai as modified by Mizukoshi teaches a control method of a solid-state imaging element (See Claim 1 rejection. Note: an apparatus claim can be used to implement a method claim) comprising: a pulse signal generation procedure of converting incident light including reflected light of irradiation light radiated during a predetermined light-on period into a photocurrent and multiplying the photocurrent, and generating a pulse signal on a basis of the multiplied photocurrent (See Claim 1 rejection); and an up-down counting procedure in which an up-down counter performs one of up counting and down counting each time the pulse signal is generated during the light-on period, and performs another of the up counting and the down counting each time the pulse signal is generated during a light-off period that does not correspond to the light-on period (See Claim 1 rejection). 9. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai in view of Mizukoshi) as applied to Claim 2 above and further in view of US Patent Pub. No. 2017/0139041 A1 by Drader et al. (hereinafter Drader). Regarding Claim 5, Tsai teaches the pulse signal generation section (Fig. 1 @ 11, Par. [0028]. Also see Fig. 2 @ light emission, Par. [0028]) is arranged in each of the plurality of pixels (Fig. 1 @ AD, Par. [0029, 0038, 0072]) but does not explicitly teach a logical sum gate that supplies a logical sum of the pulse signals of each of a plurality of pixels to the up-down counter. However, Drader teaches a logical sum gate that supplies a logical sum of the pulse signals of each of a plurality of pixels to the up-down counter (Fig. 2, Par. [0042-0043]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tsai as modified by Mizukoshi by Drader as taught above such that a logical sum gate that supplies a logical sum of the pulse signals of each of a plurality of pixels to the up-down counter is accomplished in order to combine onto a single line on its output line (Darder, Fig. 2 @ 204), pulses generated each time an event is detected by any of the SPAD cells (Darder, Par. [0042]). 10. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai in view of Mizukoshi) as applied to Claim 1 above and further in view of US Patent Pub. No. 2005/0088644 A1 by Morcom (hereinafter Morcom). Regarding Claim 6, Tsai teaches the irradiation light (See Claim 1 rejection), and the incident light includes the reflected light and background light (Par. [0005, 0031]: ambient light, i.e. the background light) but does not explicitly teach includes structured light. However, Morcom teaches structured light (Par. [0003]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tsai as modified by Mizukoshi by Morcom as taught above such that the irradiation light includes structured light is accomplished in order to measure the profile of the object/measure the distance of the remote object/compute the 3D surface profile of the remote object (Morcom, Par. [0003-0005]). 11. Claims 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai in view of Mizukoshi) as applied to Claim 1 above and further in view of US Patent Pub. No. 2016/0316160 A1 by Kurokawa (hereinafter Kurokawa). Regarding Claim 7, Tsai teaches the up-down counter (See Claim 1 rejection) includes: a first flip-flop to which the pulse signal is input (Par. [0065]); but does not explicitly teach: a selector that selects either a non-inverted output signal or an inverted output signal of the first flip-flop in accordance with a predetermined enable signal, and outputs the selected signal as a selection signal; and a second flip-flop to which the selection signal is input. However, Kurokawa teaches a selector (Fig. 1 @ 33) that selects either a non-inverted output signal or an inverted output signal of the first flip-flop (Fig. 1 @ 34) in accordance with a predetermined enable signal (Fig. 1 @ 94), and outputs the selected signal as a selection signal (Fig. 1 @ 34, Q); and a second flip-flop (Fig. 1 @ 35) to which the selection signal (Fig. 1 @ 34, Q) is input (Fig. 1 @ 35 @ 52). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tsai as modified by Mizukoshi by Kurokawa as taught above such that a selector that selects either a non-inverted output signal or an inverted output signal of the first flip-flop in accordance with a predetermined enable signal, and outputs the selected signal as a selection signal; and a second flip-flop to which the selection signal is input is accomplished in order to perform up/down counting operation of the counter circuit (Kurokawa, Par. [0103]). Regarding Claim 9, Tsai as modified by Mizukoshi as modified by Kurokawa teaches the first and second flip-flops include D flip- flops (Tsai, Par. [0065]), and the inverted output signal (Kurokawa, Fig. 1 @ 34, Q) of the first flip-flop (Kurokawa, Fig. 1 @ 34) is input to a delay terminal (Kurokawa, Fig. 1 @ 51) of the first flip-flop (Kurokawa, Fig. 1 @ 34) but does not explicitly teach the pulse signal and the selection signal are input to clock terminals. However, it is considered obvious to try all known solutions when there is a recognized need in the art (the pulse signal and the selection signal are input to clock terminals), there had been a finite number of identified, predictable solutions to the recognized need (pulse signal, selection signal, clock signal, combination of pulse signal and the selection signal), and when one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success. See MPEP § 2143, E. Furthermore, such an arrangement would imply to one of ordinary skill in the art at the time of the invention to use the pulse signal and the selection signal are input to clock terminals in order to obtain a predictable result. 12. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai in view of Mizukoshi) and Kurokawa as applied to Claim 7 above and further in view of JP2019047383A by Taura et al. (hereinafter Taura). Regarding Claim 8, Tsai teaches the first and second flip-flops (See Claim 7 rejection) and the pulse signal input (Kurokawa, Fig. 1 @ 32) to clock terminals (Kurokawa, Fig. 1 @ CLK2 (first flip-flop 34)) and selection signal (Kurokawa, Fig. 1 @ 34, Q) is input to clock terminals (Kurokawa, Fig. 1 @ 52, 56 (second flip-flop 35)) but does not explicitly teach include JK flip- flops, and the pulse signal and the selection signal are input to clock terminals. However, Taura teaches JK flip- flops (Fig. 24). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tsai as modified by Mizukoshi as modified by Kurokawa by Taura as taught above such that the first and second flip-flops include JK flip- flops is accomplished in order to obtain a predictable result. Still lacking limitation such as: the pulse signal and the selection signal are input to clock terminals. However, it is considered obvious to try all known solutions when there is a recognized need in the art (the pulse signal and the selection signal are input to clock terminals), there had been a finite number of identified, predictable solutions to the recognized need (pulse signal, selection signal, clock signal, combination of pulse signal and the selection signal), and when one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success. See MPEP § 2143, E. Furthermore, such an arrangement would imply to one of ordinary skill in the art at the time of the invention to use the pulse signal and the selection signal are input to clock terminals in order to obtain a predictable result. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMIL AHMED whose telephone number is (571)272-1950. The examiner can normally be reached M-F: 9:00 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kara Geisel can be reached on 571-272-2416. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMIL AHMED/Primary Examiner, Art Unit 2877
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Prosecution Timeline

Oct 14, 2022
Application Filed
Nov 03, 2025
Non-Final Rejection — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
97%
With Interview (+15.2%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 683 resolved cases by this examiner. Grant probability derived from career allow rate.

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