DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see pages 6-7, filed 03/26/2026, with respect to the rejection(s) of claim(s) 1-19 under 35 USC 103 have been fully considered and are persuasive.
Specifically, Applicant has declared that reference “Kapoor” (US 20210302478 A1) is owned by the same person (Lam Research Corporation), and therefore is not eligible as prior art due to its effective filing date.
Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Collins et al. (US 20060088655 A1) and previously cited references (see detailed action under Claim Rejections 35 US 103, below).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, and 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Collins et al. (US 20060088655 A1) in view of Dames et al. (US 20220018878 A1, previously cited) and Levin (US 4316254 A, previously cited).
Regarding claim 1, Collins teaches An apparatus (Fig. 1), comprising:
one or more measurement sensors disposed to measure voltage applied to, or current ([0086] lines 10-15, “The RF probe 132 is capable of simultaneously or nearly simultaneously measuring RF voltage, RF current and an instantaneous impedance angle between the RF voltage and RF current. The RF probe 132 may be replaced by individual instruments, specifically a voltage probe and a current probe.”) coupled to ([0086] lines 15-20, “Moreover, while FIG. 1 illustrates the RF probe 132 (or individual voltage and current probes) as being connected at the bias feed point 130, the RF probe 132 (or individual voltage and current probes) may be connected at a measurement point displaced from the bias feed point 130”), one or more process stations (Fig. 1; [0085] lines 3-7, “The reactor includes a vacuum chamber 100 containing a wafer support pedestal 102 for supporting or holding a semiconductor wafer 104 or workpiece and facing ceiling 106 of the chamber 100 to define a process region 108 between the ceiling 106 and the wafer 104.”) of the apparatus;
and
a processor (processor 134) configured to:
convert the ([0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”)
process the frequency domain representation of the RF signal ([0115] lines 14-35, “The frequency response or transfer function G(f) of the network model circuit of FIG. 6B is calculated (from the open and short network analyzer data referred to above) and stored in the memory 136 of FIG. 1, so that it is available to the processor 134 of FIG. 1 during production operations. The processor 134 performs a Fourier transform (block 690) upon some or all of the quantities (voltage, current, phase) measured at the feedpoint 130 by the RF probe 132 to obtain frequency domain versions of these quantities. These frequency domain entities are then convolved (block 692) with the measurement point-to-wafer transform G(f) to produce equivalent frequency domain measurements at the wafer 104. The processor 134 performs an inverse Fourier transform (block 696 of FIG. 6A) of these frequency domain measurements to obtain the time domain waveforms of the measurements (voltage, current and phase angle) as they would have appeared at the wafer 104. This completes the transformation step of block 158 employed in the processor operations depicted in FIGS. 2, 4A and 5. The time domain voltage or current at the wafer may be obtained in this way, and its RMS (root means square), peak or peak-to-peak value may be obtained.”) by a sensor transfer function to correct a phase lag of the one or more measurement sensors ([0129] lines 1-6, “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load”) ; and
determine a power delivered to the one or more process stations ([0081] “The method can further include measuring phase between the current signal and one or both voltage signals to obtain a plasma power-related value using the phase between the toroidal plasma current and the plasma loop voltage. The plasma-related value may be the product cosine(phase) times toroidal plasma current times plasma loop voltage.”; [0095] lines 4-8, “the processor 134 receives constantly updated values of current and voltage from the RF sensor 132, source power level from the RF source power generator 118 (e.g., delivered power)”).
Collins does not teach the apparatus, comprising:
one or more analog-to-digital converters, coupled to an output port of a corresponding one of the one or more measurement sensors, to provide a digital representation of a signal measured by the one or more measurement sensors;
process the frequency domain representation of the signal by a sensor transfer function to invert a phase lag of the one or more measurement sensors;
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal; and
determine a power delivered to the one or more process stations based on the true phase between the voltage signal and the current signal.
Dames teaches an analogous apparatus for measuring electric power from a signal, comprising:
one or more analog-to-digital converters (Fig. 1, ADCs 13 and 15), coupled to an output port of a corresponding one of the one or more measurement sensors (Fig. 1, current sensor 11, voltage sensor 14), to provide a digital representation (digitized signal S.sub.ADC) of a signal measured by the one or more measurement sensors (signal S(t));
process the frequency domain representation of the signal ([0038] lines 1-4, “Signals may be transformed from time to frequency domains using Fourier transform methods, for example, discrete Fourier transform methods such as a fast Fourier transform (FFT) method.”) by a sensor transfer function to invert ([0015] lines 9-14, “The apparatus also includes a controller configured to process a digitised current signal from the analogue-to-digital converter using a digital processing chain configured to compensate for the frequency and phase responses of the first transfer function and the second transfer function.”; [0110] “The analogue-to-digital converter 13 receives and digitises the filtered signal S.sub.filt(t) output from the low-pass filter 12. The controller 8 is configured to process a digitised signal S.sub.ADC from the analogue-to-digital converter using a digital processing chain having an overall digital domain transfer function H (the digital processing chain may also be referred to as H herein). The digital processing chain H may typically be a multi-stage filter which includes a first digital filter stage which has a third transfer function H.sub.sens configured to at least partially invert the first transfer function (e.g. a stage which implements an integrator to recover a current signal from the dI/dt signal S.sub.ADC). The digital processing chain H also includes a second digital filter stage having a fourth transfer function H.sub.filt, which is configured to at least partially invert the frequency response of the low-pass filter 12. The first digital filter stage may also be referred to as H.sub.sens herein and the second digital filter section may also be referred to as H.sub.filt herein.”) a phase lag ([0032] lines 3-6, “The coefficients of at least one of the difference equations may be configured to compensate for the frequency and phase response of the second transfer function”; [0117] lines 9-13, “Compensating for the frequency and phase response of the first and second transfer functions G.sub.sens, G.sub.filt may correspond to reducing or removing changes in phase and/or amplitude introduced by the current sensor 11 and low-pass filter 12”). The phase response is the phase lag.
of the one or more measurement sensors (current sensor 11, voltage sensor 13). The transfer functions to (at least partially) invert the signal is the sensor transfer function to invert the phase response of the measurement of the one or more sensors, wherein the phase response is the phase lag;
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal ([0156] lines 1-8, “Having determined the phase error by a suitable measurement, then in the case where an IIR filter is used to reconstruct the current signal, a calculation is carried out to update the IIR coefficients to modify the digital processing chain H response (in particular the fourth transfer function H.sub.filt of the second digital filter stage) to change the phase response to correct the phase error, and these updated IIR filter coefficient are then substituted for the original values.”). The phase response, corrected for the phase error, is the true phase between the voltage signal and current signal.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins to include the sensor transfer function to invert the phase lag of one or more sensors of Dames because it is applying a well-known technique to yield predictable results.
Collins in view of Dames does not teach the apparatus, comprising:
determine a power delivered based on the true phase between the voltage signal and the current signal.
Levin teaches an analogous apparatus for measuring voltage and current, comprising:
determine a power delivered based on the true phase between the voltage signal and the current signal (Fig. 16, block 762). One of ordinary skill in the art would recognize that it is well known in the art to determine the power based on the true phase between the voltage and current signals and/or from the determined power factor, as evidenced by Keysight (Power Factor Calculator: Your Key to Optimal Circuit Efficiency - Keysight Technologies (2024) Keysight.com. Available at: https://www.keysight.com/used/us/en/knowledge/calculators/power-factor-calculator.):
“Power factor, symbolized as PF, is a dimensionless number between -1 and 1. In an AC circuit, the power factor is determined by calculating the cosine of the angle formed by the current and voltage. In other words, it's a measure of how "in phase" the current and voltage are with each other. A power factor of 1 indicates perfect synchronization, where the current and voltage rise and fall together. This scenario is ideal as it means there's no wasted power.” and
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It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames to include the determination of the power delivered based on the true phase between the voltage signal and the current signal, because the determination of the power from the phase is well known in the art and would yield predictable results, such as accurately determining the actual power delivered from the phase between the voltage and current signals. This would advantageously increase the accuracy of said determination.
Regarding claim 2, Collins in view of Dames and Levin teaches The apparatus of claim 1, wherein the processor is configured to invert the phase lag of the one or more measurement sensors by multiplying an inverted transfer function of the one or more measurement sensors (Dames: [0156] “Having determined the phase error by a suitable measurement, then in the case where an IIR filter is used to reconstruct the current signal, a calculation is carried out to update the IIR coefficients to modify the digital processing chain H response (in particular the fourth transfer function H.sub.filt of the second digital filter stage) to change the phase response to correct the phase error, and these updated IIR filter coefficient are then substituted for the original values. In the case where the reconstruction is achieved by adding the V.sub.adc to the integrator output, the phase adjustment is achieved simply by varying the coefficient (fraction) used to multiply V.sub.adc, i.e., by varying RC in the RCV.sub.adc correction term.”) by a frequency response of the one or more measurement sensors (Dames: [0109] lines 7-18, “The low-pass filter 12 receives the signal S(t) from the current sensor 11. The low-pass filter 12 has a frequency response (or second transfer function) G.sub.filt which is configured to attenuate one or more harmonic components of the signal S(t) received from the current sensor 11. The combination of the first transfer function G.sub.sens of the current sensor 11 and the second transfer function G.sub.filt of the low-pass filter 12 may be viewed as having an overall analogue domain transfer function G, which describes the changes (as a function of frequency) in amplitude and phase of a filtered signal S.sub.filt(t) output from the low-pass filter 12, when compared to the original current I(t).”). The multiplication of the coefficients for phase adjustment is the multiplication of an inverter transfer function along with the second transfer function (i.e. frequency response).
Regarding claim 3, Collins in view of Dames and Levin teaches The apparatus of claim 1, wherein the processor is configured to invert the phase lag of the one or more measurement sensors by dividing a transfer function of the one or more measurement sensors (Dames: [0156] “Having determined the phase error by a suitable measurement, then in the case where an IIR filter is used to reconstruct the current signal, a calculation is carried out to update the IIR coefficients to modify the digital processing chain H response (in particular the fourth transfer function H.sub.filt of the second digital filter stage) to change the phase response to correct the phase error, and these updated IIR filter coefficient are then substituted for the original values. In the case where the reconstruction is achieved by adding the V.sub.adc to the integrator output, the phase adjustment is achieved simply by varying the coefficient (fraction) used to multiply V.sub.adc, i.e., by varying RC in the RCV.sub.adc correction term.”) by a frequency response of the one or more measurement sensors (Dames: [0109] lines 7-18, “The low-pass filter 12 receives the signal S(t) from the current sensor 11. The low-pass filter 12 has a frequency response (or second transfer function) G.sub.filt which is configured to attenuate one or more harmonic components of the signal S(t) received from the current sensor 11. The combination of the first transfer function G.sub.sens of the current sensor 11 and the second transfer function G.sub.filt of the low-pass filter 12 may be viewed as having an overall analogue domain transfer function G, which describes the changes (as a function of frequency) in amplitude and phase of a filtered signal S.sub.filt(t) output from the low-pass filter 12, when compared to the original current I(t).”; [0101] “In some examples, the order of the first and second digital filter stages may be reversed. In other examples, the transfer functions of the first and second digital filter stages may be multiplied together and the product applied as a single stage.”). The multiplication of the coefficients for phase adjustment is the multiplication of an inverter transfer function along with the second transfer function (i.e. frequency response). One of ordinary skill in the art would recognize that multiplication by a reciprocal (or fraction) is the same as dividing.
Regarding claim 4, Collins in view of Dames and Levin teaches The apparatus of claim 3, wherein the processor is configured to convert the digital representation of the RF signal measured by the one or more measurement sensors from a time domain to a frequency domain utilizing two or more Fast Fourier transform blocks (Fig. 6B; [0115] lines 18-22, “The processor 134 performs a Fourier transform (block 690) upon some or all of the quantities (voltage, current, phase) measured at the feedpoint 130 by the RF probe 132 to obtain frequency domain versions of these quantities.”) arranged in parallel (Fig. 6B, step 690). One of ordinary skill in the art would recognize that the “block” of the Fourier transform is a separate step for each of the transform of each measurement type, which are transformed independently (“some or all of the quantities”). Therefore the Fourier transform is taught as including two or more “blocks”, and their occurrence independently at the same step is the arrangement in parallel.
Regarding claim 5, Collins in view of Dames and Levin teaches The apparatus of claim 4, wherein each of the two or more Fast Fourier transform blocks is arranged in parallel with a corresponding delay circuit (Dames: matching delay block 36).
Regarding claim 10, Collins in view of Dames and Levin teaches The apparatus of claim 1, wherein the processor is configured to compute elements of a frequency response function (Dames: Figs. 5-7) during a calibration phase ([0125] lines 1-6, “Similarly, measurements of RF current, RF voltage or phase (impedance angle) at the measurement point (which may be the feedpoint 130) may be implemented with in-situ calibration capability (preferred), using the RF bias power generator 122 of FIG. 1 (which is normally carefully calibrated).”), and wherein inversion of the frequency response function to provide the phase lag of the one or more measurement sensors (Dames: [0110] lines 12-16, “The digital processing chain H also includes a second digital filter stage having a fourth transfer function H.sub.filt, which is configured to at least partially invert the frequency response of the low-pass filter 12.”; [0111] lines 3-6, “The overall digital domain transfer function H is configured to compensate for the frequency and phase response of the overall analogue domain transfer function G.”) occurs during a process performed by the one or more process stations of the apparatus ([0115] lines 13-22, “The frequency response or transfer function G(f) of the network model circuit of FIG. 6B is calculated (from the open and short network analyzer data referred to above) and stored in the memory 136 of FIG. 1, so that it is available to the processor 134 of FIG. 1 during production operations. The processor 134 performs a Fourier transform (block 690) upon some or all of the quantities (voltage, current, phase) measured at the feedpoint 130 by the RF probe 132 to obtain frequency domain versions of these quantities.”).
Regarding claim 11, Collins teaches An apparatus (Fig. 1) configured to a null out a phase lag ([0129] “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load. This calibration is done with the bias matching network disconnected or in a high-impedance state and in the absence of plasma, such that the only significant electrical load is said resistive load.”) of a measurement sensor ([0086] lines 10-15, “The RF probe 132 is capable of simultaneously or nearly simultaneously measuring RF voltage, RF current and an instantaneous impedance angle between the RF voltage and RF current. The RF probe 132 may be replaced by individual instruments, specifically a voltage probe and a current probe.”), comprising:
a processor (processor 134), coupled to a memory (Fig. 1, memory 136), configured to:
convert the ([0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”)
process the signal converted to the second domain ([0115] lines 14-35, “The frequency response or transfer function G(f) of the network model circuit of FIG. 6B is calculated (from the open and short network analyzer data referred to above) and stored in the memory 136 of FIG. 1, so that it is available to the processor 134 of FIG. 1 during production operations. The processor 134 performs a Fourier transform (block 690) upon some or all of the quantities (voltage, current, phase) measured at the feedpoint 130 by the RF probe 132 to obtain frequency domain versions of these quantities. These frequency domain entities are then convolved (block 692) with the measurement point-to-wafer transform G(f) to produce equivalent frequency domain measurements at the wafer 104. The processor 134 performs an inverse Fourier transform (block 696 of FIG. 6A) of these frequency domain measurements to obtain the time domain waveforms of the measurements (voltage, current and phase angle) as they would have appeared at the wafer 104. This completes the transformation step of block 158 employed in the processor operations depicted in FIGS. 2, 4A and 5. The time domain voltage or current at the wafer may be obtained in this way, and its RMS (root means square), peak or peak-to-peak value may be obtained.”) by a sensor transfer function to correct a phase lag of the one or more measurement sensors ([0129] lines 1-6, “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load”), and
determine a power delivered to the one or more process stations of a semiconductor fabrication apparatus ([0081] “The method can further include measuring phase between the current signal and one or both voltage signals to obtain a plasma power-related value using the phase between the toroidal plasma current and the plasma loop voltage. The plasma-related value may be the product cosine(phase) times toroidal plasma current times plasma loop voltage.”; [0095] lines 4-8, “the processor 134 receives constantly updated values of current and voltage from the RF sensor 132, source power level from the RF source power generator 118 (e.g., delivered power)”).
Collins does not teach the apparatus, comprising:
one or more analog-to-digital converters, coupled to an output port of a corresponding one of one or more measurement sensors, to provide a digital representation of a) signal measured by the one or more measurement sensors; and
process the signal converted to the second domain by a sensor transfer function to invert a phase lag of the one or more measurement sensors,
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal, and
determine a power delivered to the one or more process stations of a semiconductor fabrication apparatus based on the true phase between the voltage signal and the current signal.
Dames teaches an analogous apparatus for measuring electric power from a signal, comprising:
one or more analog-to-digital converters (Fig. 1, ADCs 13 and 15), coupled to an output port of a corresponding one of one or more measurement sensors (Fig. 1, current sensor 11, voltage sensor 14), to provide a digital representation of (digitized signal S.sub.ADC) a signal measured by the one or more measurement sensors (signal S(t)); and
process the signal converted to the second domain ([0038] lines 1-4, “Signals may be transformed from time to frequency domains using Fourier transform methods, for example, discrete Fourier transform methods such as a fast Fourier transform (FFT) method.”) by a sensor transfer function to invert ([0015] lines 9-14, “The apparatus also includes a controller configured to process a digitised current signal from the analogue-to-digital converter using a digital processing chain configured to compensate for the frequency and phase responses of the first transfer function and the second transfer function.”; [0110] “The analogue-to-digital converter 13 receives and digitises the filtered signal S.sub.filt(t) output from the low-pass filter 12. The controller 8 is configured to process a digitised signal S.sub.ADC from the analogue-to-digital converter using a digital processing chain having an overall digital domain transfer function H (the digital processing chain may also be referred to as H herein). The digital processing chain H may typically be a multi-stage filter which includes a first digital filter stage which has a third transfer function H.sub.sens configured to at least partially invert the first transfer function (e.g. a stage which implements an integrator to recover a current signal from the dI/dt signal S.sub.ADC). The digital processing chain H also includes a second digital filter stage having a fourth transfer function H.sub.filt, which is configured to at least partially invert the frequency response of the low-pass filter 12. The first digital filter stage may also be referred to as H.sub.sens herein and the second digital filter section may also be referred to as H.sub.filt herein.”) a phase lag ([0032] lines 3-6, “The coefficients of at least one of the difference equations may be configured to compensate for the frequency and phase response of the second transfer function”; [0117] lines 9-13, “Compensating for the frequency and phase response of the first and second transfer functions G.sub.sens, G.sub.filt may correspond to reducing or removing changes in phase and/or amplitude introduced by the current sensor 11 and low-pass filter 12”). The phase response is the phase lag. of the one or more measurement sensors (current sensor 11, voltage sensor 13). The transfer functions to (at least partially) invert the signal is the sensor transfer function to invert the phase response of the measurement of the one or more sensors, wherein the phase response is the phase lag;
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal ([0156] lines 1-8, “Having determined the phase error by a suitable measurement, then in the case where an IIR filter is used to reconstruct the current signal, a calculation is carried out to update the IIR coefficients to modify the digital processing chain H response (in particular the fourth transfer function H.sub.filt of the second digital filter stage) to change the phase response to correct the phase error, and these updated IIR filter coefficient are then substituted for the original values.”). The phase response, corrected for the phase error, is the true phase between the voltage signal and current signal.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins to include the sensor transfer function to invert the phase lag of one or more sensors of Dames because it is applying a well-known technique to yield predictable results.
Collins in view of Dames does not teach the apparatus, comprising:
determine a power delivered based on the true phase between the voltage signal and the current signal.
Levin teaches an analogous apparatus for measuring voltage and current, comprising:
determine a power delivered based on the true phase between the voltage signal and the current signal (Fig. 16, block 762). One of ordinary skill in the art would recognize that it is well known in the art to determine the power based on the true phase between the voltage and current signals and/or from the determined power factor, as evidenced by Keysight:
“Power factor, symbolized as PF, is a dimensionless number between -1 and 1. In an AC circuit, the power factor is determined by calculating the cosine of the angle formed by the current and voltage. In other words, it's a measure of how "in phase" the current and voltage are with each other. A power factor of 1 indicates perfect synchronization, where the current and voltage rise and fall together. This scenario is ideal as it means there's no wasted power.” and
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It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames to include the determination of the power delivered based on the true phase between the voltage signal and the current signal, because the determination of the power from the phase is well known in the art and would yield predictable results, such as accurately determining the actual power delivered from the phase between the voltage and current signals. This would advantageously increase the accuracy of said determination.
Claim(s) 6-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of Dames and Levin as applied to claim 4 above, and further in view of Habib et al. (B. Habib, G. Zaharia and G. E. Zein, "Improved frequency domain architecture for the digital block of a hardware simulator for MIMO radio channels," ISSCS 2011 - International Symposium on Signals, Circuits and Systems, Iasi, Romania, 2011, pp. 1-4, doi: 10.1109/ISSCS.2011.5978678., previously cited).
Regarding claim 6, Collins in view of Dames and Levin teaches The apparatus of claim 4.
Collins in view of Dames and Levin does not teach the apparatus, further comprising a digital inverter, wherein the digital inverter comprises a logic circuit to convey an output signal from the one or more measurement sensors to a first of the two or more Fast Fourier transform blocks during a first clock portion and to convey the output signal from the one or more measurement sensors to a second of the two or more Fast Fourier transform blocks during a second clock portion.
Habib teaches an analogous circuit, comprising a logic circuit to convey an output signal from the one or more measurement sensors (p. 1 “Multiple-Input Multiple-Output (MIMO) systems make use of antenna arrays simultaneously at both transmitter and receiver site to improve the capacity and/or the system performance”; “The simulator must reproduce the behavior of a MIMO propagation channel. It operates with radio frequency signals (2 GHz for UMTS and 5 GHz for WLAN)”) to a first of the two or more Fast Fourier transform blocks (Figs. 4 and 5, FFT 1) during a first clock portion (p. 3 “the new architecture presented in Fig. 4, will operate using two FFT/IFFT blocks of 512 points. Each 256 input samples fed alternately a FFT module due to a switch signal S.”) and to convey the output signal from the one or more measurement sensors to a second of the two or more Fast Fourier transform blocks (FFT 2) during a second clock portion (p. 3 “The switch signal S, provides alternate use of the two FFT modules”; Fig. 5, inverted switch signal S̄). The switch signal, having duration of Wt (Wt represents the width of the time window of the impulse response of the propagation channel.) is a clock (p. 3, Tables II and III, “clock period”). The signal alternating between FFT 1 and FFT 2 is conveying the signal to the first during the first clock portion and the second during the second clock portion.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames and Levin to include the logic circuit to convey signals to the two Fast Fourier Transform blocks because it would yield predictable and advantageous results. The conveying of signals predictably sends partitions of the signal to each of the FFT blocks, thereby dividing the signal between each of the FFT blocks. The division of the signal between two FFT blocks yields the advantageous result of increasing the speed of computation by having one FFT block receiving a partition of the signal while the other FFT block is still performing its computations, such that they are operating in parallel.
Regarding claim 7, Collins in view of Dames and Levin teaches The apparatus of claim 4.
Collins in view of Dames and Levin does not teach the apparatus, wherein the digital inverter comprises a concatenation block configured to join output signal representations from the two or more Fast Fourier transform blocks arranged in parallel into a single output signal representation.
Habib teaches an analogous circuit, wherein the digital inverter comprises a concatenation block configured to join output signal representations from the two or more Fast Fourier transform blocks arranged in parallel into a single output signal representation (concatenation of vectors y1, y2, and y3 of Fig. 3; Fig. 4, reproduced below with annotation).
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It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames and Levin to include the concatenation block of Habib because it would yield predictable results of joining the previously divided and processed (via FFT blocks in parallel) into a single signal. Concatenation of signals is a technique well known to one of ordinary skill in the art.
Regarding claim 8, Collins in view of Dames, Levin, and Habib teaches The apparatus of claim 7, further comprising a truncation block configured to truncate a size of the single output signal representation (Habib: Fig. 6 Truncation).
Regarding claim 9, Collins in view of Dames, Levin, and Habib teaches The apparatus of claim 8, wherein the truncation block comprises a sliding window configured to adjust binary digits of the single output signal representation (Habib: Fig. 6 “Sliding window truncation, from 34 to 14 bits”).
Claim(s) 12-14 and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of Dames, Levin, and Kapoor et al. (US 20150348854 A1, provided by applicant).
Regarding claim 12, Collins teaches An apparatus (Fig. 1) adapted to null out a phase lag ([0129] “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load. This calibration is done with the bias matching network disconnected or in a high-impedance state and in the absence of plasma, such that the only significant electrical load is said resistive load.”) of one or more measurement sensors ([0086] lines 10-15, “The RF probe 132 is capable of simultaneously or nearly simultaneously measuring RF voltage, RF current and an instantaneous impedance angle between the RF voltage and RF current. The RF probe 132 may be replaced by individual instruments, specifically a voltage probe and a current probe.”), comprising:
a detector to detect a frequency content of output signals of the one or more measurement sensors ([0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”); and
a processor (processor 134) coupled to a memory (Fig. 1, memory 136) to convert the ([0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”)
process the frequency domain representation of the RF signal ([0115] lines 14-35, “The frequency response or transfer function G(f) of the network model circuit of FIG. 6B is calculated (from the open and short network analyzer data referred to above) and stored in the memory 136 of FIG. 1, so that it is available to the processor 134 of FIG. 1 during production operations. The processor 134 performs a Fourier transform (block 690) upon some or all of the quantities (voltage, current, phase) measured at the feedpoint 130 by the RF probe 132 to obtain frequency domain versions of these quantities. These frequency domain entities are then convolved (block 692) with the measurement point-to-wafer transform G(f) to produce equivalent frequency domain measurements at the wafer 104. The processor 134 performs an inverse Fourier transform (block 696 of FIG. 6A) of these frequency domain measurements to obtain the time domain waveforms of the measurements (voltage, current and phase angle) as they would have appeared at the wafer 104. This completes the transformation step of block 158 employed in the processor operations depicted in FIGS. 2, 4A and 5. The time domain voltage or current at the wafer may be obtained in this way, and its RMS (root means square), peak or peak-to-peak value may be obtained.”) by a sensor transfer function to correct the phase lag of the one or more measurement sensors ([0129] lines 1-6, “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load”), and
determine a power delivered to the one or more process stations of a semiconductor fabrication apparatus ([0081] “The method can further include measuring phase between the current signal and one or both voltage signals to obtain a plasma power-related value using the phase between the toroidal plasma current and the plasma loop voltage. The plasma-related value may be the product cosine(phase) times toroidal plasma current times plasma loop voltage.”; [0095] lines 4-8, “the processor 134 receives constantly updated values of current and voltage from the RF sensor 132, source power level from the RF source power generator 118 (e.g., delivered power)”).
Collins does not teach the apparatus, comprising:
an analog-to-digital converter to convert an analog signal, obtained from one or more output ports of a corresponding number of the one or more measurement sensors to measure power coupled to a multi-station integrated circuit fabrication chamber, to a digital representation;
process the frequency domain representation of the RF signal by a sensor transfer function to invert the phase lag of the one or more measurement sensors,
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal; and
determine a power delivered based on the true phase between the voltage signal and the current signal.
Dames teaches an analogous apparatus for measuring electric power from a signal, comprising:
an analog-to-digital converter to convert an analog signal (Fig. 1, ADCs 13 and 15), obtained from one or more output ports of a corresponding number of the one or more measurement sensors (Fig. 1, current sensor 11, voltage sensor 14) to measure power ([0170] “Many sophisticated power measurement devices measure the harmonic content by carrying out a Fast Fourier Transform (FFT) on the current and voltage waveforms. The frequency and phase response of the input filter network is known from pre-calibration experiments using known signals (e.g. the second transfer function G.sub.filt), allowing a transfer function inverse to that low-pass filter to be derived (e.g. the fourth transfer function H.sub.filt). The inverse transfer function is applied in the frequency domain, i.e., on the output of the FFT, and similarly to carry out the power calculations in the frequency rather than the time domain (multiplying each frequency component by its complex conjugate). Digital integration (which typically compensates for the current sensor 11 response G.sub.sens) is just another filter, and it too may be applied in the frequency domain.”), to a digital representation (digitized signal S.sub.ADC)
process the frequency domain representation of the RF signal ([0038] lines 1-4, “Signals may be transformed from time to frequency domains using Fourier transform methods, for example, discrete Fourier transform methods such as a fast Fourier transform (FFT) method.”) by a sensor transfer function to invert ([0015] lines 9-14, “The apparatus also includes a controller configured to process a digitised current signal from the analogue-to-digital converter using a digital processing chain configured to compensate for the frequency and phase responses of the first transfer function and the second transfer function.”; [0110] “The analogue-to-digital converter 13 receives and digitises the filtered signal S.sub.filt(t) output from the low-pass filter 12. The controller 8 is configured to process a digitised signal S.sub.ADC from the analogue-to-digital converter using a digital processing chain having an overall digital domain transfer function H (the digital processing chain may also be referred to as H herein). The digital processing chain H may typically be a multi-stage filter which includes a first digital filter stage which has a third transfer function H.sub.sens configured to at least partially invert the first transfer function (e.g. a stage which implements an integrator to recover a current signal from the dI/dt signal S.sub.ADC). The digital processing chain H also includes a second digital filter stage having a fourth transfer function H.sub.filt, which is configured to at least partially invert the frequency response of the low-pass filter 12. The first digital filter stage may also be referred to as H.sub.sens herein and the second digital filter section may also be referred to as H.sub.filt herein.”) the phase lag ([0032] lines 3-6, “The coefficients of at least one of the difference equations may be configured to compensate for the frequency and phase response of the second transfer function”; [0117] lines 9-13, “Compensating for the frequency and phase response of the first and second transfer functions G.sub.sens, G.sub.filt may correspond to reducing or removing changes in phase and/or amplitude introduced by the current sensor 11 and low-pass filter 12”) of the one or more measurement sensors (current sensor 11, voltage sensor 13). The transfer functions to (at least partially) invert the signal is the sensor transfer function to invert the phase response of the measurement of the one or more sensors, wherein the phase response is the phase lag,
use the inversion of the phase lag of the one or more measurement sensors to determine a true phase between a voltage signal and a current signal ([0156] lines 1-8, “Having determined the phase error by a suitable measurement, then in the case where an IIR filter is used to reconstruct the current signal, a calculation is carried out to update the IIR coefficients to modify the digital processing chain H response (in particular the fourth transfer function H.sub.filt of the second digital filter stage) to change the phase response to correct the phase error, and these updated IIR filter coefficient are then substituted for the original values.”). The phase response, corrected for the phase error, is the true phase between the voltage signal and current signal.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins to include the sensor transfer function to invert the phase lag of one or more sensors of Dames because it is applying a well-known technique to yield predictable results.
Collins in view of Dames does not teach the apparatus, comprising:
one or more measurement sensors to measure power coupled to a multi-station integrated circuit fabrication chamber;
determine a power delivered based on the true phase between the voltage signal and the current signal.
Levin teaches an analogous apparatus for measuring voltage and current, comprising:
determine a power delivered based on the true phase between the voltage signal and the current signal (Fig. 16, block 762). One of ordinary skill in the art would recognize that it is well known in the art to determine the power based on the true phase between the voltage and current signals and/or from the determined power factor, as evidenced by Keysight:
“Power factor, symbolized as PF, is a dimensionless number between -1 and 1. In an AC circuit, the power factor is determined by calculating the cosine of the angle formed by the current and voltage. In other words, it's a measure of how "in phase" the current and voltage are with each other. A power factor of 1 indicates perfect synchronization, where the current and voltage rise and fall together. This scenario is ideal as it means there's no wasted power.” and
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It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames to include the determination of the power delivered based on the true phase between the voltage signal and the current signal, because the determination of the power from the phase is well known in the art and would yield predictable results, such as accurately determining the actual power delivered from the phase between the voltage and current signals. This would advantageously increase the accuracy of said determination.
Collins in view of Dames and Levin does not teach the apparatus, comprising:
one or more measurement sensors to measure power coupled to a multi-station integrated circuit fabrication chamber.
Kapoor teaches an analogous apparatus, comprising:
one or more measurement sensors (sensors 333) to measure power ([0063] lines 1-3, “The sensors 333 measure at least one RF power parameter. The RF power parameter measured may be voltage, current, impedance, phase, or load power.”) coupled to a multi-station integrated circuit fabrication chamber (Fig. 3, multiple stations 351; [0026] lines 1-4, “Disclosed herein are methods and apparatuses for improving thin film deposition on semiconductor substrates, such as deposition consistency, in semiconductor fabrication operations involving multiple film deposition cycles”).
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus the of Collins in view of Dames and Levin to substitute the integration circuit fabrication chamber for the multi-station integrated circuit fabrication chamber of Kapoor, because the substitution would yield predictable results.
Regarding claim 13, Collins in view of Dames, Levin, and Kapoor teaches the apparatus of claim 12,
wherein the detecting the frequency content (Collins: [0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”) of the output signals comprises determining a crossing of the digital representation of the output signal with a reference signal level (Collins: [0126] lines 1-6, “In order to calibrate measurements from the bias measurement point RF probe 132, its voltage, current and impedance angle measurements are compared against the delivered power metered at the bias power generator 122.”; [0102] lines 1-4, “the processor 134 may compare (block 188) the error computed in the subtraction step of block 168 with a predetermined error threshold (block 190) and issue an alarm if the threshold is exceeded.”); and
determining, utilizing the crossing of the digital representation of the signal measured by the one or more measurement sensors, a frequency content of the RF signal (Collins: [0113] lines 31-37, “If the measurements are taken in the time domain, then they are transformed to the frequency domain to obtain at least the fundamental and harmonics 2-4 (for example). These frequency domain components of the measured voltage and current are combined with the transform or transfer function to obtain the frequency domain voltage or current (or both) at the wafer plane.”) and the nulling-out of the phase lag of the one or more measurement sensors (Collins: [0129] “A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load. This calibration is done with the bias matching network disconnected or in a high-impedance state and in the absence of plasma, such that the only significant electrical load is said resistive load.”).
Regarding claim 14, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 13, wherein the crossing corresponds to a RF signal ground (Dames: [0114] “In some examples, the low-pass filter 12 may include at least one series resistance R and at least one parallel capacitance C. In particularly simple examples, the low-pass filter 12 may take the form of a simple, single stage RC filter. Herein, a series resistance R is located directly on a signal path from the mutual inductance current sensor 11 to the ADC 13. A parallel capacitance connects between a ground or reference potential and the signal path from the mutual inductance current sensor 11 to the ADC 13.”; [0122] “Using the apparatus 1, a dynamic range of measurements obtained using the apparatus 1 may be improved compared to a second electricity meter which is identical to the electricity meter except that the second electricity meter does not include the low-pass filter.”), The use of ground in the signal path to the analog-to-digital converter (ADC) is corresponding to the RF signal ground. Further, Dames recites the apparatus comparing without the filter, and therefore the ground, and therefore could compare the differences between the signal and the signal corresponding to a RF signal ground.
Regarding claim 17, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 12, wherein the nulling-out of phase lag of the one or more measurement sensors corresponds to canceling phase lag introduced by the one or more measurement sensors
Regarding claim 18, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 17, wherein a frequency response forms a frequency response function (Dames: Figs. 5-7).
Regarding claim 19, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 18, wherein the processor is further configured to provide an estimate of RF power (Kapoor: [0073] “In operation 409, a RF power parameter may be measured at each station to determine variations among the stations. The RF power parameter may be measured after plasma is generated in the station and reflects the dynamic impedances in each station. This parameter may be a voltage, current, impedance, phase, load power, power delivered to the station, or any combination of the previous.”) coupled to the multi-station integrated circuit fabrication chamber (Kapoor: multiple stations 351) utilizing a signal received from the one or more measurement sensors that is advanced by an amount corresponding to the phase lag (Collins: [0125] lines 24-34, “Software may automatically operate the relays to route the RF generator output through the RF probe to the dummy load. Software may automatically vary the RF generator power output and measure the probe response (voltage, current and phase) distribution over the absorbed power. Then software may calculate calibration factors (for each of V, I, and phase) for the probe which can be used for all subsequent measurements. After the calibration, software directs the relays to switch the RF generator output from the RF probe input port back to the RF match input port, and switch the RF probe output port from the dummy load back to the chamber RF bias input port.”; [0129] A calibration factor may be obtained for the phase between RF bias voltage and RF bias current by coupling the RF bias power generator to a load resistance that matches the generator's real output impedance, and then by measuring phase and by comparing with the zero degree phase of a resistive load. This calibration is done with the bias matching network disconnected or in a high-impedance state and in the absence of plasma, such that the only significant electrical load is said resistive load.).
Claim(s) 15 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of Dames, Levin, and Kapoor as applied to claim 12 above, and further in view of Valcore (US 20150332894 A1, provided by applicant).
Regarding claim 15, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 12.
Collins in view of Dames, Levin, and Kapoor does not teach the apparatus,
wherein the one or more measurement sensors comprises a capacitive voltage transformer operating at any frequency between about 300 kHz and about 100 MHz.
Valcore teaches an analogous apparatus (Abstract),
wherein the one or more measurement sensors comprises a capacitive voltage transformer (capacitive divider voltage sensor 530) operating at any frequency between about 300 kHz and about 100 MHz ([0021] lines 1-4, “[0021] FIG. 4 shows the voltage seen by the Si HER (Hot Edge Ring) during a HARC (High Aspect Ratio Contact) process using 2 MHz, 27 MHz, and 60 MHz on a Lam DFC2300 Flex45 platform”). The frequencies including 2 MHz, 27 MHz, and 60 MHz are between about 300 kHz and about 100 MHz. It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select the frequency range, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames, Levin, and Kapoor to substitute the measurement sensor for the capacitive voltage transformer of Valcore because it would yield predictable results.
Regarding claim 16, Collins in view of Dames, Levin, and Kapoor teaches The apparatus of claim 12, wherein the one or more measurement sensors comprises a current measurement sensor (current measured by sensor 132).
Collins in view of Dames, Levin, and Kapoor does not teach the apparatus, comprising:
one or more measurement sensors operating at a frequency of between about 300 kHz and about 100 MHz.
Valcore teaches an analogous apparatus (Abstract), comprising:
one or more measurement sensors operating at a frequency of between about 300 kHz and about 100 MHz ([0021] lines 1-4, “[0021] FIG. 4 shows the voltage seen by the Si HER (Hot Edge Ring) during a HARC (High Aspect Ratio Contact) process using 2 MHz, 27 MHz, and 60 MHz on a Lam DFC2300 Flex45 platform”). The frequencies including 2 MHz, 27 MHz, and 60 MHz are between about 300 kHz and about 100 MHz. It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select the frequency range, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Collins in view of Dames, Levin, and Kapoor to substitute the current measurement sensor for the current sensor operating at frequencies of Valcore because it would yield predictable results.
Conclusion
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/B.B.G./Examiner, Art Unit 2857
/Catherine T. Rastovski/Supervisory Primary Examiner, Art Unit 2857
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