DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 3, 4, 6, 8, 12, 13, 18, 20-22, and 24 have been amended.
Claims 2 and 19 have been cancelled.
Claims 1, 3-6, 8, 10-14, 18, 20-22, 24, and 26 have been examined.
The specification objection in the previous Office Action is maintained.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 12, 2026 has been entered.
Information Disclosure Statement
The Applicant's submission of the Information Disclosure Statement dated March 18, 2026 is acknowledged by the Examiner and the cited references have been considered in the examination of the claims now pending. A copy of the PTOL-1449 initialed and dated by the Examiner is attached to the instant office action.
Specification
The disclosure is objected to because of the following informalities.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The Examiner suggests, “Start and Shutdown Controlling Mechanism using inter-circuit communication to prevent transient current jumps in an Integrated Computing Apparatus.”
Appropriate correction is required. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which Applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 3, 4, 6, 8, 12, and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the Applicant regards as the invention.
Claim 1 recites, at lines 5-6, “the second circuits.” The antecedent basis for this limitation cannot be definitely determined. The limitation could refer to the “plurality of second circuits,” or to the “one or more of the plurality of second circuits.” Accordingly, the claim is indefinite. For purposes of examination, this limitation is interpreted as, “the one or more of the plurality of second circuits.”
Claims 3, 4, 6, 8, 12, and 13 are rejected as depending from rejected base claims and failing to cure the indefiniteness of those base claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 5, 6, 11, 12, 18, 20, 22, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over US Patent No. 7,498,835 by Rahman et al. (hereinafter referred to as “Rahman”) in view of US Publication No. 2018/0004530 by Vorbach (hereinafter referred to as “Vorbach”).
Regarding claims 1 and 18, taking claim 1 as representative, Rahman discloses:
an integrated computing apparatus, comprising a first circuit and a plurality of second circuits (Rahman discloses, at Figure 2 and related description, a power management unit, which discloses a first circuit, and configurable logic blocks (CLBs), which discloses a plurality of second circuits.),
wherein when the integrated computing apparatus is started and/or shut down, the first circuit is configured to send control information to one or more of the plurality of second circuits in accordance with a predetermined rule to instruct the second circuits to sequentially start and/or shut down wherein the control information is indicated by a data state of data transmitted from the first circuit to at least one of the plurality of second circuits (Rahman discloses, at Figure 2 and related description, the power management circuit can sequentially power up and power down the CLBs, which discloses when the integrated computing apparatus is started and/or shut down, the first circuit is configured to send control information to all or some of the plurality of second circuits in accordance with a predetermined rule to instruct the second circuits to sequentially start and/or shut down. See, e.g., col. 11, lines 32-50.); and
the plurality of second circuits are configured to, in response to the control information received, sequentially start and/or shut down the plurality of second circuits wherein the sequential start and/or shut down of the plurality of second circuits comprises (Rahman discloses, at Figure 2 and related description, the power management circuit can sequentially power up and power down the CLBs, which discloses the second circuits are configured to, in response to the control information received, sequentially start and/or shut down the second circuits. See, e.g., col. 11, lines 32-50.):
receiving the control information from the first circuit by a first second circuit in the plurality of second circuits (Rahman discloses, at Figure 2 and related description, the power management circuit can sequentially power up and power down the CLBs, which discloses receiving the control information from the first circuit by a first second circuit in the plurality of second circuits.);
starting and/or shutting down the first second circuit in response to the received control information … (Rahman discloses, at Figure 2 and related description, the power management circuit can sequentially power up and power down the CLBs, which discloses starting and/or shutting down the first second circuit in response to the received control information.).
Rahman does not explicitly disclose generating confirmation information by the first second circuit based on a status of the starting and/or shutting down of the first second circuit; and sending the confirmation information to a second second circuit to start and/or shut down the second second circuit.
However, in the same field of endeavor (e.g., processing) Vorbach discloses:
one execution unit generating a confirmation signal and sending it to another execution unit (Vorbach discloses, at ¶ [0132], using handshaking mechanisms to control operation when one execution unit depends on a previous execution unit. See also ¶ [0154] et seq., which discloses taking action based on a confirmation signal from direct successors, and ¶ [0342], which discloses using a confirmation signal to allow operations to proceed.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include the use of a confirmation signal, as disclosed by Vorbach, to ensure correct operation by confirming all intended circuits are participating.
Regarding claims 3 and 20, taking claim 3 as representative, Rahman discloses the elements of claim 2 as discussed above. Rahman also discloses:
the first circuit is further configured to set corresponding data states of the plurality of second circuits to be started and/or shut down (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down based on the state of enable signals sent to the CLBs, which discloses the first circuit is further configured to set corresponding data states of second circuits to be started and/or shut down.); and
the plurality of second circuits are further configured to, in response to the data states received, start and/or shut down (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses the second circuits are further configured to, in response to the data states received, start and/or shut down the second circuits.).
Regarding claim 5, Rahman discloses the elements of claim 2 as discussed above. Rahman also discloses:
when the integrated computing apparatus is started, the transmitted data is the same or different for each second circuit (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down based on the state of enable signals sent to the CLBs, which discloses when the integrated computing apparatus is started, the transmitted data is the same or different for each second circuit.).
Regarding claims 6 and 22, taking claim 6 as representative, Rahman discloses the elements of claim 1 as discussed above. Rahman also discloses:
the control information is indicated by an enable signal; and wherein the first circuit is further configured to set corresponding enable signals for the plurality of second circuits to be started and/or shut down, and the plurality of second circuits are further configured to, in response to the enable signals received, start and/or shut down the plurality of second circuits (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down by sending enable signals to the CLBs, which discloses the control information is indicated by an enable signal; and wherein the first circuit is further configured to set corresponding enable signals for second circuits to be started and/or shut down, and the second circuits are further configured to, in response to the enable signals received, start and/or shut down the second circuits.).
Regarding claims 11 and 26, taking claim 11 as representative, Rahman discloses the elements of claim 1 as discussed above. Rahman also discloses:
the plurality of second circuits are divided into several second circuit groups, wherein at least one second circuit is included in each second circuit group, and the plurality of second circuits being sequentially started and/or shut down includes at least one of following cases (Rahman discloses, at Figure 2 and related description, CLBs, which discloses several second circuit groups.):
within a single second circuit group, each second circuit is sequentially started and/or shut down; and/or among several second circuit groups, each second circuit group is sequentially started and/or shut down (Rahman discloses, at Figure 2 and related description, sequentially starting and shutting down individual configurable portions, which discloses within a single second circuit group, each second circuit is sequentially started and/or shut down.).
Regarding claim 12, Rahman discloses the elements of claim 11 as discussed above. Rahman also discloses:
the plurality of second circuits are distributed in the form of an array, each second circuit group includes one or more second circuits in the plurality of second circuits in a same row or column of the array, and the first circuit is serially connected to one second circuit in each second circuit group (Rahman discloses, at Figure 1A and related description, an array of CLBs, which includes groups of CLBs in the rows. Rahman also discloses, at Figure 2 and related description, the power management unit is coupled to the CLBs, which discloses the first circuit is serially connected to one second circuit in each second circuit group.).
Claims 4, 8, 10, 13, 14, 21, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Rahman in view of Vorbach in view of US Patent No. 12,093,696 by Duong et al. (hereinafter referred to as “Duong”).
Regarding claims 4 and 21, taking claim 4 as representative, Rahman discloses the elements of claim 2 as discussed above. Rahman also discloses:
the first circuit is further configured to set a corresponding data state of a first second circuit to be started and/or shut down (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down based on the state of enable signals sent to the CLBs, which discloses the first circuit is further configured to set a corresponding data state of a first second circuit to be started and/or shut down.); and
the plurality of second circuits are further configured to start a current second circuit in response to a received data state indicating start-up (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses the second circuits are further configured to start a current second circuit in response to a received data state indicating start-up.);
…the plurality of second circuits are further configured to perform corresponding data processing… (Rahman discloses, at Figure 2 and related description, CLBs, which discloses the second circuits are further configured to perform corresponding data processing.); and/or
shut down the current second circuit (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses shut down the current second circuit.).
Rahman does not explicitly disclose set a corresponding data state for a latter second circuit; pass the data state backward to the latter second circuit; the aforementioned processing is in response to a received data state indicating shutdown; set a corresponding data state for a previous second circuit; and pass the data state forward to the previous second circuit.
However, in the same field of endeavor (e.g., processing circuits) Duong discloses:
set a corresponding data state for a latter second circuit; and pass the data state backward to the latter second circuit (Duong discloses, at col. 28, lines 28-33, propagating valid signals upstream and downstream, which discloses set a corresponding data state for a latter second circuit; and pass the data state backward to the latter second circuit.); and
passing output values; set a corresponding data state for a previous second circuit; pass the data state forward to the previous second circuit (Duong discloses, at col. 28, lines 28-33, passing output values and propagating valid signals upstream and downstream, which discloses processing is in response to a received data state indicating shutdown; set a corresponding data state for a previous second circuit; and pass the data state forward to the previous second circuit.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include the processing, setting, and passing of data and signals to neighboring circuits in order to improve efficiency in circuitry for parallel processing. See Duong, col. 1, lines 20-22.
Regarding claims 8 and 24, taking claim 8 as representative, Rahman discloses the elements of claim 1 as discussed above. Rahman also discloses:
the first circuit is further configured to set an enable signal for instructing start-up and/or shutdown of the plurality of second circuits (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down by sending enable signals to the CLBs, which discloses the first circuit is further configured to set an enable signal for instructing start-up and/or shutdown of the second circuits.); and
the plurality of second circuits are further configured to start a current second circuit in response to a received enable signal indicating start-up… (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down by sending enable signals to the CLBs, which discloses the second circuits are further configured to start a current second circuit in response to a received enable signal indicating start-up.);
generate …information for the current second circuit (Rahman discloses, at Figure 2 and related description, the power management circuit indicates whether the CLBs should be powered up or down by sending enable signals to the CLBs, which discloses generating information for the current second circuit.); and/or
the plurality of second circuits are further configured to perform corresponding data processing in response to a received enable signal indicating shutdown… (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses the second circuits are further configured to perform corresponding data processing in response to a received enable signal indicating shutdown.);
generate …information for the current second circuit (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses generating information for the current second circuit.);
…shut down the current second circuit… (Rahman discloses, at Figure 2 and related description, the CLBs power up or down based on the state of enable signals sent to the CLBs, which discloses shutting down the current second circuit.).
Rahman does not explicitly disclose the aforementioned start-up is also in response to start-up confirmation information received from a previous second circuit, pass the start-up confirmation information backward to a latter second circuit, the aforementioned corresponding data processing is also in response to shutdown confirmation information received from the latter second circuit, passing the shutdown confirmation information forward to the previous second circuit; and wherein the shutdown confirmation information is sent along with operating result information.
However, in the same field of endeavor (e.g., processing) Vorbach discloses:
confirmation information received from a previous circuit (Vorbach discloses, at ¶ [0154], taking action based on a confirmation signal from direct successors, which discloses basing processing on start-up and shutdown confirmation information received from previous and latter second circuits.);
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include the use of a confirmation signal, as disclosed by Vorbach, to ensure correct operation by confirming all intended circuits are participating.
Also, in the same field of endeavor (e.g., processing circuits) Duong discloses:
passing information forward and backward to adjacent circuits (Duong discloses, at col. 28, lines 28-33, propagating signals upstream and downstream, which discloses passing the aforementioned confirmation information and operating result information to the latter and previous second circuit.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include the processing, setting, and passing of data and signals to neighboring circuits in order to improve efficiency in circuitry for parallel processing. See Duong, col. 1, lines 20-22.
Regarding claim 10, Rahman discloses the elements of claim 8 as discussed above. Rahman also discloses:
the operating result information includes at least one of followings: an operating result of the current second circuit; an operating result received from the latter second circuit; and a fusion result of the operating result of the current second circuit and the operating result of the latter second circuit (Rahman discloses, at Figure 2 and related description, CLBs, which discloses generating an operating result of the current second circuit.).
Regarding claim 13, Rahman discloses the elements of claim 11 as discussed above. Rahman does not explicitly disclose the first circuit and the plurality of second circuits are interconnected by a tree interconnection, wherein the tree interconnection includes a root node, a plurality of subtree nodes, and a plurality of leaf nodes, wherein the root node is connected to the first circuit, each of the plurality of leaf nodes is connected to one second circuit of the plurality of second circuits; and the second circuit groups include one or more second circuits connected to leaf nodes belonging to a same subtree node.
However, in the same field of endeavor (e.g., processing circuits) Duong discloses:
a tree configuration (Duong discloses, at Figure 6 and related description, a neural network chip fabric that utilizes a tree structure, which discloses a root node, a plurality of subtree nodes, and a plurality of leaf nodes.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include the tree configuration disclosed by Duong in order to improve performance by allowing efficient communication between the various circuits.
Regarding claim 14, Rahman discloses the elements of claim 1 as discussed above. Rahman discloses the elements of claim 1 as discussed above. Rahman does not explicitly disclose incorporating the aforementioned features into a machine learning apparatus.
However, in the same field of endeavor (e.g., processing circuits) Duong discloses:
a neural networking apparatus (Duong discloses, at Figure 2 and related description, a neural network chip, which discloses a machine learning apparatus.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Rahman to include a machine learning apparatus, as disclosed by Duong, to improve performance by enabling utilization in a large number of commonly used artificial intelligence applications.
Response to Arguments
On page 1 of the response filed March 12, 2026 (“response”), the Applicant notes the title was amended to, “Start and Shutdown Controlling Mechanism in an Integrated Computing Apparatus.”
The Examiner respectfully submits that the amended title is still insufficiently descriptive of the claimed invention. All integrated circuits include some mechanism for controlling start and shutdown. Therefore, the amended title describes an inherent feature of all computers rather than Applicant’s claimed invention. In an effort to expedite prosecution, the Examiner has proposed language, above, that is intended to more clearly describe the claimed invention.
On pages 3-4 of the response the Applicant argues, “The cited portions of Rahman describe that a power management unit 210 may re-apply power to different portions of an FPGA in a sequential manner when the FPGA transitions from standby mode to normal mode. See Rahman, col. 11, lines 32-36. Rahman uses gating circuits to couple each of the FPGA (configurable) portions to an associated power rail. The gating circuits are independently controlled by the power management unit 210 so that power may be selectively and independently provided to each of the configurable portions. See Rahman, col. 11, lines 41-46. In other words, Rahman discloses a power management unit 210 (the first circuit) that independently controls each configurable portion in an FPGA (the second circuits). Rahman does not disclose the sequentially start and/or shut down of the plurality of second circuits as recited in claim 1, which includes (a) receiving the control information from the first circuit by a first second circuit in the plurality of second circuits, (b) starting and/or shutting down the first second circuit in response to the received control information; (c) generating confirmation information by the first second circuit based on a status the starting and/or shutting down of the first second circuit; and (d) sending the confirmation information to a second second circuit to start and/or shut down the second second circuit. That is, in claim 1, the sequential start and/or shut down of the plurality of second circuits is performed based on confirmation information generated and exchanged between adjacent ones of the plurality of second circuits. In contrast, Rahman discloses the configurable portions of an FPGA are sequentially powered up by a power management unit that independently controls each gating circuit connected to each of the configurable portions of the FPGA. Rahman does not disclose the sequential start and/or shut down of the plurality of second circuits as recited in claim 1.”
Though fully considered, the Examiner respectfully disagrees. Rahman explicitly discloses a power management unit, e.g., a first circuit, sequentially powering different portions, e.g., second circuits, of the FPGA. See, e.g., col. 11, lines 32-50. This involves one of the portions, i.e., a first second circuit, receiving control information from the power management unit and starting or stopping in response to the information.
Regarding generating and sending confirmation information, Rahman is not cited for these features. Instead, Vorbach is cited, as discussed below. Accordingly, the Applicant’s arguments are deemed unpersuasive.
On page 4 of the response the Applicant argues, “Vorbach does not disclose the claim limitations of “generating confirmation information by the first second circuit based on a status the starting and/or shutting down of the first second circuit; and sending the confirmation information to a second second circuit to start and/or shut down the second second circuit”. The office conceded that Rahman does not disclose that the start and/or shut down of the second circuits is based on confirmation information exchanged between adjacent ones of the plurality of second circuits. However, the office cited Vorbach for the deficiencies in Rahman. See FOA, page 4, 1st paragraph, citing ¶[0154] of Vorbach. The office misinterpreted Vorbach. The cited paragraph of Vorbach describes how an Executive Unit 0211 can decide whether the direct successors of the register r3 graph have actually received the result data, as a condition for the Executive Unit 0211 to retire. See Vorbach, id. One approach Vorbach discloses is to use “a confirmation signal” sent from all direct successors, confirming the reception and consumption of the register r3 data value. See Vorbach, ¶[0156]. The confirmation signal in Vorbach shouldn’t be construed as the confirmation information recited in claim 1. First, Vorbach’s confirmation signal confirms the reception and consumption of the register r3 data value, whilst the recited confirmation signal is generated based on, that is, related to the status of the starting and/or shutting down of one of the second circuits. Second, Vorbach’s confirmation signal is sent by direct successors to the Executive Unit 0211, not to each other as required by claim 1. Third, Vorbach’s confirmation signal is used for the Executive Unit 0211 to determine whether it should “retire”. In contrast, the confirmation information in claim 1 is sent by a first second circuit to a second second circuit to start or shut down the second second circuit. Therefore, Vorback’s confirmation signal differs from the recited confirmation information, in terms of content, destination, and purposes.”
Though fully considered, the Examiner respectfully disagrees. Vorbach discloses, e.g., at ¶ [0132], handshaking between producer and consumer execution units. When an upstream producer execution unit completes its task, the upstream unit generates and transmits a signal to a downstream consumer execution unit, enabling the downstream unit to begin its task. The Examiner submits that this discloses generating a confirmation based on a status of an operation.
It would have been obvious to utilize the well-known handshaking mechanism disclosed by Vorbach to transmit the power information disclosed by Rahman because doing so provides a simple and scalable mechanism to communicate between circuits that perform sequential operations. The combination discloses all elements of the Applicant’s claims. Accordingly, the Applicant’s arguments are deemed unpersuasive.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAWN DOMAN whose telephone number is (571)270-5677. The examiner can normally be reached on Monday through Friday 8:30am-6pm Eastern Time.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SHAWN DOMAN/Primary Examiner, Art Unit 2183
Prosecution Insights