Tech Center 2100 • Art Units: 2183
This examiner grants 66% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18908555 | ACCELERATING 2D CONVOLUTIONAL LAYER MAPPING ON A DOT PRODUCT ARCHITECTURE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 19001115 | SHADER INPUT DATA PROCESSING METHOD AND GRAPHICS PROCESSING APPARATUS | Non-Final OA | HUAWEI TECHNOLOGIES CO., LTD. |
| 18626929 | Hierarchical Trace Cache | Final Rejection | Apple Inc. |
| 18430952 | RUNTIME CONFIGURABLE MODULAR PROCESSING TILE | Non-Final OA | Arm Limited |
| 18414230 | OPERATION DISTRIBUTION ACROSS MULTIPLE PROCESSING CORES | Non-Final OA | Arm Limited |
| 18967123 | ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY | Non-Final OA | Intel Corporation |
| 18967172 | ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY | Non-Final OA | Intel Corporation |
| 18091599 | PREFIX EXTENSIONS FOR EXTENDED GENERAL PURPOSE REGISTERS WITH OPTIMIZATION FEATURES FOR NON-DESTRUCTIVE DESTINATIONS AND FLAGS SUPPRESSION | Non-Final OA | INTEL CORPORATION |
| 18091606 | INSTRUCTIONS AND SUPPORT FOR STACK PUSH AND POP | Non-Final OA | Intel Corporation |
| 18090749 | OPTIMIZING CONCURRENT EXECUTION USING NETWORKED PROCESSING UNITS | Non-Final OA | Intel Corporation |
| 17958365 | 8-BIT FLOATING POINT CLASSIFICATION AND MANIPULATION INSTRUCTIONS | Final Rejection | Intel Corporation |
| 17856978 | INSTRUCTIONS AND SUPPORT FOR HORIZONTAL REDUCTIONS | Final Rejection | Intel Corporation |
| 17712139 | VARIABLE-LENGTH INSTRUCTION STEERING TO INSTRUCTION DECODE CLUSTERS | Final Rejection | Intel Corporation |
| 17463398 | BFLOAT16 ARITHMETIC INSTRUCTIONS | Non-Final OA | Intel Corporation |
| 18554963 | CONFIGURABLE MEMORY POOL SYSTEM IMPLEMENTED USING CHIPLETS | Final Rejection | The Board of Trustees of the University of Illinois |
| 18717053 | NEURAL NETWORK ACCELERATING METHOD, ELECTRONIC DEVICE AND STORAGE MEDIUM | Final Rejection | SANECHIPS TECHNOLOGY CO., LTD. |
| 18990578 | Implicit Global Pointer Relative Addressing for Global Memory Access | Non-Final OA | MIPS Tech, LLC |
| 18475507 | SYSTEMS AND METHODS FOR RESYNCHRONIZATION AT EXECUTION TIME | Non-Final OA | Advanced Micro Devices, Inc. |
| 18971323 | DATA-FLOW-DRIVEN RECONFIGURABLE PROCESSOR CHIP AND RECONFIGURABLE PROCESSOR CLUSTER | Non-Final OA | Beijing Tsingmicro Intelligent Technology Co., Ltd. |
| 18376454 | INSTRUCTION COMPRESSION METHOD, INSTRUCTION DECOMPRESSION METHOD AND PROCESS COMPRESSION METHOD | Final Rejection | SigmaStar Technology Ltd. |
| 18853927 | A COMPUTER PROCESSOR | Final Rejection | TECHNISCHE UNIVERSITÄT BERLIN |
| 18169007 | NEURAL NETWORK ACCELERATOR ARCHITECTURE BASED ON CUSTOM INSTRUCTION ON FPGA | Non-Final OA | EFINIX, INC. |
| 16824298 | OPERATION METHOD, APPARATUS AND RELATED PRODUCT | Final Rejection | Cambricon Technologies Corporation Limited |
| 18519590 | PROCESSOR WITH SELECTOR SELECTING HELD DATA OR OPERATION RESULT DATA | Final Rejection | NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITY |
| 18603171 | APPARATUS AND METHOD FOR IMPLEMENTING MANY DIFFERENT LOOP TYPES IN A MICROPROCESSOR | Final Rejection | Simplex Micro, Inc. |
| 18369532 | PARALLEL PROCESSING DEVICE | Final Rejection | MORUMI CO., LTD. |
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