Prosecution Insights
Last updated: April 19, 2026
Application No. 18/011,544

Manufacturing Method of Display Panel and Display Panel

Non-Final OA §103
Filed
Dec 20, 2022
Examiner
DEGRASSE, IAN ISAAC
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Techonology Co. Ltd.
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
3y 5m
To Grant
61%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
10 granted / 12 resolved
+15.3% vs TC avg
Minimal -22% lift
Without
With
+-22.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
54 currently pending
Career history
66
Total Applications
across all art units

Statute-Specific Performance

§103
51.7%
+11.7% vs TC avg
§102
34.8%
-5.2% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 12 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 12, 2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 3-11 are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0335429 A1 to Okaue et al. (hereinafter “Okaue” – previously cited reference) in further view of US 2021/0407338 A1 to Zhu (hereinafter “Zhu” – previously cited reference). Regarding claim 1, Okaue discloses a manufacturing method of a display panel, comprising: providing a metal film and a back plate, a first surface of the back plate being provided with a plurality of first wires (method of manufacturing display panel having flexible printed circuit board 1 utilizing conductive pattern 10 layer and a base film 2 comprising first portion of conductive pattern 3 wiring on top surface thereof; Figs. 1-2; paragraphs [0034]-[0035], [0085]-[0086]); disposing a soldering aid layer on the metal film, the soldering aid layer being doped with conductive particles (solder coating layer 9 disposed on conductive pattern 10, where layer 9 may comprise tin fine particles; abstract; Figs. 1-2; paragraphs [0034]-[0035], [0085]-[0086]); contacting a surface of the metal film disposed with the soldering aid layer with a side surface of the back plate (side of conductive pattern 10 having layer 9 contacting a side surface of base film 2 when in bent configuration; Figs. 2, 5 and 7), wherein the back plate continuously extends, the side surface is perpendicular to the first surface (side surface of the base film 2 in bent configuration is perpendicular to the top surface of the base film 2 which continuously extends along entirety thereof; Figs. 2 and 5), and performing a hot-pressing treatment on the metal film, so that the soldering aid layer is converted into a welding portion (heat treatment of board 1 results in alloying of solder coating layer 9 with copper of pattern 10; paragraph [0060]), and the metal film is electrically connected to the plurality of first wires through the welding portion (alloyed layer 9 and pattern 10 are electrically coupled to first portion of pattern 3 wiring; Figs. 1-2; paragraph [0060]); bending the metal film so that the bent metal film is in contact with a second surface of the back plate (conductive pattern 3 comprising pattern 10 layer is bent such that a second portion of pattern 3 is disposed on a side and bottom surfaces of film 2; Figs. 2 and 5; paragraph [0079]), wherein the second surface and the first surface are on two opposite sides of the back plate respectively (top and bottom surfaces of film 2 opposite one another; Fig. 2); patterning the metal film and the welding portion to form a plurality of second wires, the second wires being disposed on the side surface and the second surface of the back plate, and the second wires being electrically connected to corresponding ones of the first wires (alloyed layer 9 and pattern 10 are patterned in a manner that forms wires in the second portion of conductive pattern 3 wiring electrically coupled to first portion of conductive pattern 3 wiring and disposed on the side and bottom surfaces of film 2; Figs. 2 and 5; paragraph [0079]); and disposing a plurality of light-emitting devices on the first surface of the back plate (display panel DP disposed on top surface of film 2; Fig. 5; paragraph [0079]). Okaue fails to disclose remaining the back plate unbent; wherein the side surface of the back plate is flat; bending the metal film while remaining the back plate unbent so that the bent metal film is in contact with a second surface of the back plate. However, Zhu discloses remaining the back plate unbent (back plate 210, 220 is unbent; Fig. 2); wherein the side surface of the back plate is flat (side surface of back plate 210, 220 is flat; Fig. 2); bending the metal film while remaining the back plate unbent so that the bent metal film is in contact with a second surface of the back plate (display panel 100 comprising bending portion 110, first portion 120, and second portion 130 that respectively are coupled to top, side and bottom surfaces of back plate 210, 220; Fig. 2; paragraphs [0026], [0032]). Okaue and Zhu are both considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Okaue to incorporate the teaching of Zhu in order to potentially provide a simplified backplate construction and manufacturing process, improved electromagnetic interference shielding, enhanced heat dissipation, and increased mechanical strength and durability. Regarding claim 3, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue further discloses wherein the conductive particles are selected from one or more of gold conductive particles, tin conductive particles, silver conductive particles, and indium conductive particles (solder coating layer 9 disposed on conductive pattern 10, where layer 9 may comprise tin fine particles; abstract; Figs. 1-2; paragraphs [0034]-[0035], [0085]-[0086]). Regarding claim 4, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue further discloses wherein in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the soldering aid layer further covers upper surfaces of the first wires (solder coating layer 9 disposed over first portion of conductive pattern 3 wiring; Fig. 2; paragraphs [0034]-[0035]). Regarding claim 5, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 4. Okaue further discloses wherein in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the welding portion comprises a first welding portion and a second welding portion (heat treatment of board 1 results in alloying of first and second portions of solder coating layer 9 respectively with first and second portions of copper of pattern 10; Fig. 2; paragraph [0060]); and in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the performing of the hot-pressing treatment on the metal film comprises: performing a first hot-pressing treatment on the metal film located on the side surface of the back plate, so that the soldering aid layer located on the side surface of the back plate is converted into the first welding portion, and the first welding portion is in contact with end surfaces of the first wires (heat treatment of board 1 results in alloying of solder coating layer 9 with copper of pattern 10 on first side of IC chip 14 at an end of first portion of pattern 3 wiring; Fig. 2; paragraph [0060]); and performing a second hot-pressing treatment on the soldering aid layer located on the first surface of the back plate, so that the soldering aid layer located on the first surface of the back plate is converted into the second welding portion, the second welding portion is in contact with the upper surfaces of the first wires, and the first welding portion and the second welding portion are electrically connected (heat treatment of board 1 results in alloying of solder coating layer 9 with copper of pattern 10 on second side of IC chip 14 at an end of second portion of pattern 3 wiring, where each alloyed portion on either side of IC chip 14 are electrically connected; Fig. 2; paragraph [0060]). Regarding claim 6, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 4. Okaue further discloses wherein in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the metal film further covers the soldering aid layer located on the first wires (alloyed layer 9 and pattern 10 cover first portion of pattern 3 wiring; Fig. 2). Regarding claim 7, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 6. Okaue further discloses wherein in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the welding portion comprises a first welding portion and a second welding portion; and in the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the performing of the hot-pressing treatment on the metal film comprises: performing a first hot-pressing treatment on the metal film located on the side surface of the back plate, so that the soldering aid layer located on the side surface of the back plate is converted into the first welding portion, and the first welding portion is in contact with end surfaces of the first wires; and performing a second hot-pressing treatment on the metal film located on the first surface of the back plate, so that the soldering aid layer located on the first surface of the back plate is converted into the second welding portion, the second welding portion is in contact with the upper surfaces of the first wires, and the first welding portion and the second welding portion are electrically connected (see claim 5). Regarding claim 8, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue further discloses wherein after the patterning of the metal film and the welding portion, the manufacturing method of the display panel further comprises: bonding a chip on film onto the second wires located on the second surface of the back plate (IC chip 14 bonded onto second portion of conductive pattern 3 wiring of film 2; Fig. 5; paragraphs [0038], [0075]-[0076]). Regarding claim 9, Okaue in view of Zhu discloses manufacturing method of the display panel according to claim 8. Okaue further discloses wherein after the step of bonding the chip on film onto the second wires located on the second surface of the back plate, the manufacturing method of the display panel further comprises: encapsulating the first wires and the second wires. Okaue fails to disclose encapsulating the chip on film. However, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Okaue to incorporate encapsulation of the chip on film as it would only require an bridging a gap between the encapsulation layers on either side of the IC chip which is a mere duplication or extension of existing parts already disclosed in the same context and further for the advantage of sealing the IC chip from external detritus which would affect its functionality. Regarding claim 10, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue further discloses wherein in the disposing of the soldering aid layer, the soldering aid layer is formed by coating soldering aid flux on the metal film (solder coating layer 9 is coated via deposition onto pattern 10; paragraphs [0035], [0085]-[0086]). Regarding claim 11, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue further discloses wherein a material of the metal film is copper foil or silver foil (pattern 10 comprises copper foil; paragraphs [0035], [0085]-[0086]). Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Okaue in further view of Zhu and US 2017/0311454 A1 to Rieg et al. (hereinafter “Rieg” – previously cited reference). Regarding claim 2, Okaue in view of Zhu discloses the manufacturing method of the display panel according to claim 1. Okaue fails to disclose wherein subsequent to the disposing of the soldering aid layer and preceding the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the manufacturing method of the display panel further comprises: performing a precuring treatment on the soldering aid layer. However, Rieg discloses wherein subsequent to the disposing of the soldering aid layer and preceding the contacting of the surface of the metal film disposed with the soldering aid layer with the side surface of the back plate, the manufacturing method of the display panel further comprises: performing a precuring treatment on the soldering aid layer (pattern of solder paste may be cured prior to reflow process and forming completed flexible electronic substrate in order to reduce final cure time; abstract; paragraphs [0004], [0006], [0040]). Okaue and Rieg are both considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Okaue to incorporate the teaching of Rieg in order to potentially provide reduced final curing times which expedites manufacturing times. Response to Arguments Applicant's arguments filed January 12, 2026 have been fully considered. Applicant amends claim 1 and provides corresponding arguments. Argument 1 is not persuasive given Applicant merely claims a "first surface" and a "side surface" and does not claim abrupt transitions or boundaries between each surface and, much like a circle can have top, bottom, left and right sides which are inherently perpendicular to one another to add up to a 360 degree full arc, so too does the bent base film 2 have a side surface that is perpendicular to its top surface. Moreover, when one magnifies a portion of a curved surface to a sufficient degree, that surface begins to appear as a straight line which is related to the concept of a line tangent to the curved surface, which further supports the notion of the bent base film 2 having a side surface that is perpendicular to its top surface. Examiner does agree, however, that Okaue fails to completely disclose the limitations amended into claim 1, but Zhu does disclose those amended limitations not disclosed by Okaue. In Argument 2, Applicant provides a conclusory statement that “the second wires being disposed on the side surface and the second surface of the back plate” is not disclosed by Okaue. However, Okaue discloses the alloyed layer 9 and pattern 10 are patterned in a manner that forms wires in the second portion of conductive pattern 3 wiring electrically coupled to first portion of conductive pattern 3 wiring and disposed on the side and bottom surfaces of film 2 (see Figs. 2 and 5 and paragraph [0079] of Okaue). Fig. 2 clearly shows front conductive pattern 3 extending across the entire surface of base film 2 but for where IC chip 14 is disposed which separates pattern 3 into first and second portions as denoted in the related claim analysis. The second portion of pattern 3 comprises alloyed layer 9 and pattern 10 which forms wires therein which are disposed on the side surface of film 2 as shown when cross-referencing Figs. 2 and 5. In Argument 3, Applicant asserts that back plate 210, 220 of Zhu cannot be considered the back plate as claimed in claim 1. However, back plate 210 is the first portion of the back plate of Zhu and back plate 220 is the second portion of the back plate of Zhu, each of which are made of the same material and collectively function to provide a back plate for the display device 1000 of Zhu. While Examiner agrees that the two portions of back plate 210, 220 are not structurally continuous with one another, Okaue discloses this feature and Zhu teaches the two portions of back plate 210, 220 to be made of the same material and oriented in the same direction parallel to one another which renders a continuous construction obvious and provides additional motivation supporting the combination of Okaue and Zhu. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF NATALINI can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IAN DEGRASSE/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Dec 20, 2022
Application Filed
Aug 09, 2025
Non-Final Rejection — §103
Sep 09, 2025
Response Filed
Oct 08, 2025
Final Rejection — §103
Nov 11, 2025
Response after Non-Final Action
Jan 12, 2026
Request for Continued Examination
Jan 27, 2026
Response after Non-Final Action
Mar 07, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
61%
With Interview (-22.2%)
3y 5m
Median Time to Grant
High
PTA Risk
Based on 12 resolved cases by this examiner. Grant probability derived from career allow rate.

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