DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-4 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Hozumi et al. (US 20100032791 A1, hereinafter Hozumi‘791) in view of TAMAKI et al. (US 20140299961 A1, hereinafter Tamaki‘961) of record.
Regarding independent claim 1, Hozumi‘791 teaches, “A silicon carbide semiconductor device (fig. 1-8; ¶¶ [0052] – [0146]) comprising:
a substrate (110, fig. 2C-2D) composed of a silicon carbide semiconductor (¶ []) having a first conductivity type (N+, ¶ [0073]);
an active region (3) provided on a portion of a first main surface of the substrate (110);
a peripheral region (5) provided on the substrate (110) and surrounding the active region (3) when viewed in a plan view (fig. 2C); and
a first electrode (‘drain electrode’, ¶ [0073]) provided on a second main surface of the substrate (110) opposite to the first main surface, wherein the active region (3) includes
a first super junction layer (124, 122) that is provided above the substrate (110) and that alternately has a first region (124) having the first conductivity type (N) and a second region (122) having a second conductivity type (P),
an element layer (126, source, gate etc, fig. 8N) provided above the first super junction layer, and
a second electrode (‘source electrode’, fig. 8N) provided on the element layer,
the peripheral region (5, fig. 2D) includes
a second super junction layer (124, 123) that is provided above the substrate (110) and that alternately has a third region (124) having the first conductivity type (N) and a fourth region (123) having the second conductivity type (P),
a termination layer (130) that is provided on and in contact with the second super junction layer (124, 123) and that alternately has a fifth region (part of 130 not overlap) having the second conductivity type (P) and a sixth region (overlap part of element 130) having the second conductivity type (P), and
an insulating layer (142, 144, fig. 8N) in contact with each of an upper end surface of the fifth region and an upper end surface of the sixth region,
the fifth region is provided to correspond to the third region (124), and the sixth region is provided to correspond to the fourth region (123), and
an impurity concentration of the sixth region (‘OVERLAP’, fig. 2D) Is larger than an impurity concentration of the fifth region and is 68 times or less as large as the impurity concentration of the fifth region,
the peripheral region (5) includes a channel stopper surrounding the active region when viewed in a plan view,
the channel stopper (140, fig. 8N) has the first conductivity type,
((an impurity concentration of the channel stopper is larger than the impurity concentration of each of the first region and the third region,))
the element layer includes a first impurity region (drift region, fig. 8) having the first conductivity type (N), a second impurity region (126, P-Base region) in contact with the first impurity region and having the second conductivity type (P), and a third impurity region (n+ source region) separated from the first impurity region by the second impurity region and having the first conductivity type,
each of the fifth region and the sixth region (120) has a thickness smaller than that of the second impurity region (126, P-Base region).
But Hozumi‘791 is silent upon the provision of wherein
an impurity concentration of the channel stopper is larger than the impurity concentration of each of the first region and the third region.
However, channel stopper is a common feature in a vertical MOSFET. Example prior art Tamaki‘961 teaches a similar device (fig. 1-4) comprising below:
the peripheral region (4) includes a channel stopper (18, n+) surrounding the active region (3) when viewed in a plan view,
the channel stopper (18) has the first conductivity type (n+),
an impurity concentration (n+) of the channel stopper (18) is larger than the impurity concentration of each of the first region (6a, p) and the third region (1e, n).
Hozumi‘791 and Tamaki‘961 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hozumi‘791 with the features of Tamaki‘961 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Hozumi‘791 and Tamaki‘961 to include a channel stopper according to the teachings of Tamaki‘961 with a general motivation of stabilizing the breakdown voltage and improving the reliability of the device.
Note: Prior art Tamaki‘961 in above rejection can be replaced by any one of the below prior arts:
SAITO et al. (US 20090101974 A1),
Yamaguchi et al. (US 20030222327 A1),
Saito et al. (US 20050280086 A1), and
ONO et al. (US 20140191310 A1).
Regarding claim 2, Hozumi‘791 modified with Tamaki‘961 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein the impurity concentration of the sixth region (‘OVERLAP’, fig. 2D, Hozumi‘791) is larger than an impurity concentration of the fourth region (123)”.
Regarding claim 3, Hozumi‘791 modified with Tamaki‘961 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein an absolute value of a difference between the impurity concentration of the fifth region (part of 130 not overlap, fig. 2D, Hozumi‘791) and the impurity concentration of the sixth region (‘OVERLAP’, fig. 2D, Hozumi‘791) is substantially equal to a sum of an impurity concentration of the third region (n+ source region) and an impurity concentration of the fourth region (123)”.
Regarding claim 4, Hozumi‘791 modified with Tamaki‘961 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein a first distance between an upper end surface of the element layer and a boundary surface between the element layer and the first super junction layer is larger than a second distance between an upper end surface of the termination layer and a boundary surface between the termination layer and the second super junction layer (see fig. 2D with fig. 8N of Hozumi‘791).
Regarding claim 10, Hozumi‘791 modified with Tamaki‘961 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein a pitch of the first super junction layer (124, 122, fig. 2D, Hozumi‘791) is substantially the same as a pitch of the second super junction layer (124, 123)”.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Hozumi‘791 modified with Tamaki‘961 as applied to claim 1 as above, and further in view of EGUCHI; Satoshi et al. (US 20150200293 A1, hereinafter Eguchi‘293) of record.
Regarding claim 5, Hozumi‘791 modified with Tamaki‘961 teach all the limitations described in claim 1.
But Hozumi‘791 modified with Tamaki‘961 is silent upon the provision of wherein
each of the first region and the third region has a first portion, and a second portion located between the first portion and the substrate,
each of the second region and the fourth region has a third portion in contact with the first portion, and a fourth portion in contact with the second portion and located between the third portion and the substrate,
in a cross section perpendicular to the second main surface and parallel to a direction from the first region toward the second region,
a width of the second portion is larger than a width of the first portion,
a width of the fourth portion is smaller than a width of the third portion,
the width of the first portion is smaller than a height of the first portion, and
the width of the third portion is smaller than a height of the third portion, and
an impurity concentration of each of the first portion and the third portion is larger than an impurity concentration of each of the second portion and the fourth portion.
However, Eguchi‘293 teaches a similar power device (fig. 2), wherein
each of the first region (N-pillar/EPI in CR region) and the third region (N-pillar/EPI in PER region) has a first portion (upper portion), and a second portion (lower portion) located between the first portion and the substrate (1S),
each of the second region (PCR in CR region) and the fourth region (PCR in PER region) has a third portion (upper portion) in contact with the first portion, and a fourth portion (lower portion) in contact with the second portion and located between the third portion and the substrate (1S),
in a cross section perpendicular to the second main surface and parallel to a direction from the first region toward the second region,
a width of the second portion is larger than a width of the first portion,
a width of the fourth portion is smaller than a width of the third portion,
the width of the first portion is smaller than a height of the first portion, and
the width of the third portion is smaller than a height of the third portion, and
an impurity concentration of each of the first portion (concentration of n-dopants) and the third portion (concentration of p-dopants) is larger than an impurity concentration of each of the second portion (concentration of p-dopants) and the fourth portion (concentration of n-dopants).
Hozumi‘791 modified with Tamaki‘961 and Eguchi‘293 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hozumi‘791 modified with Tamaki‘961 with the features of Eguchi‘293 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Hozumi‘791 modified with Tamaki‘961 and Eguchi‘293 to form the n and o type columns according to the teachings of Eguchi‘293 in order ‘to minimize the local current concentration of the avalanche current, and to prevent the avalanche current from exceeding the avalanche resistance’. See Eguchi‘293, ¶ 0012.
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Hozumi‘791 modified with Tamaki‘961 as applied to claim 1 as above, and further in view of FURUHASHI et al. (US 20190333988 A1, hereinafter Furuhashi‘988) of record.
Regarding claim 6, Hozumi‘791 modified with Tamaki‘961 teaches all the limitations described in claim 1.
But Hozumi‘791 modified with Tamaki‘961 is silent upon the provision of wherein the silicon carbide semiconductor device according to claim 1, wherein
an impurity concentration of each of the first region and the third region is 3x1016 cm-3 or more and 5x1017 cm-3 or less, and
an impurity concentration of each of the second region and the fourth region is 3x1016 cm-3 or more and 5x10'” cm-3 or less.
However, Furuhashi‘988 teaches a similar device (fig. 1-3), wherein
an impurity concentration of each of the first region and the third region is 3x1016 cm-3 or more and 5x1017 cm-3 or less (¶ 0070), and
an impurity concentration of each of the second region and the fourth region is 3x1016 cm-3 or more and 5x1017 cm-3 or less (¶ 0074).
Hozumi‘791 modified with Tamaki‘961 and Furuhashi‘988 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hozumi‘791 modified with Tamaki‘961 with the features of Furuhashi‘988 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Hozumi‘791 modified with Tamaki‘961 and Furuhashi‘988 to form the first, second, third, fourth regions with claimed concentration according to the teachings of Furuhashi‘988 with a motivation of controlling on resistance and breakdown voltage. See Furuhashi‘988, ¶ [0001] - ¶ [0008].
Regarding claim 7, Hozumi‘791 modified with Tamaki‘961 and Furuhashi‘988 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein
a first buffer layer (part of element 4 between the element 3 and the layers 5a, 6a, , Furuhashi‘988) having the first conductivity type (N) is provided between the first super junction layer (5a, 6a) and the substrate (3), and
a second buffer layer (part of element 4 between the element 3 and the layers 5b, 6b) having the first conductivity type (N) is provided between the second super junction layer (5b, 6b) and the substrate (3)”.
Regarding claim 8, Hozumi‘791 modified with Tamaki‘961 and Furuhashi‘988 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein
the element layer is provided with a trench (18, Furuhashi‘988) that has a side surface constituted of each of the first impurity region (5a), the second impurity region (6a), and the third impurity region (5b), and that has a bottom portion contiguous to the side surface and constituted of the first impurity region (5a),
the first electrode (15) is a source electrode, and the second electrode (15) is a drain electrode, and
a gate electrode (131) is provided inside the trench (18)”.
Regarding claim 9, Hozumi‘791 modified with Tamaki‘961 further teaches, “The silicon carbide semiconductor device according to claim 1, wherein the first main surface corresponds to a {0001} plane or a plane inclined at an angle of 8° or less with respect to the {0001} plane (¶ 0070, , Furuhashi‘988)”.
Allowable Subject Matter
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding dependent claim 11, the prior arts of record do not anticipate or make obvious, inter alia, the step of: “wherein the channel stopper includes a first channel stopper region extending through the first region, the second region, the third region, and the fourth region and a second channel stopper region extending through the third region”.
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817