Prosecution Insights
Last updated: August 18, 2026
Application No. 18/016,220

DISPLAY DEVICE USING SEMICONDUCTOR LIGHT-EMITTING ELEMENT, AND METHOD FOR MANUFACTURING SAME

Final Rejection §103§112
Filed
Jan 13, 2023
Priority
Jul 17, 2020 — nonprovisional of PCTKR2020009443
Examiner
XU, ZHIJUN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Electronics Inc.
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
52 granted / 67 resolved
+9.6% vs TC avg
Moderate +10% lift
Without
With
+10.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
27 currently pending
Career history
104
Total Applications
across all art units

Statute-Specific Performance

§103
68.2%
+28.2% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 67 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed on Apr. 28th 2026 has been entered. Claims 1-2 and 4-14 remain pending in the application. Applicant’s amendments to the Claims and Specification (Title) have overcome each and every objection previously set forth in the Non-Final Office Action mailed on Jan. 28th 2026. Claims 1-2, 4-6 and 14 are examined in this office action. Claims 7-13 are withdrawn from further consideration. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-2, 4-6 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "when a defective..." in line 15 and "when all of..." in line 18 makes the limitations conditional. These limitations are If-then statements, which are indefinite. The limitations do not have to be true, in which case the rest of the limitation is irrelevant. Therefore, the new limitations do not carry patentable weight, since it is unclear if the required conditions are met. For examination purposes, examiner has interpreted "when a defective..." and "when all of..." to be read as "includes a defective..." and "includes all of...". Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-2, 4 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 20170338211) in view of Lai et al. (US 20180159088). Regarding claim 1, Lin teaches a display device (Abstract) comprising: a base portion (fig. 1, substrate 102; para. 0027) comprising a plurality of pixel regions (region of fig. 1 from the array of display device 10; para. 0026); a plurality of semiconductor light-emitting elements (red light emitting unit RU, green light emitting unit GU, blue light emitting unit BU; para. 0040) disposed in the plurality of pixel regions (fig. 1); and a plurality of thin-film transistors (transistors T; para. 0027) disposed in the plurality of pixel regions (fig. 1) to drive the semiconductor light-emitting elements (RU, GU, BU), wherein the plurality of pixel regions (regions of fig. 1) comprise a first sub-pixel region (left top region) in which a red semiconductor light-emitting element (RU) is disposed, a second sub-pixel region (middle top region) in which a green semiconductor light-emitting element (GU) is disposed, a third sub-pixel region (right top region) in which a blue semiconductor light-emitting element (BU) is disposed, and a fourth sub-pixel region (one bottom region) in which any one of red, green and blue light-emitting elements (one of RU, GU, BU) can be disposed, and wherein the thin-film transistors (T) are disposed in the first to fourth sub-pixel regions (three top and bottom regions), respectively. Lin fails to explicitly teach the plurality of pixel regions comprise: a first pixel region in which, when a defective semiconductor light-emitting element is disposed in any one of the first to third sub-pixel regions, a semiconductor light-emitting element for repair purposes is disposed in the fourth sub-pixel region; and a second pixel region in which, when all of the semiconductor light-emitting elements disposed in the first to third sub-pixel regions are normal, the semiconductor light-emitting element for repair purposes is not disposed in the fourth sub-pixel region. However, Lai teaches the plurality of pixel regions (Lai: annotated fig. 1B, 3*2 pixels P; para. 0029, similar to fig. 1 of Lin) comprise: a first pixel region (the bottom square region) in which, when a defective semiconductor light-emitting element (Lai: dead light emitting device DLD; para. 0033) is disposed in any one of the first to third sub-pixel regions (Lai: second sub-pixel SP2 of first sub-pixel SP1, second sub-pixel SP2, third sub-pixel SP3; para. 0029, similar to top 3 regions of Lin), a semiconductor light-emitting element (Lai: compensating light emitting devices 130; para. 0035) for repair purposes (Lai: repair method; para. 0035) is disposed in the fourth sub-pixel region (Lai: SP2 below, similar to one bottom region of Lin); and a second pixel region (the left top square region) in which, when all of the semiconductor light-emitting elements (Lai: light emitting device 120; para. 0036, similar to RU, GU, BU of Lin) disposed in the first to third sub-pixel regions (Lai: SP1-3 top) are normal, the semiconductor light-emitting element (Lai: 130) for repair purposes is not disposed in the fourth sub-pixel region (Lai: SP1-3 below). Lai and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the semiconductor light-emitting element for repair purposes as taught by Lai. Doing so would realize a repair method of the display to improves display quality of the repaired display (Lai: para. 0050). PNG media_image1.png 463 606 media_image1.png Greyscale (annotated fig. 1B) Regarding claim 2, Lin in view of Lai teaches the display device of claim 1, wherein the first to fourth sub-pixel regions (Lin: fig. 1, three top and bottom regions) are arranged in a plurality of rows and columns (Lin: 2 rows and 3 columns) in the plurality of pixel regions (Lin: regions of fig. 1). Regarding claim 4, Lin in view of Lai teaches the display device of claim 1, further comprising: a wiring electrode (Lin: fig. 1, scan lines SL, data lines DL; para. 0027) disposed to pass through the plurality of pixel regions (Lin: regions of fig. 1); wherein the wiring electrode (Lin: SL, DL) comprises: a gate electrode (Lin: SL) extending in a first direction (horizontal); and a data electrode (Lin: DL) extending in a second direction (vertical) crossing the first direction (horizontal), and wherein the gate electrode (Lin: SL) and the data electrode (Lin: DL) are electrically connected to the thin-film transistors (Lin: T). Regarding claim 14, Lin in view of Lai teaches the display device of claim 1, wherein, in the first pixel region (Lai: annotated fig. 1B, the bottom square region), the semiconductor light-emitting element (130) disposed in the fourth sub-pixel region (Lai: SPp2 below) for repair purposes (Lai: repair method) has a same color emission (Lai: same emission color; para. 0037) as that of the defective semiconductor light-emitting element (Lai: DLD) in one of the first to third sub-pixel regions (Lai: SP1-3). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Lai as applied to claim 4 above, and further in view of Kim et al. (US 20180190631) and Song et al. (US 20200027938). Regarding claim 5, Lin in view of Liao teaches the display device of claim 4, wherein the wiring electrode (Lin: fig. 4, SL, DL further) comprises: a Vss electrode (Lin: power supply voltage Vss; para. 0057) disposed; and a Vdd electrode (Lin: power supply voltage Vdd; para. 0057) disposed, to which a power supply voltage (Lin: power supply voltage; para. 0057) is applied, and Lin in view of Lai fails to teach Vss electrode disposed in parallel to the gate electrode, Vdd electrode disposed in parallel to the data electrode. However, Kim teaches Vss electrode (Kim: fig. 3, common power lines CPL; para. 0053, similar to Vss of Lin) disposed in parallel to the gate electrode (Kim: gate lines GL; para. 0053, similar to SL of Lin), Vdd electrode (Kim: driving power lines DPL; para. 0053, similar to Vdd of Lin) disposed in parallel to the data electrode (Kim: data lines DL; para. 0053, similar to DL of Lin). Kim, Lai and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add Vss electrode disposed in parallel to the gate electrode and Vdd electrode disposed in parallel to the data electrode as taught by Kim. Doing so would realize a structure with reduced number of the driving power lines and decrease the size of each of the unit pixel (Kim: para. 0060). In addition, Lin in view of Lai and Kim fails to teach a ground voltage is applied to Vss, Vss electrode is electrically connected to the thin-film transistors, and the Vdd electrode is electrically connected to the semiconductor light-emitting elements. However, Song teaches a ground voltage (Song: fig. 1B, a low voltage to the ground; para. 0018) is applied to Vss (Song: second voltage terminal Vss; para. 0018, similar to Vss of Lin), Vss electrode (Song: Vss) is electrically connected to the thin-film transistors (Song: driving transistor T2; para. 0018, similat to T of Lin), and the Vdd electrode (Song: first voltage terminal Vdd; para. 0018, similar to Vdd of Lin) is electrically connected to the semiconductor light-emitting elements (Song: OLED; para. 0018, similar to RU/GU/BU of Lin). Song, Kim, Lai and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add Vss electrode is electrically connected to the thin-film transistors, and the Vdd electrode is electrically connected to the semiconductor light-emitting elements as taught by Song. Doing so would realize a circuit setting with relatively high switching speed as well as a relatively large to improve display performance (para. 0021). Further, it has been held that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Lai, Kim and Song as applied to claim 5 above, and further in view of Kim et al. (US 20180190631). Regarding claim 6, Lin in view of Lai, Kim and Song teaches the display device of claim 5 including the semiconductor light-emitting elements (Lai: annotated fig. 1B, 120 with DLD) from any one of the first to third sub-pixel regions (Lai: SP2 with DLD) of the first pixel region (the bottom square region). Lin in view of Lai, Kim and Song fails to teach an electrical connection between the semiconductor light-emitting elements and the Vdd electrode has a gap. However, Liao teaches an electrical connection (Liao: fig. 4C, connecting wire 260; para. 0044) between the semiconductor light-emitting elements (Liao: LEDs D; para. 0042) and the Vdd electrode (Liao: second wire w4; para. 0045, similar to Vdd of Song) has a gap (Liao: a gap of cutting portion 2610; para. 0044). Liao, Song, Kim, Lai and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the electrical connection with a gap as taught by Liao. Doing so would realize related repairing method can be performed to eliminate the short-circuit defect and then enhance the yield rate of display panels (Liao: para. 0032, 0034).. Response to Arguments Applicant’s arguments with respect to claims 1-2, 4-6 and 14 of prior art rejections (35 USC 102/103) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHIJUN XU whose telephone number is (571)270-3447. The examiner can normally be reached Monday-Thursday 9am-5pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ZHIJUN XU/Examiner, Art Unit 2818 /BRIAN TURNER/Examiner, Art Unit 2818
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Prosecution Timeline

Jan 13, 2023
Application Filed
Jan 28, 2026
Non-Final Rejection mailed — §103, §112
Apr 28, 2026
Response Filed
Jul 14, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
78%
Grant Probability
88%
With Interview (+10.0%)
3y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 67 resolved cases by this examiner. Grant probability derived from career allowance rate.

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