DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on Dec. 24th 2025 is acknowledged. Claims 1-6 are examined in this office action. Claims 7-13 are withdrawn from further consideration.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
Claim 6 is objected to because of the following informalities:
In claim 6, line 3, “is removed" should read “has a gap”. Because it is a method step. I will suggest changing the limitation based on the final structure.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Lin et al. (US 20170338211), hereinafter Lin.
Regarding claim 1, Lin teaches a display device (Abstract) comprising:
a base portion (fig. 1, substrate 102; para. 0027) comprising a plurality of pixel regions (region of fig. 1 from the array of display device 10; para. 0026);
a plurality of semiconductor light-emitting elements (red light emitting unit RU, green light emitting unit GU, blue light emitting unit BU; para. 0040) disposed in the plurality of pixel regions (fig. 1); and
a plurality of thin-film transistors (transistors T; para. 0027) disposed in the plurality of pixel regions (fig. 1) to drive the semiconductor light-emitting elements (RU, GU, BU),
wherein the plurality of pixel regions (fig. 1) comprise a first sub-pixel region (left top region) in which a red semiconductor light-emitting element (RU) is disposed, a second sub-pixel region (middle top region) in which a green semiconductor light-emitting element (GU) is disposed, a third sub-pixel region (right top region) in which a blue semiconductor light-emitting element (BU) is disposed, and a fourth sub-pixel region (one bottom region) in which any one of red, green and blue light-emitting elements (one of RU, GU, BU) can be disposed, and
wherein the thin-film transistors (T) are disposed in the first to fourth sub-pixel regions (three top and bottom regions), respectively.
Regarding claim 2, Lin teaches the display device of claim 1, wherein the first to fourth sub-pixel regions (fig. 1, three top and bottom regions) are arranged in a plurality of rows and columns (2 rows and 3 columns) in the plurality of pixel regions (fig. 1).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Liao et al. (US 20190157340 from IDS).
Regarding claim 3, Lin teaches the display device of claim 2, wherein the plurality of pixel regions (regions of fig. 1) comprise:
a first pixel region (region of fig. 1) comprising the fourth sub-pixel region (one bottom region) in which the semiconductor light-emitting elements (RU, GU, BU) are disposed.
Lin fails to explicitly teach a second pixel region comprising the fourth sub-pixel region in which the semiconductor light-emitting elements are not disposed.
However, Liao teaches a second pixel region (Liao: region with fig. 4C, with several sub pixel region ZP; para. 0026) comprising the fourth sub-pixel region (Liao: ZP, similar to one bottom region of Lin) in which the semiconductor light-emitting elements (Liao: LEDs D at alternative connecting regions ZS3 is missing; para. 0042) are not disposed.
Liao and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the fourth sub-pixel region in which the semiconductor light-emitting elements are not disposed as taught by Liao.
Doing so would find an open-circuit defect because micro LED not disposed and related repairing method can be performed to eliminate the defect and then enhance the yield rate of display panels (Liao: para. 0032, 0033).
Regarding claim 4, Lin in view of Liao teaches the display device of claim 3, further comprising:
a wiring electrode (Lin: fig. 1, scan lines SL, data lines DL; para. 0027) disposed to pass through the plurality of pixel regions (Lin: regions of fig. 1);
wherein the wiring electrode (Lin: SL, DL) comprises:
a gate electrode (Lin: SL) extending in a first direction (horizontal); and
a data electrode (Lin: DL) extending in a second direction (vertical) crossing the first direction (horizontal), and
wherein the gate electrode (Lin: SL) and the data electrode (Lin: DL) are electrically connected to the thin-film transistors (Lin: T).
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Liao as applied to claim 4 above, and further in view of Kim et al. (US 20180190631) and Song et al. (US 20200027938).
Regarding claim 5, Lin in view of Liao teaches the display device of claim 4, wherein the wiring electrode (Lin: fig. 4, SL, DL further) comprises:
a Vss electrode (Lin: power supply voltage Vss; para. 0057) disposed; and
a Vdd electrode (Lin: power supply voltage Vdd; para. 0057) disposed, to which a power supply voltage (Lin: power supply voltage; para. 0057) is applied, and
Lin in view of Liao fails to teach Vss electrode disposed in parallel to the gate electrode,
Vdd electrode disposed in parallel to the data electrode.
However, Kim teaches Vss electrode (Kim: fig. 3, common power lines CPL; para. 0053, similar to Vss of Lin) disposed in parallel to the gate electrode (Kim: gate lines GL; para. 0053, similar to SL of Lin),
Vdd electrode (Kim: driving power lines DPL; para. 0053, similar to Vdd of Lin) disposed in parallel to the data electrode (Kim: data lines DL; para. 0053, similar to DL of Lin).
Kim, Liao and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add Vss electrode disposed in parallel to the gate electrode and Vdd electrode disposed in parallel to the data electrode as taught by Kim.
Doing so would realize a structure with reduced number of the driving power lines and decrease the size of each of the unit pixel (Kim: para. 0060).
In addition, Lin in view of Liao and Kim fails to teach a ground voltage is applied to Vss,
Vss electrode is electrically connected to the thin-film transistors, and the Vdd electrode is electrically connected to the semiconductor light-emitting elements.
However, Song teaches a ground voltage (Song: fig. 1B, a low voltage to the ground; para. 0018) is applied to Vss (Song: second voltage terminal Vss; para. 0018, similar to Vss of Lin),
Vss electrode (Song: Vss) is electrically connected to the thin-film transistors (Song: driving transistor T2; para. 0018, similat to T of Lin), and the Vdd electrode (Song: first voltage terminal Vdd; para. 0018, similar to Vdd of Lin) is electrically connected to the semiconductor light-emitting elements (Song: OLED; para. 0018, similar to RU/GU/BU of Lin).
Song, Kim, Liao and Lin are considered to be analogous to the claimed invention because they are in the same field of display devices.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add Vss electrode is electrically connected to the thin-film transistors, and the Vdd electrode is electrically connected to the semiconductor light-emitting elements as taught by Song.
Doing so would realize a circuit setting with relatively high switching speed as well as a relatively large to improve display performance (para. 0021). Further, it has been held that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Regarding claim 6, Lin in view of Liao, Kim and Song teaches the display device of claim 5 including an electrical connection (Liao: fig. 4C, connecting wire 260; para. 0044) between the semiconductor light-emitting elements (Liao: D) and the Vdd electrode (Liao: second wire w4; para. 0045, similar to Vdd of Song)
Lin in view of Liao, Kim and Song as applied to claim 5 above fails to teach the electrical connection between the semiconductor light-emitting elements and the Vdd electrode is removed from any one of the first to third sub-pixel regions of the second pixel region.
However, Liao teaches the electrical connection (Liao: fig. 4C, 260) between the semiconductor light-emitting elements (Liao: D) and the Vdd electrode (Liao: w4) is removed (Liao: removed as a gap of cutting portion 2610; para. 0044) from any one of the first to third sub-pixel regions (Liao: ZP, similar to one top region of Lin) of the second pixel region (Liao: region with fig. 4C).
It would have been obvious to further modify Lin in view of Liao, Kim and Song to include the electrical connection is removed as taught by Liao.
Doing so would realize related repairing method can be performed to eliminate the short-circuit defect and then enhance the yield rate of display panels (Liao: para. 0032, 0034).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHIJUN XU whose telephone number is (571)270-3447. The examiner can normally be reached Monday-Thursday 9am-5pm ET.
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/ZHIJUN XU/Examiner, Art Unit 2818
/BRIAN TURNER/Examiner, Art Unit 2818