Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/29/2025 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) presented have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-7, 11 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Isobe et al. [US PGPUB 20080128724] (hereinafter Isobe).
Regarding claim 1, Isobe teaches a method for producing an optoelectronic component, having the following steps:
- providing a lead frame (210, Para 138) having a front side (side upon which device 1 is attached, Fig. 18) and a rear side (side vertically opposite to the side upon which device 1 is attached to, Fig. 18),
- forming an inner mold body (7, Para 140), wherein a first portion of the lead frame (Fig. 18) is embedded in the inner mold body and a second portion of the lead frame is not embedded in the inner mold body (see annotated Fig. 18);
- arranging an optoelectronic semiconductor chip (1, Para 140) on the inner mold body on the front side of the lead frame (Fig. 18);
- bending the lead frame in such a way that the first portion of the lead frame is angled with respect to the second portion of the lead frame (Fig. 18);
- embedding the lead frame and the inner mold body in an outer mold body, (3, Para 140) such that the inner mold body is completely encapsulated by the outer mold body (Fig. 18) so that electromagnetic radiation emitted by the optoelectronic semiconductor chip runs through the outer mold body (in view of material 7 being a wavelength conversion material and material 3 being transparent, Para 140 –see Fig. 4).
Regarding claim 5, Isobe teaches a method wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the front side of the lead frame (Fig. 18).
Regarding claim 6, Isobe teaches a method wherein the lead frame is bent in such a way that the first portion of the lead frame is angled at an angle of 90º with respect to the second portion of the lead frame (Fig. 18).
Regarding claim 7, Isobe teaches a method wherein portions of the lead frame are cut before the bending procedure (Para 132, Fig. 6).
Regarding claim 11, Isobe teaches an optoelectronic component
having a lead frame (210, Para 138) having a front side (side upon which device 1 is attached, Fig. 18) and a rear side (side vertically opposite to the side upon which device 1 is attached to, Fig. 18),
an inner mold body (7, Para 140),
an optoelectronic semiconductor chip (1, Para 140) arranged in the inner mold body on the front side of the lead frame (Fig. 18),
and an outer mold body (3, Para 140),
wherein a first portion of the lead frame (Fig. 18) is embedded in the inner mold body and a second portion of the lead frame is not embedded in the inner mold body (see annotated Fig. 18),
wherein the lead frame is bent in such a way that the first portion of the lead frame is angled with respect to the second portion of the lead frame (Fig. 18),
wherein the lead frame and the inner mold body are embedded in the outer mold body, such that the inner mold body is completely encapsulated by the outer mold body (Fig. 18),
wherein electromagnetic radiation emitted by the optoelectronic semiconductor chip runs through the outer mold body (in view of material 7 being a wavelength conversion material and material 3 being transparent, Para 140 –see Fig. 4).
PNG
media_image1.png
301
625
media_image1.png
Greyscale
Annotated Fig. 18
Regarding claim 15, Isobe teaches an optoelectronic component wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the front side of the lead frame (Fig. 18).
Regarding claim 16, Isobe teaches an optoelectronic component the lead frame is bent in such a way that the first portion of the lead frame is angled at an angle of 90º with respect to the second portion of the lead frame (see annotated Fig. 18).
Claims 1, 5, 8, 11, 15 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mitamura et al. [US PGPUB 20160087729] (hereinafter Mitamura).
Regarding claim 1, Mitamura teaches a method for producing an optoelectronic component, having the following steps:
- providing a lead frame (2, Para 9) having a front side (side upon which device 4 is attached to, Fig. 13) and a rear side (side vertically opposite to the side upon which device 4 is attached to, Fig. 13);
- forming an inner mold body (6, Para 56), wherein a first portion of the lead frame (portion 2a extending in the horizontal direction, Fig. 13) is embedded in the inner mold body (Fig. 13) and a second portion of the lead frame (portion of lead frame 2 extending at an acute angle to portion 2a extending in the horizontal direction, Fig. 13) is not embedded in the inner mold body (Fig. 13);
- arranging an optoelectronic semiconductor chip (4, Para 56) on the inner mold body on the front side of the lead frame (Fig. 13);
- bending the lead frame in such a way that the first portion of the lead frame is angled with respect to the second portion of the lead frame (Fig. 13);
- embedding the lead frame and the inner mold body in an outer mold body, (7 or 7 & 8, Para 56, Fig. 13) such that the inner mold body is completely encapsulated by the outer mold body (Fig. 13) so that electromagnetic radiation emitted by the optoelectronic semiconductor chip runs through the outer mold body (Para 81; in view of the light emitted by device 4 is received by device 5).
Regarding claim 5, Mitamura teaches a method wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the front side of the lead frame (Fig. 13).
Regarding claim 8, Mitamura teaches a method wherein the inner mold body is formed with a cavity, wherein the optoelectronic semiconductor chip is arranged in the cavity (Fig. 13 –i.e., cavity as a result of device 4 protruding into material 6).
Regarding claim 11, Mitamura teaches an optoelectronic component
having a lead frame (2, Para 9) having a front side (side upon which device 4 is attached, Fig. 13) and a rear side (side vertically opposite to the side upon which device 4 is attached, Fig. 13),
an inner mold body (6, Para 56),
an optoelectronic semiconductor chip (4 Para 56) arranged in the inner mold body on the front side of the lead frame (Fig. 13),
and an outer mold body (7 or 7 & 8, Para 56),
wherein a first portion of the lead frame (portion 2a extending in the horizontal direction, Fig. 13) is embedded in the inner mold body (Fig. 13) and a second portion of the lead frame (portion of lead frame 2 extending at an acute angle to portion 2a extending in the horizontal direction, Fig. 13) is not embedded in the inner mold body (Fig. 13),
wherein the lead frame is bent in such a way that the first portion of the lead frame is angled with respect to the second portion of the lead frame (Fig. 13),
wherein the lead frame and the inner mold body are embedded in the outer mold body, such that the inner mold body is completely encapsulated by the outer mold body (Fig. 13),
wherein electromagnetic radiation emitted by the optoelectronic semiconductor chip runs through the outer mold body (Para 81; in view of the light emitted by device 4 is received by device 5).
Regarding claim 15, Mitamura teaches an optoelectronic component as claimed in claim 11, wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the front side of the lead frame (Fig. 13).
Regarding claim 17, Mitamura teaches an optoelectronic component as claimed in claim 11, wherein the inner mold body comprises a cavity, wherein the optoelectronic semiconductor chip is arranged in the cavity (Fig. 13 –i.e., cavity as a result of device 4 protruding into material 6).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 14 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Isobe.
Regarding claim 4, Isobe teaches the limitation of claim 1 upon which it depends.
Isobe as applied in claim 1, does not specifically disclose a method wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the rear side of the lead frame.
However, Isobe teaches other alternate structure of the device, wherein in an instance, the structure is provided such that the lead frame is bent in such a way that the first portion of the lead frame is angled toward the rear side of the lead frame (Fig. 20).
In view of such further teaching by Isobe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the device of Fig. 18 formed as claimed in claim 14, at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B).
Regarding claim 14, Isobe teaches the limitation of claim 11 upon which it depends.
Isobe as applied in claim 11, does not specifically disclose an optoelectronic component wherein the lead frame is bent in such a way that the first portion of the lead frame is angled toward the rear side of the lead frame.
However, Isobe teaches other alternate structure of the device, wherein in an instance, the structure is provided such that the lead frame is bent in such a way that the first portion of the lead frame is angled toward the rear side of the lead frame (Fig. 20).
In view of such further teaching by Isobe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the device of Fig. 18 formed as claimed in claim 14, at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B).
Regarding claim 19, Isobe teaches the limitation of claim 11 upon which it depends.
Isobe as applied in claim 11, does not specifically disclose an optoelectronic component wherein in addition to the optoelectronic semiconductor chip, at least one further optoelectronic semiconductor chip is arranged on the inner mold body on the front side of the lead frame.
However, Isobe teaches other alternate structure of the device, wherein in an instance, the structure is provided with multiple optoelectronic components wherein (Fig. 57).
In view of such further teaching by Isobe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the device of Fig. 18 formed as claimed in claim 19, at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Mitamura in view of Matsuda et al. [US Patent 5647034] and Isobe (hereinafter Matsuda).
Regarding claim 2, Mitamura teaches the limitation of claim 1 upon which it depends.
Mitamura does not specifically disclose a method wherein, after the bending of the lead frame, the following further step is carried out:
- arranging an electronic semiconductor chip on the rear side of the lead frame, wherein the electronic semiconductor chip, together with the lead frame and the inner mold body, is embedded in the outer mold body.
Referring to the invention of Matsuda, Matsuda disclose forming an electronic semiconductor chip (15, Col. 6, line 32) on a side of lead frame 14 opposite to the side that optoelectronic component 16 is formed (Fig. 23).
In view of such teaching by Matsuda, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the device of Mitamura comprise the teaching of Matsuda in order to monitor the operation status of the packaged device.
Referring to the invention of Isobe, Isobe teaches bending the lead frame of device before arranging an electronic semiconductor chip on the lead frame (Fig. 6-11 of 22-26).
In view of such teaching by Isobe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Mitamura in view of Matsuda comprise the teaching of Isobe, wherein arranging components after bending the lead frame to reduce the chances of erroneously damaging components/chips during the bending process.
In view of such combination, a person will understand that the claimed limitation would be obviously met, to include the limitation “wherein the electronic semiconductor chip, together with the lead frame and the inner mold body, is embedded in the outer mold body” because an electronic semiconductor chip implemented in the device of Mitamura would at least be embedded in the outer mold 7 or 7 & 8.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Mitamura in view of Matsuda.
Regarding claim 12, Mitamura teaches the limitation of claim 11 upon which it depends.
Mitamura does not specifically disclose an optoelectronic component wherein an electronic semiconductor chip is arranged on the rear side of the lead frame, wherein the electronic semiconductor chip, together with the lead frame and the inner mold body, is embedded in the outer mold body.
Referring to the invention of Matsuda, Matsuda disclose forming an electronic semiconductor chip (15, Col. 6, line 32) on a side of lead frame 14 opposite to the side that optoelectronic component 16 is formed (Fig. 23).
In view of such teaching by Matsuda, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the device of Mitamura comprise the teaching of Matsuda in order to monitor the operation status of the packaged device.
In view of such combination, a person will understand that the claimed limitation would be obviously met, to include the limitation “wherein the electronic semiconductor chip, together with the lead frame and the inner mold body, is embedded in the outer mold body” because an electronic semiconductor chip implemented in the device of Mitamura would at least be embedded in the outer mold 7 or 7 & 8.
Allowable Subject Matter
Claims 3, 9-10, 13, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ISMAIL A MUSE whose telephone number is (571)272-1470. The examiner can normally be reached Monday - Friday 8:00 AM-5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571)270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ISMAIL A MUSE/ Primary Examiner, Art Unit 2812