DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment/Argument
Applicant’s arguments, see remarks, filed 04/14/2026, with respect to the objection of the specification have been fully considered and are persuasive. The objection of the specification has been withdrawn.
Applicant’s arguments, see remarks, filed 04/14/2026, with respect to the rejection of claims 3, 5, 7, 10 and 20 have been fully considered and are persuasive. The rejection of claims 3, 5, 7, 10 and 20 has been withdrawn.
Applicant's arguments filed 04/14/2026 with respect to the rejections of claims 1-11 and 15-20 have been fully considered but they are not persuasive.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., the specific semiconductor sequence) are not recited in the rejected claim(s). The term “display functional layer” is a very broad term and can be read upon by many semiconductor components that are different from what’s depicted in the drawings and shown in the specification. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
In response to applicant's argument that the references fail to show the first limitation of the fifth paragraph, the “and/or” operator means only the first or second limitation of this paragraph needs to be taught, not both. Muller fails to teach the first limitation but does teach the second limitation, so the claim is met in this regard.
In response to applicant's argument that the etch stop layer 22 of Muller does not provide a technical teaching with regard to light blocking, 35 U.S.C. 102 does not rely on teachings, rationales, or solutions to technical problems when rejecting claims. The layer 22 of Muller is composed of AiGaAs (see ¶0070), which is opaque with respect to visible light and is therefore a light blocking layer.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., hollowed out regions fully penetrating through the encapsulation layer) are not recited in the rejected claim(s). The term “hollowed out regions” is a broader term and does not require said regions to fully penetrate the encapsulation layer. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 4-5, 8, 10-11 and 17-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Muller (US-20200328324-A1).
Regarding claim 1, Muller teaches a display substrate (Fig.1I; ¶0086), comprising:
a base substrate (Fig.1I 6; ¶0086);
a display functional layer (Fig.1H 3; ¶0071) located on a first side surface (top surface) of the base substrate (6), wherein the display functional layer (3) comprises an encapsulation layer (Fig.1I 70; ¶0079); and
a plurality of metal lines (Fig.1I 55; ¶0086) located on a second side surface (bottom surface) of the base substrate (6), a first gap (the lateral spaces between individual instances of 55) being provided between adjacent metal lines (55), and the first side surface (top surface) being opposite to the second side surface (bottom surface),
wherein a first orthographic projection of the encapsulation layer (70) onto the base substrate (6) and a second orthographic projection of the first gap (the lateral spaces between individual instances of 55) onto the base substrate (6) at least partially do not overlap each other, and/or, a light-shielding layer (Fig.1E 22; ¶0070 and ¶0081) is arranged at a side of the encapsulation layer (70) facing the metal lines (55), the light-shielding layer (22) is located on the first side surface (top surface) of the base substrate (6), and a third orthographic projection of the light-shielding layer (22) onto the base substrate (6) at least partially overlaps the second orthographic projection;
wherein the encapsulation layer (70) comprises a plurality of hollowed-out regions (the spaces occupied by 3), and the second orthographic projection (the projection of the gaps on 6) falls within a fourth orthographic projection of each hollowed-out region (the spaces occupied by 3) onto the base substrate (6).
Regarding claim 5, Muller teaches the display substrate according to claim 1, wherein the fourth orthographic projection (the spaces occupied by 3 on 6) does not overlap an orthographic projection of a metal layer (Fig.1I 53; ¶0086) on the first side surface of the base substrate (6) onto the base substrate (6).
Regarding claim 8, Muller teaches the display substrate according to claim 7, wherein the light-emitting element of the display substrate is a mini LED or a micro LED (¶0004).
Regarding claim 10, Muller teaches the display substrate according to claim 1, wherein each metal line (55) is connected to a signal line of the display functional layer (3) through a lead on a side surface of the base substrate (6); or
each metal line (55) is connected to a signal line (Fig.1I 50; ¶0077) of the display functional layer (3) through a via hole (Fig.1I 53; ¶0086) penetrating the base substrate (6).
Regarding claim 11, Muller teaches a display device, comprising the display substrate according to claim 1 (see Fig.1M).
Regarding claim 18, Muller teaches the display device according to claim 11, wherein the fourth orthographic projection (the spaces occupied by 3 on 6) does not overlap an orthographic projection of a metal layer (Fig.1I 53; ¶0086) on the first side surface of the base substrate (6) onto the base substrate (6).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muller.
Regarding claim 6, Muller teaches the display substrate according to claim 1.
Muller does not teach wherein the metal lines are fan-out area lines, a line width of each metal line is 60μm to 80μm, and a spacing between adjacent metal lines is 27μm to 47μm.
However, it would have been obvious to form the widths and spacings within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)).
Regarding claim 19, Muller teaches the display device according to claim 11.
Muller does not teach wherein the metal lines are fan-out area lines, a line width of each metal line is 60μm to 80μm, and a spacing between adjacent metal lines is 27μm to 47μm.
However, it would have been obvious to form the widths and spacings within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)).
Claim(s) 2-3, 7, 15-16 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muller in view of Noh et al. (US-20230187582-A1 – hereinafter Noh).
Regarding claim 2, Muller teaches the display substrate according to claim 1.
Muller does not teach wherein the third orthographic projection fully coincides with the second orthographic projection.
Noh teaches a light-shielding layer (Fig.10 ES; ¶0158 of Noh) for etch stopping a gap formed in a substrate (Fig.10 11; ¶0158 of Noh), where a projection of ES on 11 fully covers the gap.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for the gaps between the metal lines (55 of Muller) to be fully overlapped by the light-shielding layer (22 of Muller) as a matter of design choice. Noh serves to teach the point of novelty in the application where laser etching is stopped by a light-shielding layer (as depicted in Fig.10 of Noh) to prevent damage to other parts of an apparatus.
Regarding claim 3, Muller teaches the display substrate according to claim 1.
Muller does not teach wherein the light-shielding layer and a gate metal layer of the display functional layer are arranged at a same layer and made of a same material.
Noh teaches a light-shielding layer (Fig.10 ES; ¶0158 of Noh) that can also serve as a connection electrode (¶0160 of Noh).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for the light-shielding layer of Muller (22 of Muller) to serve as a gate metal layer as taught by Noh (ES of Noh) as a matter of design choice, with the device components of Noh around the light-shielding layer of Noh (ES of Noh) matching the device components of Muller around the light-shielding layer of Muller (22 of Muller).
Regarding claim 7, Muller teaches the display substrate according to claim 1.
Muller does not explicitly teach wherein the display substrate comprises:
a buffer layer located on the first side surface of the base substrate;
a gate insulation layer located at one side of the buffer layer away from the base substrate;
an interlayer insulation layer located at one side of the gate insulation layer away from the base substrate;
a planarization layer located at one side of the interlayer insulation layer away from the base substrate;
a passivation layer located at one side of the planarization layer away from the base substrate;
the encapsulation layer located at one side of the passivation layer away from the base substrate; and
a light-emitting element located at one side of the encapsulation layer away from the base substrate.
Noh teaches a display substrate comprising:
a buffer layer (Fig.7 12; ¶0093 of Noh) located on the first side surface (top surface) of the base substrate (Fig.7 11; ¶0093 of Noh);
a gate insulation layer (Fig.7 13; ¶0097 of Noh) located at one side of the buffer layer (12 of Noh) away from the base substrate (11 of Noh);
an interlayer insulation layer (Fig.7 17; ¶0102 of Noh) located at one side of the gate insulation layer (13 of Noh) away from the base substrate (11 of Noh);
a planarization layer (Fig.7 19; ¶0090 of Noh) located at one side of the interlayer insulation layer (17 of Noh) away from the base substrate (11 of Noh);
a passivation layer (Fig.7 51; ¶0131 of Noh) located at one side of the planarization layer (19 of Noh) away from the base substrate (11 of Noh);
the encapsulation layer (Fig.1I 70; ¶0079 of Muller) located at one side of the passivation layer (51 of Noh) away from the base substrate (11of Noh); and
a light-emitting element (Fig.5 30; ¶0084 of Noh) located at one side of the encapsulation layer (70 of Muller) away from the base substrate (11 of Noh).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for all of these components to be present in the device layer (3 of Muller) of Muller because they are well-known in the art for the design of LED devices.
Regarding claim 15, Muller teaches the display device according to claim 11.
Muller does not teach wherein the third orthographic projection fully coincides with the second orthographic projection.
Noh teaches a light-shielding layer (Fig.10 ES; ¶0158 of Noh) for etch stopping a gap formed in a substrate (Fig.10 11; ¶0158 of Noh), where a projection of ES on 11 fully covers the gap.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for the gaps between the metal lines (55 of Muller) to be fully overlapped by the light-shielding layer (22 of Muller) as a matter of design choice. Noh serves to teach the point of novelty in the application where laser etching is stopped by a light-shielding layer (as depicted in Fig.10 of Noh) to prevent damage to other parts of an apparatus.
Regarding claim 16, Muller teaches the display device according to claim 11.
Muller does not teach wherein the light-shielding layer and a gate metal layer of the display functional layer are arranged at a same layer and made of a same material.
Noh teaches a light-shielding layer (Fig.10 ES; ¶0158 of Noh) that can also serve as a connection electrode (¶0160 of Noh).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for the light-shielding layer of Muller (22 of Muller) to serve as a gate metal layer as taught by Noh (ES of Noh) as a matter of design choice, with the device components of Noh around the light-shielding layer of Noh (ES of Noh) matching the device components of Muller around the light-shielding layer of Muller (22 of Muller).
Regarding claim 20, Muller teaches the display device according to claim 11.
Muller does not explicitly teach wherein the display substrate comprises:
a buffer layer located on the first side surface of the base substrate;
a gate insulation layer located at one side of the buffer layer away from the base substrate;
an interlayer insulation layer located at one side of the gate insulation layer away from the base substrate;
a planarization layer located at one side of the interlayer insulation layer away from the base substrate;
a passivation layer located at one side of the planarization layer away from the base substrate;
the encapsulation layer located at one side of the passivation layer away from the base substrate; and
a light-emitting element located at one side of the encapsulation layer away from the base substrate.
Noh teaches a display substrate comprising:
a buffer layer (Fig.7 12; ¶0093 of Noh) located on the first side surface (top surface) of the base substrate (Fig.7 11; ¶0093 of Noh);
a gate insulation layer (Fig.7 13; ¶0097 of Noh) located at one side of the buffer layer (12 of Noh) away from the base substrate (11 of Noh);
an interlayer insulation layer (Fig.7 17; ¶0102 of Noh) located at one side of the gate insulation layer (13 of Noh) away from the base substrate (11 of Noh);
a planarization layer (Fig.7 19; ¶0090 of Noh) located at one side of the interlayer insulation layer (17 of Noh) away from the base substrate (11 of Noh);
a passivation layer (Fig.7 51; ¶0131 of Noh) located at one side of the planarization layer (19 of Noh) away from the base substrate (11 of Noh);
the encapsulation layer (Fig.1I 70; ¶0079 of Muller) located at one side of the passivation layer (51 of Noh) away from the base substrate (11of Noh); and
a light-emitting element (Fig.5 30; ¶0084 of Noh) located at one side of the encapsulation layer (70 of Muller) away from the base substrate (11 of Noh).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, for all of these components to be present in the device layer (3 of Muller) of Muller because they are well-known in the art for the design of LED devices.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muller in view of Jang (US-20230069883-A1).
Regarding claim 9, Muller teaches the display substrate according to claim 1.
Muller does not teach wherein the base substrate is transparent.
Jang teaches a transparent base substrate (Fig.2 102; ¶0004 of Jang).
It would be obvious for the base substrate of Muller (6 of Muller) to be transparent because transparent substrates are well-known in the art and constitute an obvious variant.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THADDEUS J KOLB whose telephone number is (571)272-0276. The examiner can normally be reached Monday - Friday, 8:30am - 5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/T.J.K./ Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
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