Office Action Predictor
Last updated: April 16, 2026
Application No. 18/026,476

LIGHT EMITTING CHIP AND MANUFACTURING METHOD FOR THE SAME, AND LIGHT EMITTING DEVICE

Non-Final OA §102
Filed
Mar 15, 2023
Examiner
ULLAH, ELIAS
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Boe Technology Group Co., LTD.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
90%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
700 granted / 829 resolved
+16.4% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
851
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
32.9%
-7.1% vs TC avg
§102
55.7%
+15.7% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 829 resolved cases

Office Action

§102
DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-7 and 17 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Hen (US 2003/0047742). Regarding claim 1, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising: a substrate (PCB 405): a plurality of light emitting units arranged in an array (see FIG. 12 with respect to FIG. 13) on the substrate (PCB 405). wherein each of the light emitting units comprises at least one first electrode (common electrode 701) arranged on the substrate (PCB 405) and a plurality of epitaxial wafers (wafer 805 in FIG. 13 and [0038]) arranged in an array and at least two of the epitaxial wafers have different colors (see FIG. 13): wherein several epitaxial wafers in the epitaxial wafers share one of the at least first electrode (common electrode 701). Regarding claim 2, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising, wherein at least two epitaxial wafers of different colors ( blue or green in FIG. 13) in the plurality of epitaxial wafers share one of the at least one first electrode (common electrode 701). Regarding claim 3, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising, wherein all of the epitaxial wafers (wafer 805) share one of the at least one first electrode (electrode 701). Regarding claim 4, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising, wherein all the epitaxial wafers (wafer 805) are divided into several groups (see FIG. 12), each of the groups comprises at least two epitaxial wafers of different colors (color blue, green and red) , and each of the group shares one of the at least one first electrode (common electrode 701). Regarding claim 5, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising, wherein the epitaxial wafers comprise at least a blue epitaxial (blue in FIG. 13) wafer and a green epitaxial wafer (color green in FIG. 13). and the blue epitaxial wafer and the green epitaxial wafer share one of the at least one first electrode (common electrode 701). Regarding claim 6, Hen shows a light emitting chip (LED chip 401 in FIG. 13 and [0038]), comprising, wherein each of the light emitting units further comprises a conductive layer (conductive 901 and 902), and the conductive layer is electrically connected to the plurality of epitaxial wafers (wafer 805) and the at least one first electrode (common electrode 701). Regarding claim 17, Hen shows a light emitting device (LED chip 401 in FIG. 13 and [0038]), comprising, a light emitting chip wherein the light emitting chip comprises a substrate ( PCB in FIG. 13), a plurality of light emitting units ( blue , green and yellow light units in FIG. 13) arranged in array on the substrate (substrate 701), where each of the light emitting units comprises at least first electrode arranged on the substrate and a plurality of epitaxial wafer ( wafer 805) arranged in an array, and at least two of the epitaxial wafers have different color (blue, green in FIG. 13), wherein several epitaxial wafers in the epitaxial wafers share on of the at least first electrode (common electrode 701). Allowable Subject Matter Claims 18-20 are allowed. Claims 7-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS M ULLAH whose telephone number is (571)272-1415. The examiner can normally be reached M-F at 8AM-5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ELIAS ULLAH/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Mar 15, 2023
Application Filed
Nov 15, 2025
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
90%
With Interview (+5.1%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 829 resolved cases by this examiner. Grant probability derived from career allow rate.

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