DETAILED ACTION
Response to Arguments
Applicant’s arguments with respect to claims 28-44 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 28-31, 33-34, 36-38, and 40-44 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Osada et al. (US 2015/0137314) (“Osada”).
With regard to claim 28, fig. 6 of Osada discloses a semiconductor device, comprising: a semiconductor layer 26 that has a principal surface (top of 26); a first conductive layer 20 that is formed on the principal surface of the semiconductor layer 26; a first insulating portion (4th 30 and 4th 29 from top, fig. 6) that is formed on the principal surface (top of 26) of the semiconductor layer 26 so as to cover the first conductive layer 58 and that includes at least a silicon oxide film (“SiO2”, par [0084]); a second insulating portion (3rd 29 from top, fig. 6) that is formed on the first insulating portion (4th 30 and 4th 29 from top, fig. 6) and that includes a second insulating layer (“etching stopper film 29”, par [0084]) having a dielectric constant (“SiN”, par [0084]) differing from a dielectric constant of the silicon oxide film (“SiO2”, par [0084]); a second conductive layer 21 that is formed on the second insulating portion (3rd 29 from top, fig. 6), that faces the first conductive layer 20 through the first insulating portion (4th 30 and 4th 29 from top, fig. 6) and the second insulating portion (3rd 29 from top, fig. 6), and that is connected to a potential (“high voltage region 36, par [0097]) differing from a potential (“low voltage region 46”, par [097]) of the first conductive layer 21; a first pad 53 that is electrically connected to the first conductive layer 20; a second pad 37 that is formed on the second insulating portion (3rd 29 from top, fig. 6), the second pad 37 being electrically connected to the second conductive layer 21 and the second conductive layer (left 21, fig. 6) being located between the first pad 53 and the second pad 37 in a first direction parallel to the principal surface of the semiconductor layer 26; a first protective layer (bottom half 77, fig. 6) that is formed on the second insulating portion (3rd 29 from top, fig. 6) so as to cover the second conductive layer 21 and at least a part of the second pad 37; and a second protective layer (top half of 77, fig. 6) formed on the first protective layer (bottom half 77) so as to cover the first protective layer (bottom half 77), the second protective layer 76 overlapping with a part of the second pad 37 in a second direction (top to bottom in fig. 6) perpendicular to the principal surface (top of 26) of the semiconductor layer 26.
With regard to claim 29, fig. 6 of Osada discloses that the first insulating portion (4th 30 and 4th 29 from top, fig. 6) includes a laminate of a silicon nitride film (“SiN”, par [0144]) and the silicon oxide film (“SiO2”, par [0144]).
With regard to claim 30, fig. 6 of Osada discloses that the first pad 53 is formed on the second insulating portion (3rd 29 from top, fig. 6).
With regard to claim 31, fig. 6 of Osada discloses that the first protective layer (bottom half 77) and the second protective layer (top half 77) each include an organic insulating layer (“coil protective film 77 is made of polyimide”, par [0109]).
With regard to claim 33, fig. 6 of Osada discloses that the organic insulating layer (“coil protective film 77 is made of polyimide”, par [0109]) includes at least one among a polyimide film (“coil protective film 77 is made of polyimide”, par [0109]), a phenol resin film, and an epoxy resin film.
With regard to claim 34, fig. 6 of Osada discloses that the second protective layer (top half of 77) includes at least one among a polyimide film (“coil protective film 77 is made of polyimide”, par [0109]), a phenol resin film, and an epoxy resin film.
With regard to claim 36, fig. 6 of Osada discloses a distance between the first pad 53 and the second pad 37 is greater than a sum of thicknesses of the first insulating portion (4th 30 and 4th 29 from top, fig. 6) and the second insulating portion (3rd 29 from top, fig. 6).
With regard to claim 37, fig. 6 of Osada discloses that the first conductive layer 20 includes a first coil (“lower coil”, par [0081]) and the second conductive layer 21 includes a second coil (“upper coil”, par [0081]).
With regard to claim 38, fig. 6 of Osada discloses a first energization member (55 below bottom of 3rd 29 from top, fig. 6) that is connected to the first conductive layer 20 and that extends from the first conductive layer 20 to a boundary portion with the second insulating portion (3rd 29 from top, fig. 6) in the first insulating portion (4th 30 and 4th 29 from top, fig. 6); and a second energization member (55 above bottom of 3d 29 from top, fig. 6) that is connected to the first energization member (55 below bottom of 3rd 29 from top, fig. 6) and that extends from the first energization member (55 below bottom of 3rd 29 from top, fig. 6) onto the second insulating portion (3rd 29 from top, fig. 6).
With regard to claim 40, fig. 5 of Osada discloses that the first energization member 55 is connected to a ground potential (‘ground voltage”, par [0102]) through the semiconductor layer 26.
With regard to claim 41, fig. 5 of Osada discloses a seal conductor 69 formed in the first insulating portion (4th 30 and 4th 29 from top, fig. 6) so as to surround the first conductive layer 20.
With regard to claim 42, figs. 1 and 5 of Osada discloses a semiconductor module 1, comprising: a die pad; the semiconductor device 6 that is mounted on the die pad 8; a package main body 2 that seals the die pad 8 and the semiconductor device 6; and a lead terminal 3 that is electrically connected to the semiconductor device 6 and that is exposed from the package main body 2.
With regard to claim 43, figs. 1 and 5 of Osada discloses that the first conductive layer 20 of the semiconductor device 6 includes a first coil 20, the second conductive layer 21 of the semiconductor device 6 includes a second coil 21, the semiconductor device 6 includes a signal-transmitting insulating element 6 that transmits a signal to an interval between the first coil 20 and the second coil 21 in an insulated state, and the semiconductor module 6 further comprises a second semiconductor device 4 electrically connected to the insulating element 6.
With regard to claim 44, figs. 1 and 5 of Osada discloses of the second semiconductor device 5 includes a control element (“controller chip 5”, par [0066]) electrically connected to one of the first coil 20 and the second coil and a drive element (“driver chip 7”, par [0066]) electrically connected to the other of the first coil and the second coil 21.
Allowable Subject Matter
Claims 32, 35, and 39 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm.
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/BENJAMIN TZU-HUNG LIU/ Primary Examiner, Art Unit 2893