DETAILED ACTION
This Action is responsive to the Amendment filed on 03/27/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Rinne (US 2021/0135070), in view of Brunner (US 2025/0143051), in view of Yang (US 2023/0178701), in view of Yang (WO 2020216000 A1), hereinafter Yang II.
Regarding claim 1, Rinne (see, e.g., FIG. 7) discloses an array substrate, comprising:
a base substrate 10 (Para 0075);
a first conductive layer 14, 16, disposed on the base substrate 10, wherein the first conductive layer 14, 16 comprises a plurality of pads 14 (Para 0075); and
an electronic element 32 (30, 36), disposed on a side e.g., top side of the first conductive layer 14, 16 facing away from the base substrate 10, wherein the electronic element 32 (30, 36) comprises an electronic element body 34 and a plurality of pins 38 at a side e.g., bottom side of the electronic element body 34 facing the base substrate 10, and the plurality of pins 38 are connected with the plurality of pads 14 (Para 0069, Para 0070, Para 0075);
wherein the first conductive layer 14, 16 comprises first wires 16 arranged on a same layer e.g., both on the base substrate as the pads 14, and a thickness of the first wire 16 is less than a thickness of the pad 14 (Para 0075).
Although Rinne shows substantial features of the claimed invention, Rinne fails to expressly teach that each of the plurality of pads comprises a first metal layer, a material of the first metal layer comprises Cu, a content of the Cu is greater than or equal to 99%, and a thickness of the first metal layer is greater than 2 µm; a first insulating layer between the first conductive layer and the base substrate; and a second conductive layer between the first insulating layer and the base substrate; an orthographic projection of the second conductive layer on the base substrate completely covers an orthographic projection of the pin on the base.
Brunner (see, e.g., FIG. 1) teaches each of the plurality of pads 104, 105 comprises a first metal layer e.g., copper, a material of the first metal layer e.g., copper comprises Cu, a content of the Cu is greater than or equal to 99%, and a thickness of the first metal layer e.g., copper is greater than 2 µm (Para 0064, Para 0140). Yang, on the other hand, teaches that copper is a metallic material with good electrically conductivity (Para 0021, Para 0027).
Examiner note: of the available options, copper, without containing other materials therein, is listed as a metal material for the pads.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the material of the pads in the device of Rinne to comprise a first metal layer where the material of the first metal layer comprises Cu, a content of the Cu is greater than or equal to 99% as described by Brunner/Yang for the purpose of providing a metallic material with good electrically conductivity (Para 0021, Para 0027).
Yang II (see, e.g., FIG. 1) teaches array substrate according to claim 1, further comprising: a first insulating layer 110 between the first conductive layer 1111, 1112 and the base substrate 101 (pg. 4, para 7-para 8; pg. 7, para 2, para 3, para 11); and a second conductive layer 1091, 1093 between the first insulating layer 110 and the base substrate 101 for the purpose of providing a power signal to the light emitting diode (pg. 4, para 7-para 8; pg. 6, para 2; pg. 8, para 2 - para 4, para 6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the first insulating layer between the first conductive layer and the base substrate; and a second conductive layer between the first insulating layer and the base substrate as described by Yang II to the device of Rinne/Brunner/Yang for the purpose of providing a power signal to the light emitting diode (pg. 8, para 6).
Yang II (see, e.g., FIG. 1) fails to expressly teach an orthographic projection of the second conductive layer on the base substrate completely covers an orthographic projection of the pin on the base. Yang II (see, e.g., FIG. 2) does, on the other hand, show that an orthographic projection of the second conductive layer 1091, 1093 on the base substrate 101 completely covers an orthographic projection of the pin 21, 22 on the base 101 (pg 4, para 7-para 9; pg. 6, para 2; pg. 8, para 3 - para 4). However, differences in length will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph) of the orthographic projection of the second conductive layer on the base substrate completely covering an orthographic projection of the pin on the base, it would have been obvious to one of ordinary skill in the art to modify the orthographic projection of the second conductive layer on the base to completely cover the orthographic projection of the pin on the base of Rinne/Yang II (see, e.g., FIG. 1) through routine experimentation.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed orthographic projection of the second conductive layer covering the orthographic projection of the pin or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 19, Rinne (see, e.g., FIG. 7) teaches the array substrate according to claim 1, wherein the electronic element 32 (30, 36) is a mini light-emitting diode, LED, a micro LED, or a micro driver chip (Para 0064, Para 0069).
Regarding claim 20, Rinne (see, e.g., FIG. 7) teaches an electronic apparatus e.g., display structure 99, comprising the array substrate according to claim 1 (Para 0073-Para 0075).
Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Rinne (US 2021/0135070), in view of Brunner (US 2025/0143051), in view of Yang (US 2023/0178701), in view of Yang (WO 2020216000 A1), hereinafter Yang II, and further in view of Cao (WO 2022/056842 A1).
Regarding claim 2, although Rinne/Brunner/Yang/Yang II show substantial features of the claimed invention, Rinne/Brunner/Yang/Yang II fail to expressly teach that each of the plurality of pads further comprises a second metal layer; and the second metal layer is disposed on a side of the first metal layer close to the base substrate; wherein a material of the second metal layer comprises molybdenum-niobium alloy or molybdenum-nickel-titanium alloy.
Cao (see, e.g., FIG. 10) teaches array substrate according to claim 1, wherein a second metal layer 210 (pg. 8, para 4); and the second metal layer 210 is disposed on a side of the first metal layer 220 close to the base substrate 100 (pg. 8, para 4); wherein a material of the second metal layer 210 comprises molybdenum-niobium alloy or molybdenum-nickel-titanium alloy for the purpose of increasing the adhesion between the copper metal layer and other film layers (pg 7, para 6; pg. 8, para 4).
The combination of Rinne (see, e.g., FIG. 7) / Brunner (see, e.g., FIG. 1) / Cao (see, e.g., FIG. 10) teaches each of the plurality of pads 14 (as taught by Rinne with material modified by Brunner) further comprises a second metal layer 210 (as taught by Cao); and the second metal layer 210 (as taught by Cao) is disposed on a side of the first metal layer e.g., copper material of 14 (as taught by Rinne with material modified by Brunner) close to the base substrate 10 (as taught by Rinne); wherein a material of the second metal layer 210 (as taught by Cao) comprises molybdenum-niobium alloy or molybdenum-nickel-titanium alloy.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the second metal layer wherein a material of the second metal layer comprises molybdenum-niobium alloy or molybdenum-nickel-titanium alloy as described by Cao in the device of Rinne/Brunner for the purpose of increasing the adhesion between the copper metal layer and other film layers (pg 7, para 6).
Regarding claim 3, although Rinne/Brunner/Yang/Yang II show substantial features of the claimed invention, Rinne/Brunner/Yang/Yang II fail to expressly teach that a plurality of first protective layers between the plurality of pins and the plurality of pads, wherein a material of the first protective layers is a conductive material.
Cao (see, e.g., FIG. 10) teaches array substrate according to claim 2, wherein a plurality of first protective layers 240, wherein a material of the first protective layers 240 is a conductive material e.g., copper-nickel alloy for the purpose of preventing the copper metal layer from being oxidized (pg 8, para 1, para 4).
The combination of Rinne (see, e.g., FIG. 7) / Brunner (see, e.g., FIG. 1) / Cao (see, e.g., FIG. 10) teaches a plurality of first protective layers 240 (as taught by Cao) between the plurality of pins 38 (as taught by Rinne) and the plurality of pads 14 (as taught by Rinne with material modified by Brunner), wherein a material of the first protective layers 240 (as taught by Cao) is a conductive material e.g., copper-nickel alloy (as taught by Cao) (pg 8, para 4).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the plurality of first protective layers, wherein a material of the first protective layers is a conductive material as described by Cao into the device of Rinne/Brunner for the purpose of preventing the copper metal layer from being oxidized (pg 8, para 1).
Regarding claim 4, Cao (see, e.g., FIG. 10) teaches array substrate according to claim 3, wherein a thickness of each of the first protective layer 240 ranges from 100 A to 5000 A (pg 8, para 4).
Regarding claim 5, Cao (see, e.g., FIG. 10) teaches array substrate according to claim 4, wherein a material of each of the first protective layers 240 comprises CuNi (pg 8, para 4).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Rinne (US 2021/0135070), in view of Brunner (US 2025/0143051), in view of Yang (US 2023/0178701), in view of Yang (WO 2020216000 A1), hereinafter Yang II, in view of Cao (WO 2022/056842 A1), and further in view of Yoo (KR 2019 0097739 A), in view of Nitta (US 2024/0408703).
Regarding claim 6, although Rinne/Brunner/Yang/Yang II//Cao show substantial features of the claimed invention, Rinne/Brunner/Yang/Yang II/Cao fail to expressly teach that the plurality of pins are connected with the plurality of first protective layers by means of soldering flux, and a material of the soldering flux comprises Sn; each of the plurality of pads further comprises: a first intermetallic compound layer disposed on a side of the first metal layer facing away from the second metal layer; and a material of the first intermetallic compound layer comprises CuxSny, wherein x=1 or x=6, and y=3 or y=5.
Yoo (see, e.g., FIG. 1) teaches the array substrate according to claim 4, wherein that the plurality of pins 121, 122 are connected by means of soldering flux 191, 192, and a material of the soldering flux 191, 192 comprises Sn (Para 0062, Para 0064); each of the plurality of pads P11, P21 further comprises: a first intermetallic compound layer IMC disposed on a side of the first metal layer e.g., metal material of P11, P21 for the purpose of providing a physically, electrically, stably coupling between the first and second bonding parts and the first and second pad parts (Para 0065-Para 0069).
The combination of Rinne (see, e.g., FIG. 7) / Brunner (see, e.g., FIG. 1) / Cao (see, e.g., FIG. 10) / Yoo (see, e.g., FIG. 1) teaches that that the plurality of pins 38 (as taught by Rinne) are connected with the plurality of first protective layers 240 (as taught by Cao) by means of soldering flux 191, 192 (as taught by Yoo), and a material of the soldering flux 191, 192 (as taught by Yoo) comprises Sn; each of the plurality of pads 14 (as taught by Rinne) further comprises: a first intermetallic compound layer IMC (as taught by Yoo) disposed on a side of the first metal layer e.g., copper material layer of 14 (as taught by Rinne with material modified by Brunner) facing away from the second metal layer 210 (as taught by Cao).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the soldering flux, and a material of the soldering flux comprises Sn; each of the plurality of pads further comprises: a first intermetallic compound layer IMC disposed on a side of the first metal layer as described by Yoo into the device of Rinne/Brunner/Yang/Yang II//Cao for the purpose of providing a physically, electrically, stably coupling between the first and second bonding parts and the first and second pad parts (Para 0069).
Nitta teaches that a material of the first intermetallic compound layer e.g., bonding layer CuSn.sub.3 comprises CuxSny, wherein x=1 or x=6, and y=3 or y=5 for the purpose of providing a bonding layer with extremely high shear resistance, heat resistance, electrical conductivity, and heat dissipation properties (Para 0111-Para 0112, Para 0115).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the first intermetallic compound layer of Rinne/Brunner/Yang/Cao/Yoo to be a material of the first intermetallic compound layer that comprises CuxSny, wherein x=1 or x=6, and y=3 or y=5 as described by Nitta for the purpose of providing a bonding layer with extremely high shear resistance, heat resistance, electrical conductivity, and heat dissipation properties (Para 0115).
Response to Arguments
Applicant's arguments filed 03/27/2026 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues that the Office Action believes that the planarization layer 110 in Yang II can be mapped as the first insulating layer 70 in the present application, and the source-drain electrodes 1091 and 1092 in Yang II can be mapped as the second conductive layer 80 in the present application. Applicant respectfully disagrees and the reasons are as follows. Yang II, in FIG. 1, discloses that: the anode 21 of the light-emitting device 20 is connected to the drain electrode 1091 through the connection portion 111, where the drain electrode 1091 provides a driving signal to the anode 21. That is, the drain electrode 1091 can be mapped as the first conductive layer 20 in the present application. The planarization layer 110 in Yang II is located on the side of the drain electrode 1091 facing away from the base substrate. In the present application, the first insulating layer 70 is located between the first conductive layer 20 and the base substrate 10. Therefore, the planarization layer 110 in Yang II cannot be mapped as the first insulating layer 70 in the present application.
Examiner responds:
The Examiner respectfully disagrees. The claimed invention requires the claimed first conductive layer to be conductive. Therefore, under broadest reasonable interpretation, the Examiner mapped the first conductive layer in the claimed invention as follows: first insulating layer 110 between the first conductive layer 1111, 1112 and the base substrate 101; and a second conductive layer 1091, 1093 between the first insulating layer 110 and the base substrate 101. The rejection of the claimed invention is, therefore, proper.
Applicant argues:
Applicant argues that in the present application, an orthographic projection of the second conductive layer 80 on the base substrate 10 completely covers an orthographic projection of the pin 32 on the base substrate 10. Among which, the anode 21 in Yang II can be mapped as the pin 32 in the present application. However, in Yang II, the orthographic projection of the drain electrode 1091 on the base substrate does not completely cover the orthographic projection of the anode 21 on the base substrate.
Examiner responds:
The Examiner respectfully disagrees. Even though Yang II (see, e.g., FIG. 1) fails to expressly teach an orthographic projection of the second conductive layer on the base substrate completely covers an orthographic projection of the pin on the base. Yang II (see, e.g., FIG. 2) does, on the other hand, show that an orthographic projection of the second conductive layer 1091, 1093 on the base substrate 101 completely covers an orthographic projection of the pin 21, 22 on the base 101. However, differences in lengths of the orthographic projection of the second conductive layers will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONIO CRITE whose telephone number is (571) 270-5267. The examiner can normally be reached Monday - Friday, 10:00 am - 6:30 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTONIO B CRITE/ Primary Examiner, Art Unit 2817
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