Prosecution Insights
Last updated: April 19, 2026
Application No. 18/029,023

WIRING BASE AND ELECTRONIC DEVICE

Non-Final OA §102
Filed
Oct 30, 2023
Examiner
EGOAVIL, GUILLERMO J
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kyocera Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
98%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
574 granted / 640 resolved
+21.7% vs TC avg
Moderate +8% lift
Without
With
+8.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
24 currently pending
Career history
664
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
44.0%
+4.0% vs TC avg
§102
27.5%
-12.5% vs TC avg
§112
19.8%
-20.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 640 resolved cases

Office Action

§102
DETAILED ACTION This Office Action is in response to an application that was filed on 10/30/2023. Claims 1-15 are presented for examination consideration. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 3, 13, and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wakabayashi et al. (US 20160268666 A1 and Wakabayashi hereinafter, cited in the 11/01/2024 IDS and the 09/16/2024 European Search Report). Regarding claim 1, Wakabayashi discloses a wiring base (item 10 of Figs. 1_10-13 and ¶[0040-0041_0054_0063_0084-0086_0091-0094_0096-0097_0104-0108_0110-0113_0116_0118_0160 & 0162-0164] shows and indicates wiring base 10 {high-frequency signal line 10}) comprising: a base (item 12 of Figs. 1-6_13-15 and ¶[0041-0042_0047_0054_0058_0095_0102_0105_0107_0160_0164-0165 & 0170] shows and indicates base 12); a signal conductor (item 20 of Figs. 2-3_5-8 and ¶[0041_0050_0053-0054_0058_0062_0064-0065_0067_0076-0079_0084-0085_0090_0095_0100_0106-0108_0110-0114_0116_0118_0142-0143 & 0160] shows and indicates a signal conductor 20 {signal line 20}); and a ground conductor comprising a first ground conductor (items 22, 24 of Figs. 2-8_14-15 and ¶[0041_0054-0055_0058-0060_0063-0064_0070_0073_0084-0085_0090_0100_0108-0109_0114_0118-0119_0125_0129_0135_0138_0144-0146_0153_0157_0171] shows and indicates ground conductor 22_24 {main ground conductor 22 and auxiliary ground conductor 24} that is comprised first ground conductor 24), wherein the base comprises: a first surface; a first region located near an outer side of the first surface, wherein an external board is mounted in the first region; and a second region other than the first region, wherein the signal conductor extends through a region comprising the first region of the first surface in a first direction away from the outer side (items 18c-f, 18c of Fig. 2 & items 18c-g, 18c of Fig. 3 & items 12f, 12a, 12b, 12c, 12d, 12e, 12g of Fig. 1 & items 12f, 12a of Fig. 2 & items 12g, 12e of Fig. 3 & item 12c of Fig. 4 & items 12a, 12b, 12c of Fig. 5 & items 12c, 12d, 12e of Fig. 6 & items 202a, 202b, 100a, 100b of Fig. 11 and ¶[0042_0049_0053-0054 & 0094] shows and indicates where base 12 is comprised of the following structures: first surface 18c-f_18c_18c-g {surface formed by dielectric sheet 18c between connection portions 18c-f and 18c-g}; first region 12f section of first region 12f_12a {region that is formed by connection portion 12f within the area of the line portion 12a and the connection portion 12f} is located near the outer side of first surface 18c-f_18c_18c-g; first region 12g section of first region 12g_12e {region that is formed by connection portion 12g within the area of the line portion 12e and the connection portion 12g} is located near the outer side of first surface 18c-f_18c_18c-g, where external board 202a is mounted in first region 12f section of first region 12f_12a through connector 100a; where external board 202b is mounted in first region 12g section of first region 12g_12e through connector 100b; and second region 12a_12b_12c_12d_12e {region that is formed by the following structures: line portion 12a; line portion 12b; line portion 12c; line portion 12d; and line portion 12e} other than first region 12f_12a OR 12g_12e, where signal conductor 20 extends through the region comprising first region 12f_12a OR 12g_12e of first surface 18c-f_18c_18c-g in the first direction X away from the outer side); wherein the first ground conductor is located in the base at a distance from the signal conductor of less than 1/4 of a wavelength of a high-frequency signal in a direction perpendicular to the first surface (item T2 of Fig. 7 and ¶[0048_0094 & 0116] shows and indicates where first ground conductor 24 is located in base 12 at the distance T2 from signal conductor 20 of less than 1/4 of a wavelength of a high-frequency signal in a direction Z that is perpendicular to first surface 18c-f_18c_18c-g {high-frequency signal having a frequency of 2 GHz that has 15 centimeters, or 150,000 micrometers [1.5x10^5 μm] that is indicated in ¶[0094]; and where the thickness T2 is preferably about 50 μm that is indicated in ¶[0048], therefore, the signal conductor 20 will be less than 1/4 of a wavelength of a high-frequency signal in the direction Z perpendicular to the first surface, as shown in Fig. 7}), the high-frequency signal being transmitted through the signal conductor (Fig. 7 and ¶[0116] indicates where the high-frequency signal is transmitted through signal conductor 20), the first ground conductor comprising a first grid portion at a first location overlapping the first region and at least a portion of the signal conductor in a see-through plan view viewed in a direction toward the first surface (items 90, 30 of Figs. 2-6 and ¶[0050_0062 & 0084-0085] shows and indicates where first ground conductor 24 is comprised of first grid portion 90_30 {grid formed by bridges 90 and adjacent openings 30} at the first location overlapping first region 12f_12a OR 12g_12e and overlapping a portion of signal conductor 20 in a see-through plan view as viewed in direction Z towards first surface 18c-f_18c_18c-g by virtue that the signal conductor 20 is extending from connection portion 12f to connection portion 12g along the line portions 12a through 12e), the first grid portion comprising a segment disposed between first openings (Figs. 2-6 and ¶[0062 & 0085] shows and indicates where first grid portion 90_30 is comprised of segment 90 disposed between first openings 30), wherein lengths of the first openings in the first direction and a second direction crossing the first direction are 1/8 or more and 1/4 or less of the wavelength of the high-frequency signal, and wherein a through conductor is located on the first grid portion (items B1 to B4 of Figs. 2-4_8 & item B4 of Fig. 5 & item B2 of Fig. 6 & items L10, L11 of Fig. 5 & items L12, L13 of Fig. 6 & Fig. 8 and ¶[0075-0079 & 0094] shows and indicates where the lengths of first openings 30 in the first direction X and the second direction Y crossing the first direction X are 1/8 or more and 1/4 or less of the wavelength of the high-frequency signal {high-frequency signal having a frequency of 2 GHz that has 15 centimeters, or 150,000 micrometers [1.5x10^5 μm]; where the lengths L10, L11, L12 and L13 of the bent openings 30 in the line portions 12a-to-12b-to-12c and 12c-to-12d-to-12e are the same as the lengths of the straight openings 30 in the line and connection portions 12a and 12e by virtue that the via-hole conductors B2 & B4 of bridges 90 need to be aligned, as shown in Figs. 5-6}; and where through conductor B1 to B4 are located on first grid portion 90_30). Regarding claim 2, Wakabayashi discloses a wiring base, wherein the first openings have a rectangular shape with sides extending in the first direction and the second direction (Figs. 2-6 and ¶[0062] shows and indicates where first openings 30 have a rectangular shape with sides extending in the first direction X and the second direction Y). Regarding claim 3, Wakabayashi discloses a wiring base, wherein the through conductor is located at an intersection of the first grid portion (Figs. 2-4_5-6_8 & ¶[0068-0069 & 0071-0072] shows and indicates where through conductor B1-B4 are located at the intersection of first grid portion 90_30). Regarding claim 13, Wakabayashi discloses a wiring base, further comprising one or more through conductors, wherein a distance between adjacent ones of the through conductors is less than 1/4 of the wavelength of the high-frequency signal (Figs. 2-4_5-6 & ¶[0075-0079 & 0094] is understood to show and indicate that wiring base 10 is further comprised through conductor B2 and B4; where the distance between adjacent through conductors B2 and B4 is less than 1/4 of the wavelength of the high-frequency signal by virtue of adjacent through conductors B2 and B4 to signal conductor 20, as shown in Figs. 5-6). Regarding claim 15, Wakabayashi discloses an electronic device comprising: the wiring base; and an electronic component connected to the wiring base (item 200 of Fig. 11 and ¶[0092-0093] shows and indicates electronic device 200 that is comprised of wiring base 10 and the electronic components from external boards 202a & 202b {receiving circuit components from circuit board 202a and feeding circuit components from circuit board 202b} that is connected to wiring base 10). Allowable Subject Matter Claims 4-12 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 4, the primary reason for allowance is due to a wiring base, wherein the first ground conductor comprises a second grid portion at a second location connected to the first grid portion in the first direction and overlapping the second region in the see-through plan view, the second grid portion comprising a segment disposed between second openings, wherein lengths of the second openings in the first direction and the second direction are 1/8 or more and 1/4 or less of the wavelength of the high-frequency signal, and wherein an area of the second openings is less than an area of the first openings. Regarding claims 5-6, the primary reason for allowance is due to the dependency on claim 4. Regarding claim 7, the primary reason for allowance is due to a wiring base, wherein the ground conductor comprises a second ground conductor located in the base at a distance from the signal conductor of less than 1/4 of the wavelength of the high-frequency signal in the direction perpendicular to the first surface, the second ground conductor comprising a third grid portion at a third location overlapping the first region and at least a portion of the signal conductor in the see-through plan view, the third grid portion comprising a segment disposed between third openings, wherein lengths of the third openings in the first direction and the second direction are 1/8 or more and 1/4 or less of the wavelength of the high-frequency signal, and wherein the second ground conductor is further away from the first surface than the first ground conductor in the direction perpendicular to the first surface, and is connected to the first ground conductor via the through conductor. Regarding claims 8-10 and 12, the primary reason for allowance is due to the dependency on claim 7. Regarding claim 11, the primary reason for allowance is due to a wiring base, wherein the first openings do not overlap the ground conductor in the see-through plan view. Regarding claim 14, the primary reason for allowance is due to a wiring base, further comprising one or more signal conductors, wherein the base comprises a groove at a location between adjacent ones of the signal conductors, the groove extending from the first surface to a layer comprising the first ground conductor, and wherein the first openings are partially exposed at the groove in the see-through plan view viewed in the direction toward the first surface. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUILLERMO J EGOAVIL whose telephone number is (571)270-1325. The examiner can normally be reached Mon-Fri 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GUILLERMO J EGOAVIL/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Oct 30, 2023
Application Filed
Mar 28, 2023
Response after Non-Final Action
Jul 08, 2025
Response after Non-Final Action
Feb 24, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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2y 5m to grant Granted Mar 31, 2026
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Patent 12580374
HEAT DISSIPATION BOLT
2y 5m to grant Granted Mar 17, 2026
Patent 12575423
WIRING BOARD AND SEMICONDUCTOR PACKAGE
2y 5m to grant Granted Mar 10, 2026
Patent 12575028
WIRING CIRCUIT BOARD
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
98%
With Interview (+8.5%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 640 resolved cases by this examiner. Grant probability derived from career allow rate.

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