Prosecution Insights
Last updated: April 19, 2026
Application No. 18/029,059

POLISHING AND CLEANING METHOD, CLEANER AND POLISHING CLEANING SET

Final Rejection §103
Filed
Mar 28, 2023
Examiner
SOTO, CHRISTOPHER ASHLEY
Art Unit
3723
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Fujimi Incorporated
OA Round
2 (Final)
54%
Grant Probability
Moderate
3-4
OA Rounds
2y 9m
To Grant
82%
With Interview

Examiner Intelligence

Grants 54% of resolved cases
54%
Career Allow Rate
59 granted / 110 resolved
-16.4% vs TC avg
Strong +29% interview lift
Without
With
+28.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
57 currently pending
Career history
167
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
47.1%
+7.1% vs TC avg
§102
22.8%
-17.2% vs TC avg
§112
26.0%
-14.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 110 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1, 7, 9, 10, 11, 12, and 16 have been amended. Claim 8 has been canceled. Claims 17 and 18 have been added. Claims 1-7 and 9-18 have been examined on the merits. Response to Arguments Applicant’s arguments, see Page 1, filed 03/19/2026, with respect to the amendments to the claim objections are persuasive. The previous claim objections have been withdrawn. Applicant’s arguments, see Page 2, filed 03/19/2026, with respect to the previous 35 U.S.C. § 112(b) and 35 U.S.C. § 112(d) rejections are persuasive. The previous 35 U.S.C. § 112(b) rejections and 35 U.S.C. § 112(b) have been withdrawn. Applicant’s arguments, see Pages 2-9, filed 03/19/2026, with respect to the rejections under 35 U.S.C. 103 of claims 1-7, 9-16 have been considered but are moot because the claims have been amended and the new grounds of rejection do not rely on the reference or combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7, 9-11, and 15-18 are rejected under 35 U.S.C. 103 as being unpatentable over ISHIBASHI (U.S. Pub. No. 2019/0112506 A1) and SAITO (JP 2005105410 A). Referring to claim 1: ISHIBASHI teaches a method comprising: polishing a semiconductor substrate (“In particular, the surface to be polished is preferably formed of silicon carbide. Silicon carbide is expected as a material for semiconductor substrates” [0012]) to be polished using a polishing composition (“polishing composition” [0032]); and cleaning the polished semiconductor substrate using a cleaner (“The object polished by the method disclosed herein is typically cleaned after polished.” [0048]); wherein the polishing composition comprises a polishing auxiliary (“The polishing composition disclosed herein preferably includes a polishing aid.” [0026]) and a surfactant (“surfactant” [0032]), and the semiconductor substrate is formed of a material having a Vickers hardness of 1500 Hv or more (“Examples of the material having a Vickers hardness of 1500 Hv” [0012]), the material comprising diamond, sapphire (aluminum oxide), silicon carbide (“silicon carbide” [0012]), boron carbide, tungsten carbide, silicon nitride, or titanium nitride. ISHIBASHI teaches the cleaner can be “a suitable cleaning solution. The cleaning solution used is not particularly limited. A suitable kind can be selected and used among cleaning solutions that are commonly known or used.” [0048]; but is silent on the cleaner specifically comprising a surfactant. SAITO in an analogous semiconductor cleaner (“suitable for etching a semiconductor device such as a semiconductor device” [001]; “an organic material such as silicon” [0036]; “These surfactants may be used alone… Among these, a combination of an anionic surfactant and a nonionic surfactant is preferable from the viewpoint of improving the permeability of the chemical etchant, low bubble property, and contamination removal effect.” [0025]) wherein the cleaner specifically comprises a surfactant (“surfactant” [0025]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaner of ISHIBASHI with the cleaner comprising the surfactant as taught by SAITO for the purpose of, as it is known in the art, using a cleaner which is meant for “decontamination performances” [0029 of SAITO]. Referring to claim 2: ISHIBASHI as modified teaches the method according to claim 1, wherein the cleaner comprises an anionic surfactant (“anionic surfactant” [0025] of SAITO) as the surfactant. Referring to claim 3: ISHIBASHI as modified teaches the method according to claim 1, wherein the surfactant is a compound having an oxyalkylene unit (“oxyalkylene group” [0013] of SAITO). Referring to claim 4: ISHIBASHI as modified teaches the method according to claim 1, wherein the surfactant in the cleaner has a concentration of 1% or more by weight (“The concentration of the surfactant is preferably 0.0001 to 5% by weight” [0029] of SAITO). Referring to claim 5: ISHIBASHI as modified teaches the method according to claim 1, wherein the cleaner further comprises water (“a surfactant with water” [0016] of SAITO). Referring to claim 6: ISHIBASHI as modified teaches the method according to claim 1, wherein the polishing composition comprises a non-diamond abrasive (“The polishing composition disclosed herein can be substantially free of diamond particles as the abrasive” [0025] of ISHIBASHI). Referring to claim 7: ISHIBASHI as modified teaches the method according to claim 1, wherein the semiconductor substrate is a silicon carbide substrate (“In particular, the surface to be polished is preferably formed of silicon carbide. Silicon carbide is expected as a material for semiconductor substrates” [0012] of ISHIBASHI). Referring to claim 9: ISHIBASHI teaches a polishing cleaning set (polishing cleaning set comprising of a “polishing composition” [0032] and “a suitable cleaning solution” [0048]) comprising: a polishing composition (“polishing composition” [0032]) and a cleaner (“The object polished by the method disclosed herein is typically cleaned after polished.” [0048]), wherein the polishing composition comprises a non-diamond abrasive (“The polishing composition disclosed herein can be substantially free of diamond particles as the abrasive” [0025]), or a polishing auxiliary (“The polishing composition disclosed herein preferably includes a polishing aid.” [0026]) or both, and comprises a surfactant (“surfactant” [0032]). ISHIBASHI teaches the cleaner can be “a suitable cleaning solution. The cleaning solution used is not particularly limited. A suitable kind can be selected and used among cleaning solutions that are commonly known or used.” [0048]; but is silent on specifically the cleaner comprising an anionic surfactant or a cationic surfactant, the anionic surfactant is at least one species selected from the group consisting of an alkanesulfonic acid salt, a naphthalene sulfonic acid salt, a polyoxyalkylene sulfuric acid salt, an α-olefinsulfonic acid salt, an α-sulfo fatty acid salt, an α-sulfo fatty acid alkyl ester salt, an alkyl sulfosuccinic acid salt, a dialkyl sulfosuccinic acid salt, an alkenylsulfate salt, a polyoxyalkylene alkylethersulfate salt, a polyoxyalkylene alkenylether sulfate salt, an amide ether carboxylic acid salt, a sulfosuccinic acid salt, an amino acid-based surfactant, an alkylphosphate salt and an alkyletherphosphate salt, and the cationic surfactant is at least one species selected from an alkyl amide amine, an alkylamine, a tetraalkyl ammonium salt, a mono-long-chain alkyl tri-short-chain alkyl ammonium salt, and a di-long-chain alkyl di-short-chain alkyl ammonium salt, wherein each alkyl group of the tetraalkyl group has 1 to 4 carbons, each of the long-chain alkyl group has 8 to 18 carbons and each of the short-chain alkyl group has 1 to 2 carbons. SAITO in an analogous semiconductor cleaner (“suitable for etching a semiconductor device such as a semiconductor device” [001]; “an organic material such as silicon” [0036]; “These surfactants may be used alone… Among these, a combination of an anionic surfactant and a nonionic surfactant is preferable from the viewpoint of improving the permeability of the chemical etchant, low bubble property, and contamination removal effect.” [0025]) an anionic surfactant (“anionic surfactant” [0025]) or a cationic surfactant, the anionic surfactant (“anionic surfactant” [0025]) is at least one species selected from the group consisting of an alkanesulfonic acid salt, a naphthalene sulfonic acid salt, a polyoxyalkylene sulfuric acid salt, an α-olefinsulfonic acid salt, an α-sulfo fatty acid salt, an α-sulfo fatty acid alkyl ester salt, an alkyl sulfosuccinic acid salt, a dialkyl sulfosuccinic acid salt, an alkenylsulfate salt, a polyoxyalkylene alkylethersulfate salt, a polyoxyalkylene alkenylether sulfate salt, an amide ether carboxylic acid salt, a sulfosuccinic acid salt, an amino acid-based surfactant (“Anionic surfactants include carboxylic acid type, sulfonic acid type, sulfate ester type, and phosphate ester type, amphoteric surfactants include amino acid type” [0026]), an alkylphosphate salt and an alkyletherphosphate salt, and the cationic surfactant is at least one species selected from an alkyl amide amine, an alkylamine, a tetraalkyl ammonium salt, a mono-long-chain alkyl tri-short-chain alkyl ammonium salt, and a di-long-chain alkyl di-short-chain alkyl ammonium salt, wherein each alkyl group of the tetraalkyl group has 1 to 4 carbons, each of the long-chain alkyl group has 8 to 18 carbons and each of the short-chain alkyl group has 1 to 2 carbons. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaner of ISHIBASHI with the cleaner comprising the surfactant as taught by SAITO for the purpose of, as it is known in the art, using a cleaner which is meant for “decontamination performances” [0029 of SAITO]. Referring to claim 10: ISHIBASHI teaches a cleaning method comprising: cleaning a semiconductor substrate (“In particular, the surface to be polished is preferably formed of silicon carbide. Silicon carbide is expected as a material for semiconductor substrates” [0012]) using a cleaner (“The object polished by the method disclosed herein is typically cleaned after polished.” [0048]), a surfactant (“surfactant” [0032]), and the semiconductor substrate is polished with use of a non-diamond abrasive (“The polishing composition disclosed herein can be substantially free of diamond particles as the abrasive” [0025]), or a polishing auxiliary (“With the polishing aid contained in the polishing composition,”[0056]) or both before the cleaning (“The object polished by the method disclosed herein is typically cleaned after polished. The cleaning can be carried out using a suitable cleaning solution” [0048]), and the semiconductor substrate is a silicon carbide substrate (“Silicon carbide is expected as a material for semiconductor substrates” [0012]). ISHIBASHI teaches the cleaner can be “a suitable cleaning solution. The cleaning solution used is not particularly limited. A suitable kind can be selected and used among cleaning solutions that are commonly known or used.” [0048]; but is silent on specifically the cleaner comprising a surfactant. SAITO in an analogous semiconductor cleaner (“suitable for etching a semiconductor device such as a semiconductor device” [001]; “an organic material such as silicon” [0036]; “These surfactants may be used alone… Among these, a combination of an anionic surfactant and a nonionic surfactant is preferable from the viewpoint of improving the permeability of the chemical etchant, low bubble property, and contamination removal effect.” [0025]) wherein the cleaner specifically comprises a surfactant (“surfactant” [0025]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaner of ISHIBASHI with the cleaner comprising the surfactant as taught by SAITO for the purpose of, as it is known in the art, using a cleaner which is meant for “decontamination performances” [0029 of SAITO]. Referring to claim 11: ISHIBASHI teaches a cleaner (“The object polished by the method disclosed herein is typically cleaned after polished.” [0048]) used in cleaning of a silicon carbide substrate (“In particular, the surface to be polished is preferably formed of silicon carbide. Silicon carbide is expected as a material for semiconductor substrates” [0012]) after polishing (“The object polished by the method disclosed herein is typically cleaned after polished. The cleaning can be carried out using a suitable cleaning solution” [0048]) with use of a non- diamond abrasive (“The polishing composition disclosed herein can be substantially free of diamond particles as the abrasive” [0025]), or a polishing auxiliary (“The polishing composition disclosed herein preferably includes a polishing aid.” [0026]) or both, ISHIBASHI teaches the cleaner can be “a suitable cleaning solution. The cleaning solution used is not particularly limited. A suitable kind can be selected and used among cleaning solutions that are commonly known or used.” [0048]; but is silent on the cleaner specifically comprising an anionic surfactant or a cationic surfactant, the anionic surfactant is at least one species selected from the group consisting of an alkanesulfonic acid salt, a naphthalene sulfonic acid salt, a polyoxyalkylene sulfuric acid salt, an α-olefinsulfonic acid salt, an α-sulfo fatty acid salt, an α-sulfo fatty acid alkyl ester salt, an alkyl sulfosuccinic acid salt, a dialkyl sulfosuccinic acid salt, an alkenylsulfate salt, a polyoxyalkylene alkylethersulfate salt, a polyoxyalkylene alkenylether sulfate salt, an amide ether carboxylic acid salt, a sulfosuccinic acid salt, an amino acid-based surfactant, an alkylphosphate salt and an alkyletherphosphate salt, and the cationic surfactant is at least one species selected from an alkyl amide amine, an alkylamine, a tetraalkyl ammonium salt, a mono-long-chain alkyl tri-short-chain alkyl ammonium salt, and a di-long-chain alkyl di-short-chain alkyl ammonium salt, wherein each alkyl group of the tetraalkyl group has 1 to 4 carbons, each of the long-chain alkyl group has 8 to 18 carbons and each of the short-chain alkyl group has 1 to 2 carbons. SAITO in an analogous semiconductor cleaner (“suitable for etching a semiconductor device such as a semiconductor device” [001]; “an organic material such as silicon” [0036]; “These surfactants may be used alone… Among these, a combination of an anionic surfactant and a nonionic surfactant is preferable from the viewpoint of improving the permeability of the chemical etchant, low bubble property, and contamination removal effect.” [0025]) an anionic surfactant (“anionic surfactant” [0025]) or a cationic surfactant, the anionic surfactant (“anionic surfactant” [0025]) is at least one species selected from the group consisting of an alkanesulfonic acid salt, a naphthalene sulfonic acid salt, a polyoxyalkylene sulfuric acid salt, an α-olefinsulfonic acid salt, an α-sulfo fatty acid salt, an α-sulfo fatty acid alkyl ester salt, an alkyl sulfosuccinic acid salt, a dialkyl sulfosuccinic acid salt, an alkenylsulfate salt, a polyoxyalkylene alkylethersulfate salt, a polyoxyalkylene alkenylether sulfate salt, an amide ether carboxylic acid salt, a sulfosuccinic acid salt, an amino acid-based surfactant (“Anionic surfactants include carboxylic acid type, sulfonic acid type, sulfate ester type, and phosphate ester type, amphoteric surfactants include amino acid type” [0026]), an alkylphosphate salt and an alkyletherphosphate salt, and the cationic surfactant is at least one species selected from an alkyl amide amine, an alkylamine, a tetraalkyl ammonium salt, a mono-long-chain alkyl tri-short-chain alkyl ammonium salt, and a di-long-chain alkyl di-short-chain alkyl ammonium salt, wherein each alkyl group of the tetraalkyl group has 1 to 4 carbons, each of the long-chain alkyl group has 8 to 18 carbons and each of the short-chain alkyl group has 1 to 2 carbons. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaner of ISHIBASHI with the cleaner comprising the surfactant as taught by SAITO for the purpose of, as it is known in the art, using a cleaner which is meant for “decontamination performances” [0029 of SAITO]. Referring to claim 15: ISHIBASHI as modified teaches the method according to claim 1, wherein the polishing auxiliary comprises a composite metal oxide (“the polishing composition includes a composite metal oxide as the polishing aid.” [0028] of ISHIBASHI). Referring to claim 16: ISHIBASHI as modified teaches the method according to claim 1, wherein the polishing composition is supplied to a surface of the semiconductor substrate (“In particular, the surface to be polished is preferably formed of silicon carbide. Silicon carbide is expected as a material for semiconductor substrates” [0012] of ISHIBASHI), a polishing pad (“polishing pad” [0046] of ISHIBASHI) is pressed against the surface of the semiconductor substrate, and both of the surface and the pad are moved relative to each other (“While supplying the polishing composition, a polishing pad is pushed against one side of the object and the two are moved (e.g. rotated) in coordination to polish the one side of the object.” [0046] of ISHIBASHI). Referring to claim 17: ISHIBASHI as modified teaches the polishing cleaning set according to claim 9, wherein the cleaner comprises the anionic surfactant (“Anionic surfactants” [0026] of SAITO). Referring to claim 18: ISHIBASHI as modified teaches the cleaner according to claim 11, wherein the cleaner comprises the anionic surfactant (“Anionic surfactants” [0026] of SAITO). Claim 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over ISHIBASHI (U.S. Pub. No. 2019/0112506 A1) and SAITO (JP 2005105410 A), as applied above in claim 1, and in further view of Bessho (US 6440856 B1). Referring to claim 12: ISHIBASHI as modified teaches the method according to claim 1, but is silent on wherein the method comprises preliminary cleaning the polished semiconductor substrate without use of the cleaner comprising the surfactant before the cleaning step using the cleaner. Bessho in an analogous method of cleaning (Abstract) wherein the method comprises preliminary cleaning (“by conducting known cleaning processes such as immersion cleaning, paddle cleaning, spray cleaning, brush cleaning and ultrasonic cleaning, before or after the cleaning with the cleaning agents of the invention.” Cols. 10-11, lines 66-2) the polished semiconductor substrate without use of the cleaner comprising the surfactant before the cleaning step (“In the cleaning agent for semiconductor parts of the invention, it is preferred that at least one kind of surfactant selected from the group consisting of anionic surfactants, cationic surfactants and nonionic surfactants is further mixed with the above-mentioned (co)polymer.” Cols. 9-10, lines 66-3) using the cleaner. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of ISHIBASHI as modified with the preliminary cleaner as taught by Bessho for the purpose of, as it is known in the art, increasing the efficiency of the cleaning process. Referring to claim 13: ISHIBASHI as modified teaches the method according to claim 1, but is silent on wherein the cleaning is cleaning by immersion. Bessho in an analogous method of cleaning and teaches wherein the cleaning is cleaning by immersion (“by conducting known cleaning processes such as immersion cleaning, paddle cleaning, spray cleaning, brush cleaning and ultrasonic cleaning, before or after the cleaning with the cleaning agents of the invention.” Cols. 10-11, lines 66-2) It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaning method of ISHIBASHI as modified with the cleaning by immersion as taught by Bessho for purpose of, as it is known in the art, having an alternate manner of cleaning the via exposing the entirety of the substrate to a cleaning solution. Referring to claim 14: ISHIBASHI as modified teaches the method according to claim 1, but is silent on wherein the cleaning is scrub cleaning. Bessho in an analogous method of cleaning (Abstract) wherein the cleaning is scrub cleaning (“by conducting known cleaning processes such as immersion cleaning, paddle cleaning, spray cleaning, brush cleaning and ultrasonic cleaning, before or after the cleaning with the cleaning agents of the invention.” Cols. 10-11, lines 66-2). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the cleaning method of ISHIBASHI as modified with the scrub cleaning as taught by Bessho for the purpose of, as it is known in the art, having an alternate form of cleaning the substrate. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER SOTO whose telephone number is (571)272-8172. The examiner can normally be reached Monday-Friday, 8a.m. - 5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Carter can be reached at 571-272-4475. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. CHRISTOPHER SOTO Examiner Art Unit 3723 /CHRISTOPHER SOTO/Examiner, Art Unit 3723 /MONICA S CARTER/Supervisory Patent Examiner, Art Unit 3723
Read full office action

Prosecution Timeline

Mar 28, 2023
Application Filed
Sep 19, 2025
Non-Final Rejection — §103
Mar 19, 2026
Response Filed
Mar 31, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
54%
Grant Probability
82%
With Interview (+28.9%)
2y 9m
Median Time to Grant
Moderate
PTA Risk
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