DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6 and 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Specifically, claim 1 recites that the maximum height Sz is to be measured by “a laser microscopy” in line 3, but then also is to be “measured according to ISO 25178” in line 5. ISO 25178 categorically subsumes measuring via laser microscopy and further includes other forms of possible measurement outside of laser microscopy which creates a potential lack of clarity in the claim language as to which method of measurement is to be used in determining the maximum height Sz. Examiner is interpreting that Sz is to be measured using laser microscopy, where the parameter Sz is defined in ISO 25178. Further, Examiner suggests amending “measured according to ISO 25178” in line 5 to read “defined according to ISO 25178” in order to convey that Sz is defined by ISO 25178 but that laser microscopy is the method of measuring Sz in claim 1. Examiner further suggests amending “a laser microscopy” in line 3 to ready “laser microscopy” in accordance with proper English. Claims 2-6 and 9 are similarly rejected for depending upon claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0227268 A1 to Wang et al. (hereinafter “Wang” – previously cited reference) in view of US 2013/0244359 A1 to Bamber et al. (hereinafter “Bamber” – newly cited reference).
Regarding claim 1, Wang discloses an indium phosphide substrate, wherein a surface roughness of an edge part of the substrate has a maximum height of 2.1 µm or less, as measured by a laser microscopy on the entire surface of the edge part (indium phosphide wafer having chamfered edges with polished surface roughness of 0.5 nm or less, where atomic force microscope is used to measure surface roughness, where the microscope uses a laser beam to detect a cantilever’s deflection for creating a topographic map of the substrate surface; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]), wherein the maximum height is a distance from a highest point to a lowest point of the surface and the edge part is an outer surface excluding a main surface and a back surface of the substrate (surface roughness is measured as the highest to lowest points and chamfered edges exclude the main surface and back surface of the InP wafer; Fig. 4a).
Wang fails to disclose wherein maximum height Sz of a semiconductor substrate surface is 2.1 microns or less measured according to ISO 25178. However, Wang already discloses measuring surface roughness parameters by creating a topographic map of the substrate surface which is analogous to measuring Sz according to ISO 25178 given that both measure peak to trough points of the substrate surface. The value Sz can be determined by creating a topographic map of the substrate surface.
Further, Bamber discloses wherein maximum height Sz of a semiconductor substrate surface is 2.1 microns or less measured according to ISO 25178 (polishing of semiconductor substrate to have Sz of tens of nanometers as measured according to ISO/DIS 25178-2; abstract; paragraphs [0110], [0122]; Table 2).
Wang and Bamber are both considered to be analogous to the claimed invention because they are in the same field of measuring surface roughness parameters of semiconductor substrate surfaces after polishing. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Wang to incorporate the teaching of Bamber in order to potentially provide more detailed information about substrate surface defects which can initiate cracks, dislocations during epi growth, or bonding failures, a more statistically representative and comprehensive view of the substrate surfaces, and tighter tolerance controls for high-reliability applications where average smoothness is insufficient.
Regarding claim 2, Wang in view of Bamber discloses the indium phosphide substrate according to claim 1. Wang further discloses wherein the surface roughness of the edge part of the substrate has the maximum height of 1.8 µm or less (indium phosphide wafer having chamfered edges with polished surface roughness of 0.5 nm or less; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]).
Wang fails to disclose wherein maximum height Sz of a semiconductor substrate surface is 1.8 microns or less measured according to ISO 25178. However, Wang already discloses measuring surface roughness parameters by creating a topographic map of the substrate surface which is analogous to measuring Sz according to ISO 25178 given that both measure peak to trough points of the substrate surface. The value Sz can be determined by creating a topographic map of the substrate surface.
Further, Bamber discloses wherein maximum height Sz of a semiconductor substrate surface is 1.8 microns or less measured according to ISO 25178 (polishing of semiconductor substrate to have Sz of tens of nanometers as measured according to ISO/DIS 25178-2; abstract; paragraphs [0110], [0122]; Table 2).
Wang and Bamber are both considered to be analogous to the claimed invention because they are in the same field of measuring surface roughness parameters of semiconductor substrate surfaces after polishing. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Wang to incorporate the teaching of Bamber in order to potentially provide more detailed information about substrate surface defects which can initiate cracks, dislocations during epi growth, or bonding failures, a more statistically representative and comprehensive view of the substrate surfaces, and tighter tolerance controls for high-reliability applications where average smoothness is insufficient.
Regarding claim 3, Wang in view of Bamber discloses the indium phosphide substrate according to claim 1. Wang further discloses wherein a surface roughness of the edge part of the substrate has a root mean square height Sq of 0.15 µm or less, as measured by a laser microscopy on the entire surface of the edge part (indium phosphide wafer having chamfered edges with polished surface roughness of 0.5 nm or less thereby having RMS height of 0.15 microns or less, where atomic force microscope is used to measure surface roughness, where the microscope uses a laser beam to detect a cantilever’s deflection for creating a topographic map of the substrate surface; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]).
Regarding claim 4, Wang in view of Bamber discloses the indium phosphide substrate according to claim 3. Wang further discloses wherein the surface roughness of the edge part of the substrate has the root mean square height Sq of 0.07 µm or less (indium phosphide wafer having chamfered edges with polished surface roughness of 0.5 nm or less thereby having RMS height of 0.07 microns or less; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]).
Regarding claim 5, Wang in view of Bamber discloses the indium phosphide substrate according to claim 1. Wang further discloses wherein the edge part of the substrate has a surface sloping from one surface; and a surface with curvature from the point where the sloping surface ends from one surface to the point where the sloping surface ends from the other surface (wafer has sloping edge surfaces that meet at curved surface along side of wafer; Fig. 4a; paragraphs [0033], [0074]); and a maximum height of the surface sloping from one surface, as measured by the laser microscopy, is 1.2 µm or less; and a maximum height of the surface with curvature, as measured by the laser microscopy, is 2.1 µm or less (indium phosphide wafer having chamfered sloping edge surfaces that meet at curved surface along side of wafer with polished surface roughness of 0.5 nm or less, where atomic force microscope is used to measure surface roughness, where the microscope uses a laser beam to detect a cantilever’s deflection for creating a topographic map of the substrate surface; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]).
Wang fails to disclose wherein maximum height Sz of a semiconductor substrate surface is 1.8 microns or less measured according to ISO 25178. However, Wang already discloses measuring surface roughness parameters by creating a topographic map of the substrate surface which is analogous to measuring Sz according to ISO 25178 given that both measure peak to trough points of the substrate surface. The value Sz can be determined by creating a topographic map of the substrate surface.
Further, Bamber discloses wherein maximum height Sz of a semiconductor substrate surface is 1.2 microns or less measured according to ISO 25178 (polishing of semiconductor substrate to have Sz of tens of nanometers as measured according to ISO/DIS 25178-2; abstract; paragraphs [0110], [0122]; Table 2).
Wang and Bamber are both considered to be analogous to the claimed invention because they are in the same field of measuring surface roughness parameters of semiconductor substrate surfaces after polishing. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Wang to incorporate the teaching of Bamber in order to potentially provide more detailed information about substrate surface defects which can initiate cracks, dislocations during epi growth, or bonding failures, a more statistically representative and comprehensive view of the substrate surfaces, and tighter tolerance controls for high-reliability applications where average smoothness is insufficient.
Regarding claim 6, Wang in view of Bamber discloses the indium phosphide substrate according to claim 1. Wang further discloses wherein the edge part of the substrate has a surface sloping from one surface; and a surface with curvature from the point where the sloping surface ends from one surface to the point where the sloping surface ends from the other surface (wafer has sloping edge surfaces that meet at curved surface along side of wafer; Fig. 4a; paragraphs [0033], [0074]); and a root mean square height Sq of the surface sloping from one surface, as measured by the laser microscopy, is 0.15 µm or less; and a root mean square height Sq of the surface with curvature, as measured by the laser microscopy, is 0.15 µm or less (indium phosphide wafer having chamfered sloping edge surfaces that meet at curved surface along side of wafer with polished surface roughness of 0.5 nm or less thereby having RMS height of 0.15 microns or less, where atomic force microscope is used to measure surface roughness, where the microscope uses a laser beam to detect a cantilever’s deflection for creating a topographic map of the substrate surface; Fig. 4a; paragraphs [0033], [0074]-[0075], [0096]).
Regarding claim 9, Wang in view of Bamber discloses a semiconductor epitaxial wafer, comprising the indium phosphide substrate according to claim 1, and an epitaxial crystal layer on a main surface of the indium phosphide substrate (epitaxial growth layer grown on surface of wafer; abstract; paragraphs [0041], [0077]).
Response to Arguments
Applicant's arguments filed March 4, 2026 have been fully considered. Applicant submitted amendments to claim 1 and corresponding arguments. Examiner appreciates the detailed explanation of the particular measurement index Sz in line with ISO 25178 provided by Applicant as well as the Rule 132 Declaration by Mr. Kodai Yamagishi. This, in combination with the clarifying amendments made to claim 1, overcomes the previous 35 USC 102 rejection using Wang. However, after additional search, new grounds of rejection have been asserted under 35 USC 103 using Wang in view of Bamber. Examiner notes that while Wang does not explicitly disclose measuring Sz according to ISO 25178, Wang does disclose using an atomic force microscope to measure surface roughness, where the microscope uses a laser beam to detect a cantilever’s deflection for creating a topographic map of the substrate surface, which would allow determination of the value Sz across all surfaces of the InP wafer. Further, while the disclosure of Wang focuses on the back side of the InP wafer, it does not limit the polishing using lapping powders and CMP nor the measurement of surface roughness to the back side of the wafer. These steps could readily be applied to the edges of the InP wafer which have already been chamfered, the same chamfered edges that do not suffer from the ~6 micron pit depth mentioned by Applicant. Moreover, the surface roughness of 0.5 nm or less disclosed in Wang would strongly suggest that maximum height values (at least in several continuous portions of the InP wafer edges) would be less than 2100 nm or 2.1 microns which satisfies the associated limitation of claim 1. Further, measuring using an international standard, such as ISO 25178, would have been known to a skilled artisan given the fact that it is an internationally-accepted standard and Wang already discloses topographic mapping of the substrate surface. Bamber is introduced merely to provide explicit disclosure of measuring Sz according to ISO 25178 of a semiconductor substrate surface in a publication that significantly predates Wang.
Conclusion
Applicant submitted amendments in their Response to the previous Office Action which necessitated the new grounds of rejection. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p.
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/IAN DEGRASSE/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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