Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
OFFICE ACTION
This is a response to the application filed on 4/13/2023
Claims 11-21 are pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 19 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 19, the limitation “the respective configuration file for the respective reloadable functional unit” lacks antecedent basis.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) The claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) The claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 11-21 are rejected under 35 U.S.C. 102(a) (1) being anticipated by the prior art of record Aschauer (EP 3702947 A1).
Regarding claims 11 and 19-21, the prior art discloses:
A method for checking an integrity (see verify/determine integrity at run time on cover page, par 9-14, 17, 29, 32, 56, 69-73) of reloadable functional units (reconfigurable hardware, hardware components, hardware instances/circuits/module of field programmable gate array in fig 1, Par 5-6, 24-29, 56-57) which are reloaded, as configuration files (configuration data 21 in fig 1, bitstream in par 59-6, 63 ) during a runtime (see verify/determine integrity at run time on cover page, par 9-14, 17, 29, 32, 56, 69-73) of an electronic component formed as a programmable IC (FPGA/ SOC FPGA in par 12, 30, 56-57), into sub-regions (reconfigurable parts, partial bitstream for partial reconfigurable regions PRR, hardware application components, partial reconfiguration logic, partial reconfigurable to reconfigure parts (par 4-5, 12-22, 57, 59-62)) of a dynamically reconfigurable region (dynamically reconfigurable module in par 57) of the electronic component, the reloadable functional units including predefined interfaces (interface , upload/reboot, reconfiguration, configuration settings in par 44, 50-51, 58-60, 63, 69, 70-73, 12, 22)) which match (see one or more of cover page, par 11, 16-26, 36, 44, 50, 63) corresponding interfaces of those sub-regions of the dynamically reconfigurable region of the electronic component into which the reloadable functional units are loadable (reconfigurable hardware, hardware components, hardware instances/circuits/module of field programmable gate array in fig 1, Par 5-6, 24-29, 56-57), the method comprising:
preconfiguring, for each reloadable functional unit, a predetermined sub- region regions (reconfigurable parts, partial bitstream for partial reconfigurable regions PRR, hardware application components, partial reconfiguration logic, partial reconfigurable to reconfigure parts (par 5, 12-22, 57, 59-62)) of the dynamically reconfigurable region (dynamically reconfigurable module, configurable/reconfigurable hardware in par 56-57) is preconfigured with a corresponding, associated, functionally identical twin functional unit, which has a basic structure of reloadable functional units of the electronic component formed as logic circuit functions (i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 70-73.
loading a reloadable functional unit into a predetermined sub-region (reconfigurable parts, partial bitstream for partial reconfigurable regions PRR, hardware application components, partial reconfiguration logic, partial reconfigurable to reconfigure parts (par 5, 12-22, 57, 59-62)) of the dynamically reconfigurable region at the runtime integrity (see verify/determine integrity at run time on cover page, par 9-14, 17, 29, 32, 56, 69-73) of the electronic component;
supplying the loaded reloadable functional unit and the associated twin functional unit with identical input data and executed the loaded reloadable functional unit and an associated twin functional unit in parallel
(fig 1 show execution execute 12 execute hardware components, units 15 and 16 in parallel);
comparing output data of the loaded reloadable functional unit and output data of the associated twin functional unit are compared; and
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 70-73.
enabling the loaded reloadable functional unit and forwarding the output data of the loaded reloadable functional unit when a match is detected between the output data of the reloadable functional unit and the output data of the associated twin functional unit.
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 64, 70-73.
(Claim 12) wherein the loaded reloadable functional unit is disabled and an alarm message is output if the output data of the loaded reloadable functional unit deviates from the output data of the associated twin functional unit.
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 64, 70-73.
(Claim 13) wherein the output data of the reloadable functional unit and the output data of the associated twin functional unit are forwarded to a comparison logic for comparison.
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 64, 70-73)
(Claim 14) wherein the output data of the reloadable functional unit and the output data of the associated twin functional unit are forwarded to a comparison logic for comparison.
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 64, 70-73)
(Claim 15) wherein the comparison logic is statically configured in the dynamically reconfigurable region (par 57) of the electronic component.
(Claim 16) wherein the output data of the reloadable functional unit and the output data of the associated twin functional unit are compared for a predetermined time duration.
(i.e., see one or more of the followings:
par 63: current configuration setting unit 16 in fig 1 should match the initial configuration setting unit 15 in fig 1,
par 64: at run time…determine current configuration setting unit 16 of execution component 13 and compares it with the initial configuration setting unit 15… and functionally continue working for a match…, functionality terminated/alarmed/disable for a mis-match/ un-match/ deviation;
par 36: compares current configuration setting unit 16 with initial configuration setting unit 15…continues running for a match
Also see par 16, 20, 22, 24, 32, 64, 70-73)
(Claim 17) wherein a predetermined test data sequence is used as input data for the comparison of the output data of the reloadable functional unit and the output data of the associated twin functional unit (par 17, 40, 52-53)
(Claim 18) wherein the twin functional unit, which is configured for each reloadable functional unit, is loaded from a secure and trusted memory region (par 16, 58-60) into the predetermined sub-region of the dynamically reconfigurable region of the electronic component.
Correspondence Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL DINH whose telephone number is 571-272-1890. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s Supervisor, Jack Chiang can be reached on 571-272-7483. The fax number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PAUL DINH/Primary Examiner, Art Unit 2851
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