Prosecution Insights
Last updated: April 19, 2026
Application No. 18/031,865

METHOD FOR GENERATING MASK PATTERN

Non-Final OA §102
Filed
Apr 13, 2023
Examiner
LEE, ERIC D
Art Unit
2851
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
ASML Netherlands B.V.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
523 granted / 644 resolved
+13.2% vs TC avg
Strong +19% interview lift
Without
With
+19.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
13 currently pending
Career history
657
Total Applications
across all art units

Statute-Specific Performance

§101
18.7%
-21.3% vs TC avg
§103
30.7%
-9.3% vs TC avg
§102
26.4%
-13.6% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 644 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-11 and 13-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang et al., hereinafter Zhang, WO 2019/179747. Regarding Claim 1, Zhang teaches a non-transitory computer-readable medium (Zhang paragraph [0100], see computer readable medium) comprising instructions stored therein that, when executed by one or more processors, are configured to cause the one or more processors to at least: obtain (i) a subset of target features within a target pattern (Zhang paragraphs [0062]-[0066], wherein target patterns are obtained in the form of an initial image and that include a plurality of features), the subset of target features having physical characteristic values breaching a threshold value (Zhang paragraphs [0082]-[0084], wherein a cost function is evaluated for the features of the target patterns, the features potentially having violations related to edge placement errors or mask rule checks which are defined by physical characteristics of the target patterns exceeding allowable limits), and (ii) an initial mask pattern associated with the target pattern (Zhang paragraphs [0062]-[0066], wherein the initial image is an initial mask pattern); and modify, based on a mask manufacturing constraint and a performance metric of a patterning process, one or more features of the initial mask pattern corresponding to the subset of target features to generate a mask pattern for the patterning process, the modification comprising application of a curvature to a portion of the one or more features of the initial mask pattern (Zhang paragraphs [0081]-[0084], wherein based on the cost function which is a performance metric that includes mask manufacturing constraints, e.g. EPE, a mask pattern is generated from modifications to an initial image having curvilinear features). Regarding Claim 2, Zhang further teaches wherein the instructions configured to cause the one or more processors to obtain the initial mask pattern are further configured to cause the one or more processors to use the target pattern to generate a mask pattern that causes a simulated pattern on a substrate to closely match the target pattern (Zhang paragraphs [0081]-[0082], wherein a simulated pattern is generated and used to optimize the mask patterns to reduce the differences between the simulated patterns and the target patterns). Regarding Claim 3, Zhang further teaches wherein the instructions configured to cause the one or more processors to modify of the initial mask pattern are further configured to cause the one or more processors to modify a geometry of the one or more features of the initial mask pattern corresponding to the subset of target features (Zhang paragraph [0082], wherein the geometry of the mask patterns are modified to generate curvilinear patterns). Regarding Claim 4, Zhang further teaches wherein the modification of the initial mask pattern is an iterative process (Zhang paragraphs [0086]-[0087], wherein the generation of the mask patterns is iterative), each iteration comprising: simulation, via one or more process models using the initial mask pattern, of the patterning process to generate a simulated pattern on a substrate (Zhang paragraph [0081], wherein simulations are performed to predict the manufactured mask pattern); determination, based on the simulated pattern and the target pattern, of the performance metric associated with the patterning process (Zhang paragraph [0086]-[0087], wherein a cost function is determined); determination of whether the performance metric is within a performance threshold (Zhang paragraphs [0086]-[0087], wherein it is determined if the cost function is reduced or minimized); and modification of the geometry of the one or more features of the initial mask pattern corresponding to the subset of target features until the modified mask pattern causes the performance metric to be within the performance threshold (Zhang paragraph [0086]-[0088], wherein the mask patterns are modified until the cost function is reduced or minimized). Regarding Claim 5, Zhang further teaches wherein the generation of the mask pattern comprises an optical proximity correction process (Zhang paragraph [0096], wherein the generation of the mask includes OPC). Regarding Claim 6, Zhang further teaches wherein the performance metric comprises an edge placement error between a simulated pattern and the target pattern (Zhang paragraph [0082], wherein the cost function includes edge placement error EPE). Regarding Claim 7, Zhang further teaches wherein the instructions are further configured to cause the one or more processors to: determine, via simulating using a process model and the mask pattern, a process condition associated with the patterning process (Zhang paragraphs [0081]-[0082], wherein simulation is performed using process models on the mask patterns to determine process conditions); and enable exposure, via a lithographic apparatus configured according to the process condition and employing a mask comprising the mask pattern (Zhang paragraphs [0077] and [0119]-[0120], wherein the mask patterns are used in a lithographic apparatus for manufacturing). Regarding Claim 8, Zhang further teaches wherein the process condition comprises a value of one or more selected from: dose, focus, illumination intensity, and/or illumination pupil (Zhang paragraphs [0055] and [0081], wherein the optical model used in the simulation defines the optical characteristics including properties of illumination). Regarding Claim 9, Zhang further teaches wherein features of the initial mask pattern are Manhattanized features of the target pattern (Zhang Fig. 3 and paragraphs [0065] and [0080], wherein target patterns may be initially rectangular, i.e. have Manhattanized features), and the one or more features of the modified mask pattern are curvilinear in shape while the remaining features are unchanged Manhattanized features of the initial mask pattern (Zhang paragraph [0071], wherein not all feature are modified). Regarding Claim 10, Zhang further teaches wherein features of the initial mask pattern are curvilinear in shape, and the one or more features of the modified mask pattern have a different curvilinear shape (Zhang paragraphs [0061] and [0077], wherein initial images may be curvilinear and the curvilinear patterns evolve, i.e. change shape, with each iteration) while remaining features are unchanged curvilinear features of the initial mask pattern (Zhang paragraph [0071], wherein not all feature are modified). Regarding Claim 11, Zhang further teaches wherein the physical characteristic comprises at least one selected from: a critical dimension of the target feature; a corner-to-corner distance between the target features; or an offset between adjacent target features (Zhang paragraph [0081], wherein physical characteristics include CD and overlay). Regarding Claim 13, Zhang teaches a method comprising: obtaining (i) a subset of target features within a target pattern (Zhang paragraphs [0062]-[0066], wherein target patterns are obtained in the form of an initial image and that include a plurality of features), the subset of target features having physical characteristic values breaching a threshold value (Zhang paragraphs [0082]-[0084], wherein a cost function is evaluated for the features of the target patterns, the features potentially having violations related to edge placement errors or mask rule checks which are defined by physical characteristics of the target patterns exceeding allowable limits), and (ii) an initial mask pattern associated with the target pattern (Zhang paragraphs [0062]-[0066], wherein the initial image is an initial mask pattern); and modifying, based on a mask manufacturing constraint and a performance metric of a patterning process, one or more features of the initial mask pattern corresponding to the subset of target features to generate a mask pattern for the patterning process, the modifying comprising applying a curvature to a portion of the one or more features of the initial mask pattern (Zhang paragraphs [0081]-[0084], wherein based on the cost function which is a performance metric that includes mask manufacturing constraints, e.g. EPE, a mask pattern is generated from modifications to an initial image having curvilinear features). Regarding Claim 14, Zhang further teaches wherein obtaining the initial mask pattern comprises using the target pattern to generate a mask pattern as the initial mask pattern that causes a simulated pattern on a substrate to closely match the target pattern (Zhang paragraphs [0081]-[0082], wherein a simulated pattern is generated and used to optimize the mask patterns to reduce the differences between the simulated patterns and the target patterns). Regarding Claim 15, Zhang further teaches wherein the performance metric comprises an edge placement error between a simulated pattern and the target pattern (Zhang paragraph [0082], wherein the cost function includes edge placement error EPE). Regarding Claim 16, Zhang further teaches determining, using the mask pattern, a process condition associated with the patterning process (Zhang paragraphs [0081]-[0082], wherein simulation is performed using process models on the mask patterns to determine process conditions); and exposing a substrate, via a lithographic apparatus configured according to the process condition and employing a mask comprising the mask pattern (Zhang paragraphs [0077] and [0119]-[0120], wherein the mask patterns are used in a lithographic apparatus for manufacturing). Regarding Claim 17, Zhang further teaches wherein features of the initial mask pattern are Manhattanized features of the target pattern (Zhang Fig. 3 and paragraphs [0065] and [0080], wherein target patterns may be initially rectangular, i.e. have Manhattanized features), and the one or more features of the modified mask pattern are curvilinear in shape while the remaining features are unchanged Manhattanized features of the initial mask pattern (Zhang paragraph [0071], wherein not all feature are modified). Regarding Claim 18, Zhang further teaches wherein features of the initial mask pattern are curvilinear in shape, and the one or more features of the modified mask pattern have a different curvilinear shape (Zhang paragraphs [0061] and [0077], wherein initial images may be curvilinear and the curvilinear patterns evolve, i.e. change shape, with each iteration) while remaining features are unchanged curvilinear features of the initial mask pattern (Zhang paragraph [0071], wherein not all feature are modified). Regarding Claim 19, Zhang teaches a non-transitory computer-readable medium (Zhang paragraph [0100], see computer readable medium) comprising instructions stored therein that, when executed by one or more processors, are configured to cause the one or more processors to at least: determine, by simulation, an initial mask pattern associated with a circuit pattern, the initial mask pattern comprising a first mask feature and a second mask feature corresponding to a first circuit feature and a second circuit feature, respectively, the first mask feature and the second mask feature having polygon shape outlines different from their corresponding circuit features (Zhang Fig. 3 and paragraphs [0081]-[0082], wherein a mask pattern having circuit features, e.g. Fig. 3 having target features 301 and 302, is simulated to generate a simulated pattern, the simulated patterns being predicted patterns after manufacturing which have shapes that are different from the target features); determine whether the first mask feature and the second mask feature satisfy a mask manufacturing constraint, the mask manufacturing constraint comprising a criterion that limits a shape of a mask feature during the mask manufacturing process (Zhang paragraphs [0017] and [0081]-[0084], wherein mask rule checks are performed which determine if the simulated shapes satisfy manufacturing constraints including limitations on dimensions and distances of the patterns); responsive to the mask manufacturing constraint not being satisfied, modify, based on a smallest distance between outlines of the first mask feature and the second mask feature, the initial mask pattern by applying a curvature to a portion of the first mask feature and/or the second mask feature causing an increase in the distance between the outlines of the first mask feature and the second mask feature (Zhang paragraphs [0053] and [0081]-[0084], wherein based on a cost function which includes mask manufacturing constraints, e.g. CD, a mask pattern is generated from through iterations of modifications to have curvilinear features). Regarding Claim 20, Zhang further teaches wherein the instructions are further configured to cause the one or more processors to: using the modified mask pattern, determine a simulated pattern of the patterning process (Zhang paragraph [0081], wherein in each iteration simulations are performed to predict the manufactured mask pattern); determine, by comparing the simulated pattern with the circuit pattern, a performance metric of the patterning process, the performance metric indicative of how closely the simulated pattern matches the circuit pattern (Zhang paragraph [0086]-[0087], wherein a cost function is determined, the cost function indicating how close the simulated patterns are to the target patterns); and responsive to the performance metric not being within a performance threshold (Zhang paragraphs [0086]-[0087], wherein it is determined if the cost function is reduced or minimized), apply a further curvature to the first mask feature and/or the second mask feature causing the performance metric to be within the within the performance threshold, while maintaining the smallest distance between outlines of the first mask feature and the second mask feature within the mask manufacturing constraint (Zhang paragraphs [0053] and [0086]-[0088], wherein the mask patterns are modified, including changing the shape of the curvilinear features, until the cost function is reduced or minimized while satisfying all design rules). Regarding Claim 21, Zhang further teaches wherein the instructions are further configured to cause the one or more processors to: receive the circuit pattern, the circuit pattern comprising a plurality of circuit features to be printed on a substrate, each circuit feature having a polygon shape outline (Zhang paragraphs [0062]-[0066], wherein target patterns are obtained in the form of an initial image and that include a plurality of features having polygon shapes); and identify, from the plurality of circuit features, the first circuit feature and the second circuit feature that have a distance between their respective shape outlines below a distance threshold value (Zhang paragraphs [0053] and [0081]-[0084], wherein a cost function is evaluated for the features of the target patterns, which identifies the features having violations related to CD). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC D LEE whose telephone number is (571)270-7098. The examiner can normally be reached Monday-Thursday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 571-272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC D LEE/Primary Examiner, Art Unit 2851
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Prosecution Timeline

Apr 13, 2023
Application Filed
Jan 15, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+19.3%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 644 resolved cases by this examiner. Grant probability derived from career allow rate.

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