Prosecution Insights
Last updated: April 19, 2026
Application No. 18/038,066

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

Non-Final OA §102§103
Filed
May 22, 2023
Examiner
GARCES, NELSON Y
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Manufacturing International (Beijing) Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
83%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
459 granted / 572 resolved
+12.2% vs TC avg
Minimal +3% lift
Without
With
+2.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
41 currently pending
Career history
613
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
48.7%
+8.7% vs TC avg
§102
32.8%
-7.2% vs TC avg
§112
14.2%
-25.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 572 resolved cases

Office Action

§102 §103
DETAILED ACTION This action is responsive to the application No. 18/038,066 filed on May 22, 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of the Group I invention including claims 1-3, 5, 7, and 11-14 in the reply filed on 11/12/2025 is acknowledged. Claims 15, 19-22, 24-28, and 30 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Accordingly, pending in this Office action are claims 1-3, 5, 7, 11-15, 19-22, 24-28, and 30. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. 5 25 Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 5, 13, and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lilak (US 2020/0098756). Regarding Claim 1, Lilak (see, e.g., Figs. 3A-3B, 11, 12), teaches a semiconductor structure, comprising: a substrate 110 (see, e.g., par. 0035); a dielectric layer 152 on the substrate 110, the dielectric layer 152 including a first region 106 and a second region 108 under the first region 106, the first region 106 including a plurality of discrete first nanowires 132a, and the second region 108 including a plurality of discrete second nanowires 132b (see, e.g., pars. 0039-0040); a first source/drain layer 120a in a first opening in the first region 106 (see, e.g., pars. 0036, 0054); a second source/drain layer 120b in a second opening in the second region 108 (see, e.g., pars. 0036, 0054); and an isolation layer 150 between the first source/drain layer 120a and the second source/drain layer 120b (see, e.g., par. 0037). Regarding Claim 2, Lilak teaches all aspects of claim 1. Lilak (see, e.g., Figs. 3A-3B, 11, 12), teaches that a first nanowire 132a and a second nanowire 132b extend along a first direction Y (see, e.g., Fig. 11). Regarding Claim 3, Lilak teaches all aspects of claim 2. Lilak (see, e.g., Figs. 3A-3B, 11, 12), teaches that: along the first direction Y, the first opening (i.e., opening for accommodating first source/drain layer 120a) is between adjacent first nanowires 132a (see, e.g., Figs. 3A-3B, 11); and/or along the first direction Y, the second opening (i.e., opening for accommodating second source/drain layer 120b) is between adjacent second nanowires 132b (see, e.g., Figs. 3A-3B, 11). Regarding Claim 5, Lilak teaches all aspects of claim 1. Lilak (see, e.g., Figs. 3A-3B, 11), teaches that: the first source/drain layer 120a include first ions, the second source/drain layer 120b includes second ions, and a conductivity type of the first ions is opposite to a conductivity type of the second ions (see, e.g., pars. 0054, 0082); and/or the plurality of first nanowires includes third ions, the plurality of second nanowires includes fourth ions, a conductivity type of the third ions is opposite to a conductivity type of the fourth ions, the conductivity type of the third ions is opposite to the conductivity type of the first ions, and the conductivity type of the fourth ions is opposite to the conductivity type of the second ions. Regarding Claim 13, Lilak teaches all aspects of claim 2. Lilak (see, e.g., Figs. 3A-3B, 11, 12), teaches that: the substrate 110 further includes two source/drain regions 120a/120b arranged along the first direction Y, and a gate region (i.e., region for gate structure 140) between the two source/drain regions 120a/120b; and the first nanowire 132a and the second nanowire 132b are in the gate region. Regarding Claim 14, Lilak teaches all aspects of claim 13. Lilak (see, e.g., Figs. 3A-3B, 11, 12), teaches: a gate structure 140 on the gate region, wherein the gate structure 140 surrounds the first nanowire 120a and the second nanowire 120b; the gate structure 140 extends along a second direction X; and the second direction X is perpendicular to the first direction Y (see, e.g., Figs. 11, 12). The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 and 7 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hirose (US 2022/0115389). Regarding Claim 1, Hirose (see, e.g., Figs. 10-12), teaches a semiconductor structure, comprising: a substrate 301 (see, e.g., par. 0035); a dielectric layer 322 on the substrate 301, the dielectric layer 322 including a first region (i.e., region of local interconnect 388) and a second region (i.e., region of local interconnect 386) under the first region, the first region including a plurality of discrete first nanowires 358, and the second region including a plurality of discrete second nanowires 358 (see, e.g., pars. 0038); a first source/drain layer 341n in a first opening in the first region (see, e.g., par. 0038); a second source/drain layer 331p in a second opening in the second region (see, e.g., par. 0038); and an isolation layer 332 between the first source/drain layer 341n and the second source/drain layer 331p (see, e.g., par. 0038). Regarding Claim 7, Hirose teaches all aspects of claim 1. Hirose (see, e.g., Figs. 10-12), teaches that: a material of the first source/drain layer 341n includes silicon phosphide, silicon, silicon carbide or silicon oxygen carbide; and a material of the second source/drain layer 331p includes silicon germanium or germanium (see, e.g., par. 0038); or a material of the first source/drain layer includes silicon germanium or germanium; and a material of the second source/drain layer includes silicon phosphide, silicon, silicon carbide or silicon oxygen carbide; and/or a material of the dielectric layer 321 includes silicon oxide, silicon nitride, silicon carbon nitride, silicon boron nitride, silicon oxygen carbon nitride or silicon oxygen nitride (see, e.g., par. 0035); and/or a material of the isolation layer 332 includes silicon oxide, silicon nitride, silicon carbon nitride, silicon boron nitride, silicon oxygen carbon nitride or silicon oxygen nitride (see, e.g., par. 0038). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Lilak (US 2020/0098756). Regarding Claim 11, Lilak teaches all aspects of claim 1. Lilak is silent with respect to the claim limitation that a thickness range of the isolation layer 150 is from 10 angstroms to 100 angstroms. However, this claim limitation is merely considered a change in the thickness of the isolation layer in Lilak’s device. The specific claimed thickness, absent any criticality, is only considered to be an obvious modification of the thickness of the isolation layer in Lilak’s device, as the courts have held that changes in thickness without any criticality, are within the level of skill in the art. According to the courts, a particular thickness is nothing more than one among numerous thicknesses that a person having ordinary skill in the art will find obvious to provide using routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see next paragraph below) of the claimed thickness, it would have been obvious to one of ordinary skill in the art at the time of filing to have the claimed thickness in Lilak’s device. CRITICALITY The specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen thickness or upon another variable recited in a claim, the applicant must show that the chosen thickness is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Regarding Claim 12, Lilak teaches all aspects of claim 1. Lilak does not show that: along a direction perpendicular to a sidewall of the first opening, the first opening has a first width; along a direction perpendicular to a sidewall of the second opening, the second opening has a second width; and the second width is less than the first width. However, this claim limitation is merely considered a change in the width of the first and/or second openings in Lilak’s device. See also the comments stated above in claim 11 regarding criticality which are considered repeated here. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Garcés whose telephone number is (571)272-8249. The examiner can normally be reached on M-F 9:00 AM - 5:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nelson Garces/Primary Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

May 22, 2023
Application Filed
Dec 03, 2025
Non-Final Rejection — §102, §103
Apr 03, 2026
Response after Non-Final Action
Apr 03, 2026
Response Filed

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
83%
With Interview (+2.7%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 572 resolved cases by this examiner. Grant probability derived from career allow rate.

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