Prosecution Insights
Last updated: July 17, 2026
Application No. 18/039,642

QUANTUM DEVICE AND ITS MANUFACTURING METHOD

Non-Final OA §103§112
Filed
May 31, 2023
Priority
Dec 04, 2020 — nonprovisional of PCTJP2020045247
Examiner
SATHIRAJU, SRINIVAS
Art Unit
Tech Center
Assignee
NEC Corporation
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
728 granted / 820 resolved
+28.8% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
35 currently pending
Career history
848
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
62.6%
+22.6% vs TC avg
§102
9.9%
-30.1% vs TC avg
§112
10.0%
-30.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 820 resolved cases

Office Action

§103 §112
Notice of Non-Final Rejection Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Referring to claim 1 recites the limitation " the conductor layer” in lines 12 and 14. There is insufficient antecedent basis for this limitation in the claim. Examiner is not sure whether applicant is referring to at least one conductor layer previously mentioned in line 6 or not. Hence, examiner has failed to estimate the scope of the limitation as the scope of the limitation is not clear. Hence, claim 1 is rejected under indefiniteness. However, examiner suggest to amend the limitation “the conductor layer” appropriately in such a way there should be proper antecedent basis for this limitation (this limitation appears in depending claims too). Since, claim 1 is rejected under indefiniteness and depending claims 2-8 are also rejected under indefiniteness. Claim 1 further recites the limitation " the first conductor " in line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 1 further recites the limitation " the second conductor " in line 10. There is insufficient antecedent basis for this limitation in the claim. Claim 2 recites the limitation " the connection conductor " in line 5. There is insufficient antecedent basis for this limitation in the claim. Referring to claim 9 recites the limitation " the first conductor ” in line 13. There is insufficient antecedent basis for this limitation in the claim. Examiner is not sure whether applicant is referring to a plurality of first conductors previously mentioned in line 10 or not. Hence, examiner has failed to estimate the scope of the limitation as the scope of the limitation is not clear. Hence, claim 9 is rejected under indefiniteness. However, examiner suggest to amend the limitation “the conductor layer” appropriately in such a way there should be proper antecedent basis for this limitation (this limitation appears in depending claims too). Since, claim 9 is rejected under indefiniteness and depending claims 10 -16 are also rejected under indefiniteness. Claim 9 further recites the limitation " the second conductors " in line 15. There is insufficient antecedent basis for this limitation in the claim. Claim 9 recites the limitation " the conductor layer" in line 5. There is insufficient antecedent basis for this limitation in the claim. However, in order to expedite and avoid piecemeal prosecution the following rejection has been made to the extent that the claims are understood by considering those elements which are understood and interpreting their function in manner which is consistent with recited goals of the claims and then applying the best available art. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-16 are rejected under 35 U.S.C. 103 as being unpatentable over WO2019032115 A1 by Caudillo Roman et al (Roman). Referring to claim 1, Roman Fig 4, 5A-H and 6A,B teaches: A quantum device (See Fig 5A-H item 502/516 paragraph [0072] and [0100]) comprising: PNG media_image1.png 430 478 media_image1.png Greyscale a plurality of first conductors (Fig 5H item 544-1/524-1) formed of a superconducting material in a layered state(See Fig 5H paragraph [0073] [0074] [0100]); a plurality of second conductors (item 524-2) formed of a superconducting material, at least a part of the second conductors being deposited on the first conductors (See Fig 5H paragraph [0073] [0074] [0100]); and at least one conductor layer formed of a superconducting material, wherein an oxide film (item 528) is formed between the first conductors (544-1) and the second conductors (542-2), and a Josephson junction (item 550 paragraph [0100]) is formed by a part of one of the plurality of first conductors (items 544-1, 542-1), a part of one of the plurality of second conductors (544-2, 542-2), and the oxide film (item 528), But Roman is silent or do not explicitly discloses on at least one first projecting part is formed in the first conductors, the at least one first projecting part being not covered by the second conductors, the first projecting part and the conductor layer are connected to each other directly or through a conductor, and the second conductors and the conductor layer are connected to each other directly or through a conductor. PNG media_image2.png 440 558 media_image2.png Greyscale However Fig 6A,B suggests these features in paragraphs [0100] –[0108] in several embodiments. Also these are very obvious variants in the Josephson junction quantum device circuitry. Hence, it would have been obvious to a person with ordinary skill in the art before the filing date of the instant application combining various conducting layers as per the requirements of Josephson Junction concepts varying various layer between conducting to superconducting is within the scope of the art. Referring to claim 2 Modified reference of Roman teaches the quantum device according to claim 1, further comprising at least one connection conductor formed of a superconducting material, wherein the first projecting part and the conductor layer are connected to each other by the connection conductor. (See the paragraphs [0100] –[0108]). Referring to claim 3 Modified reference of Roman teaches the quantum device according to claim 2, wherein at least the first projecting part and the conductor layer are connected to each other by the connection conductor on a first side, the first side being a side on which the one first conductor constituting the Josephson junction is formed so as to extend, with respect to the Josephson junction, toward the conductor layer (See Fig 5H and 6B and paragraphs [0100] –[0108]), and at least the second conductors and the conductor layer are connected to each other by the connection conductor on a second side, the second side being a side on which the one second conductor constituting the Josephson junction is formed so as to extend, with respect to the Josephson junction, toward the conductor layer. (See Fig 5H and 6B and paragraphs [0100] –[0108]), Referring to claim 4 Modified reference of Roman teaches the quantum device according to claim 3, wherein on the first side, at least one first projecting part is formed in the one first conductor constituting the Josephson junction, and the first projecting part is connected to the conductor layer by the connection conductor, and on the second side, at least one second projecting part projecting beyond the first conductor is formed in the one second conductor constituting the Josephson junction, and the second projecting part is connected to the conductor layer by the connection conductor. (See Fig 5H and 6B and paragraphs [0100] –[0108]). Referring to claim 5 Modified reference of Roman teaches the quantum device according to claim 4, but silent on wherein a plurality of first projecting parts are formed on the first side, and the plurality of first projecting parts are connected to the conductor layer by the connection conductor, and a plurality of second projecting parts are formed on the second side, and the plurality of second projecting parts are connected to the conductor layer by the connection conductor. However, Fig 5H and 6B suggests to an ordinary skill in the art to try these obvious variant structures for making multiple Josephson Junctions and their connecting leads as required. Referring to claim 6 Modified reference of Roman teaches the quantum device according to claim 4, but Roman silent on wherein on the first side, at least one of the second conductors that does not constitute the Josephson junction is not connected to the conductor layer through the connection conductor, and on the second side, at least one of the first conductors that does not constitute the Josephson junction is not connected to the conductor layer through the connection conductor. However it would have been obvious to try these connecting conductor leads for superconducting electronics design purpose (See Fig 5A-H and 6A, B of Ronan). Referring to claim 7 Modified reference of Roman teaches the quantum device according to claim 2, but silent on wherein the second conductors and the conductor layer are connected to each other by the connection conductor in the vicinity of the first projecting part formed in the first conductors. However it would have been obvious to try these connecting conductor leads for superconducting electronics design purpose (See Fig 5A-H and 6A, B of Ronan). Referring to claim 8 Modified reference of Roman teaches the quantum device according to claim 7, but silent on wherein in the vicinity of the plurality of first projecting parts, a plurality of second projecting parts projecting on the same side as the first projecting parts are formed in the second conductors, and the first projecting parts and the second projecting parts are connected to the conductor layer by the connection conductor. However it would have been obvious to try these connecting conductor leads for superconducting electronics design purpose (See Fig 5A-H and 6A, B of Ronan). Referring to claim 9, Roman Fig 4, 5A-H, 6A,B teaches: A method for manufacturing a quantum device (See Fig 4, 5A-H), comprising: forming a resist mask (Fig 2A-C item 200 mask) on a substrate (See 202 substrate paragraph [0054]), the substrate including at least one conductor layer formed of a superconducting material formed therein, the resist mask being a mask for forming a Josephson junction by a first conductor formed of a superconducting material and including a first projecting part, and a second conductor formed of a superconducting material; depositing a plurality of first conductors on the substrate, on which the resist mask has been formed, by angled evaporation performed in a first direction; oxidizing a surface of the first conductors and thereby forming an oxide film thereon; depositing at least a part of the second conductors on each of the plurality of first conductors by angled evaporation performed in a second direction, and thereby forming a Josephson junction by a part of one of the first conductors, a part of one of the second conductors, and the oxide film; connecting the first projecting part not covered by the second conductors and the conductor layer to each other directly or through a conductor; and connecting the second conductors and the conductor layer to each other directly or through a conductor. (See Fig 2A-C, 4, 5A-H and 6A, B paragraphs [0068] –[0108] in various embodiments Roman teaches all these features). Referring to claim 10 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 9, wherein the first projecting part and the conductor layer are connected to each other by depositing a connection conductor formed of a superconducting material on the first projecting part and the conductor layer. (See Fig 5H and paragraphs [0072]-[0108] suggests most of the features). Referring to claim 11 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 10, wherein at least the first projecting part and the conductor layer are connected to each other by the connection conductor on a first side, the first side being a side on which the one first conductor constituting the Josephson junction is formed so as to extend, with respect to the Josephson junction, toward the conductor layer, and at least the second conductors and the conductor layer are connected to each other by the connection conductor on a second side, the second side being a side on which the one second conductor constituting the Josephson junction is formed so as to extend, with respect to the Josephson junction, toward the conductor layer. (See Fig 5A-H, Fig 6B, the paragraphs [0072] –[0108]). Referring to claim 12 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 11, wherein when the first conductors are deposited on the conductor layer, at least one first projecting part is formed on the first side, and when the second conductors are deposited on the first conductors, the Josephson junction is formed by performing angled evaporation of the second conductors in such a manner that a part of the first conductors and a part of the second conductors overlap each other, on the second side, at least one second projecting part projecting beyond the first conductors is formed in the second conductors, and the first projecting part and the conductor layer are connected to each other by the connection conductor, and the second projecting part and the conductor layer are connected to each other by the connection conductor. (See 4 Fig 5A-H and 6B and paragraphs [0100] –[0108]), Referring to claim 13 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 12, wherein when the first conductors are deposited, a plurality of first projecting parts are formed on the first side, when the second conductors are deposited, a plurality of second projecting parts are formed on the second side, the plurality of first projecting parts are connected to the conductor layer by the connection conductor, and the plurality of second projecting parts are connected to the conductor layer by the connection conductor. (See Fig 4 Fig 5A-H and 6B and paragraphs [0100] –[0108]), Referring to claim 14 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 12, wherein on the first side, the first projecting parts and the conductor layer are connected to each other by the connection conductor in such a manner that at least one of the second conductors that does not constitute the Josephson junction is not connected to the conductor layer through the connection conductor, and on the second side, the second projecting parts and the conductor layer are connected to each other by the connection conductor in such a manner that at least one of the first conductors that does not constitute the Josephson junction is not connected to the conductor layer directly or through a conductor. (See Fig 4 Fig 5A-H and 6B and paragraphs [0100] –[0108]), Referring to claim 15 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 10, but silent on wherein the second conductors and the conductor layer are connected to each other by the connection conductor in the vicinity of the first projecting parts formed in the first conductors. However it would have been obvious to try these connecting conductor leads for superconducting electronics design purpose (See Fig 5A-H and 6A, B of Ronan). Referring to claim 16 Modified reference of Roman teaches the method for manufacturing a quantum device according to claim 15, but silent on wherein when the second conductors are deposited, a plurality of second projecting parts projecting on the same side as the first projecting parts are formed, in the vicinity of the plurality of first projecting parts, in the second conductors, and the first projecting parts and the second projecting parts are connected to the conductor layer by the connection conductor. However, Fig 5H and 6B suggests to an ordinary skill in the art to try these obvious variant structures for making multiple Josephson Junctions and their connecting leads as required. Conclusion Claims 1-16 are rejected. he prior of art made of record and not relied upon is considered to pertinent to applicant’s disclosure. Applicants are directed to consider additional pertinent prior art included on the notice of references cited PTOL 892 attached here with. The examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicants. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim other passages and figures may apply. Applicant, in preparing the response should consider fully the entire reference as potentially teaching all or part of the claimed invention as well as the context of the passage as taught by the prior art or disclosed by the examiner. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SRINIVAS SATHIRAJU whose telephone number is (571)272-4250. The examiner can normally be reached 8:30AM-3:30PM, 5PM -8:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALEXANDER H TANINGCO can be reached at 5712728048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SRINIVAS SATHIRAJU/ 06/06/2026 SRINIVAS . SATHIRAJU Primary Examiner Art Unit 2845
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Prosecution Timeline

May 31, 2023
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
95%
With Interview (+6.1%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 820 resolved cases by this examiner. Grant probability derived from career allowance rate.

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