DETAILED ACTION
Response to Arguments
Applicant's arguments filed 12/23/2025 have been fully considered but they are not persuasive.
Applicant’s argument that the effective filing date of the present application is 12/07/2020, which is before the effectively filed dates of Yamazaki et al. (US 2024/0306423 A1) and Eguchi et al. (US 2024/0155869 A1) (Remarks, pages 2-3) is not found persuasive. Applicant is remined that the foreign priority date of the present Application (i.e., 12/07/2020) can be the effective filing date of the claimed invention if: the foreign application supports the claimed invention under 112(a), AND the Applicant has perfected the right of priority by providing: a certified copy of the priority application, and a translation of the priority application (if not in English). It is noted that the certified copy of the priority application is not in English (See “Certified Copy of Foreign Priority Application” dated 06/01/2023).
In response to Applicant’s statement (Remarks, pages 3-4, “both Yamazaki and Eguchi and the claimed invention were, at the time of the effective filing date of the claimed invention, owned by the same person or subject to an obligation of assignment to the same person (i.e. Semiconductor Energy Laboratory Co., Ltd.)”) to disqualify Yamazaki et al. (US 2024/0306423 A1) and Eguchi et al. (US 2024/0155869 A1), Assignment records by themselves, without a statement required by 37 CFR 1.104(c)(4)(i), are not sufficient evidence to disqualify prior art under 35 U.S.C. 102(b)(2)(C). See MPEP 717.02 and 2154.02. In order for applicant to properly invoke common ownership to disqualify a U.S. patent document as prior art under 35 U.S.C. 102(a)(2), applicant must submit the required statement that the subject matter in the U.S. patent document and the claimed invention were, not later than the effective filing date of the claimed invention, owned by, or subject to an obligation of assignment, to the same person. See 37 CFR 1.104(c)(4)(i). The statement concerning common ownership should be clear and conspicuous (e.g., on a separate piece of paper or in a separately labeled section). The statement must be signed in accordance with 37 CFR 1.33(b).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yamazaki et al. (US 2024/0306423 A1; hereinafter “Yamazaki”).
Regarding claim 1, Yamazaki teaches a method for fabricating a display apparatus, comprising: a step of forming an anode (171) over an insulating layer (114); a step of forming an EL layer (172R) over the anode; a step of forming a cathode (173R) over the EL layer (Fig. 8B and paragraphs 225-232); a step of selectively removing parts of the anode, the EL layer, and the cathode to expose a top surface of the insulating layer (a top surface of 114) and to form a plurality of light-emitting elements (170R, 170G, and 170B) (Figs. 9A and 12C and paragraphs 238 and 248-250); and a step of forming a conductive layer (118) covering the plurality of light-emitting elements, wherein the cathode of each of the plurality of light-emitting elements is electrically connected to the conductive layer, and wherein the conductive layer has a light-transmitting property (Fig. 13C and paragraphs 260-262).
Regarding claim 2, Yamazaki teaches a method for fabricating a display apparatus, comprising: a step of forming an anode (171) over an insulating layer (114); a step of forming an EL layer (172R) over the anode; a step of forming a cathode (173R) over the EL layer (Fig. 8B and paragraphs 225-232); a step of selectively removing parts of the anode, the EL layer, and the cathode to expose a top surface of the insulating layer (a top surface of 114) and to form a plurality of light-emitting elements (170R, 170G, and 170B) (Figs. 9A and 12C and paragraphs 238 and 248-250); and a step of forming a conductive layer (118) over the plurality of light-emitting elements, wherein the parts of the anode, the EL layer, and the cathode are collectively removed using a resist mask (179R) (Fig. 9A and paragraph 237), and wherein at least in two of the plurality of light-emitting elements, the cathodes of the light-emitting elements adjacent to each other are electrically connected to the conductive layer (Fig. 13C and paragraphs 260-262).
Regarding claims 3 and 9, Yamazaki teaches further comprising: a step of forming a plurality of transistors (251) over a substrate (111); and a step of forming the insulating layer over the plurality of transistors, wherein the insulating layer comprises a surface of the insulating layer serving as a formation surface with reduced unevenness (Figs. 7A-7D and paragraphs 217-226).
Regarding claims 4 and 10, Yamazaki teaches wherein the transistor comprises an oxide semiconductor (paragraphs 138-144).
Regarding claims 5 and 11, Yamazaki teaches wherein the oxide semiconductor comprises at least one of indium and zinc (paragraphs 138-144, an oxide semiconductor preferably contains at least indium or zinc).
Regarding claims 6 and 12, Yamazaki teaches wherein an interval between two of the light-emitting elements adjacent to each other is less than or equal to 10 μm (paragraph 254, 10 μm).
Regarding claims 7 and 13, Yamazaki teaches wherein each of the plurality of the light-emitting elements is of a top-emission type (Fig. 6 and paragraphs 93 and 106).
Regarding claims 8 and 14, Yamazaki teaches wherein the parts of the EL layer are etched by a dry etching method in the step of selectively removing the parts of the EL layer (paragraphs 215 and 237).
Regarding claims 15 and 16, Yamazaki teaches wherein side surfaces of the anode, the EL layer, and the cathode in each of the plurality of light-emitting elements are aligned or substantially aligned with each other (Fig. 12C).
Claims 1-5, 7-11, and 13-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Eguchi et al. (US 2024/0155869 A1; hereinafter “Eguchi”).
Regarding claim 1, Eguchi teaches a method for fabricating a display apparatus, comprising: a step of forming an anode (171) over an insulating layer (139); a step of forming an EL layer (172) over the anode; a step of forming a cathode (173) over the EL layer (Figs. 12A-13A and paragraphs 245-253); a step of selectively removing parts of the anode, the EL layer, and the cathode to expose a top surface of the insulating layer (a top surface of 139) and to form a plurality of light-emitting elements (170R, 170G, and 170B) (Fig. 14A and 19A-20A and paragraphs 266 and 291-296); and a step of forming a conductive layer (118) covering the plurality of light-emitting elements, wherein the cathode of each of the plurality of light-emitting elements is electrically connected to the conductive layer, and wherein the conductive layer has a light-transmitting property (Fig. 22A and paragraphs 304-307).
Regarding claim 2, Eguchi teaches a method for fabricating a display apparatus, comprising: a step of forming an anode (171) over an insulating layer (139); a step of forming an EL layer (172) over the anode; a step of forming a cathode (173) over the EL layer (Figs. 12A-13A and paragraphs 245-253); a step of selectively removing parts of the anode, the EL layer, and the cathode to expose a top surface of the insulating layer (a top surface of 139) and to form a plurality of light-emitting elements (170R, 170G, and 170B) (Fig. 14A and 19A-20A and paragraphs 266 and 291-296); and a step of forming a conductive layer (118) over the plurality of light-emitting elements, wherein the parts of the anode, the EL layer, and the cathode are collectively removed using a resist mask (261a) (Fig. 14A and paragraphs 264-265), wherein at least in some of the plurality of light-emitting elements, the cathodes of the light-emitting elements adjacent to each other are electrically connected to the conductive layer (Fig. 22A and paragraphs 304-307).
Regarding claims 3 and 9, Eguchi teaches further comprising: a step of forming a plurality of transistors (251) over a substrate (111); and a step of forming the insulating layer over the plurality of transistors, wherein the insulating layer comprises a surface of the insulating layer serving as a formation surface with reduced unevenness (Figs. 11A-11C and paragraphs 225-245).
Regarding claims 4 and 10, Eguchi teaches wherein the transistor comprises an oxide semiconductor (paragraphs 137-143).
Regarding claims 5 and 11, Eguchi teaches wherein the oxide semiconductor comprises at least one of indium and zinc (paragraphs 137-143).
Regarding claims 7 and 13, Eguchi teaches wherein each of the plurality of the light-emitting elements is of a top-emission type (Fig. 1B and paragraphs 96 and 110).
Regarding claims 8 and 14, Eguchi teaches wherein the parts of the EL layer are etched by a dry etching method in the step of selectively removing the parts of the EL layer (paragraphs 222 and 266).
Regarding claims 15 and 16, Eguchi teaches wherein side surfaces of the anode, the EL layer, and the cathode in each of the plurality of light-emitting elements are aligned or substantially aligned with each other (Fig. 20B).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANIEL WHALEN/Primary Examiner, Art Unit 2893