DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/26/2026 has been entered.
Response to Arguments
Applicant's arguments filed 06/26/2026 have been fully considered but they are not persuasive.
Regarding applicants first argument, “Park's CA is a connection area, not a conductive mesh line and not a plurality of signal lines. Park describes the corner display area CDA as including pixel arrangement areas PDA and connection areas CA. Park further describes the connection areas CA as areas used to connect the intermediate display area MDA to the pixel arrangement areas PDA. Thus, CA is a layout area or region of the display panel. Applicants respectfully submit that CA is not described as a conductive line, or a signal line, or a plurality of conductive mesh lines, as required by claim 1 as amended.” The applicant disagrees. Per paragraph [0363]: “A connection wiring may be located in the connection area CA. In one embodiment, for example, the connection wiring may be a power wiring for supplying a voltage and/or a signal line for transmitting an electrical signal to the second pixel PX2.”
Applicants second argument, “Park also distinguishes connection areas from connection wiring. Park describes that connection wiring may be located in the connection area CA. This disclosure confirms that CA is not itself the wiring. A physical area that may contain wiring is different from the claimed mesh network comprising conductive mesh lines. The Office has not identified any disclosure in Park in which CA, CA1, or CA2 is itself a conductive signal line or a plurality of conductive mesh lines.”
The examiner has amended the previous rejection to explicitly say that the wirings are located within CA1 and CA2 in the action below. The applicant has not defined what a “mesh” is in the originally filed specification and therefore the interpretation is open for the examiner. As the argument states, “Park describes that connection wiring may be located in the connection area CA” and since Park discloses the areas as having a “serpentine shape” in [0362] i.e. wiggly shape, these “areas” with connection wirings in them (which the examiner believes would also be the shape of the connection area) would be similar to the applicants “mesh network”. The rejection still holds.
Applicant third argument, “Park also does not disclose that CAI and CA2 are directly connected to one another at a plurality of connection points.”
After consulting with a supervisory patent examiner, Park shows “connection points” which would be PDA2/PX2. The pixels PX2 need some form of connection to work and the examiner and SPE believe, the wirings (which can be signal lines) disposed in the connection areas CA1/CA2 have connection points to the pixels PX2. Most of the arguments refer to the “areas” as disclosed by Park, however, these areas have a distinct shape in Figures 22 and 23. The actual openings (PNA) are between these areas and therefore even though they are broadly disclosed as “areas” these are not just mere openings with no relevance. Per [0389], “In an embodiment, the connection wiring CL may include the first connection wiring CL1 and the second connection wiring CL2. Each of the first connection wiring CL1 and the second connection wiring CL2 may be a power wiring for applying an electrical signal or a voltage to a pixel arrangement area. The first connection wiring CL1 and the second connection wiring CL2 of the connection area CA may be respectively connected to the first connection wiring CL1 and the second connection wiring CL2 located in the pixel arrangement area PDA of FIG. 25.”
Applicants’ final argument, “Park also does not disclose that CAI and CA2 are configured to transmit a same voltage signal.” The examiner disagrees. Park discloses per paragraph [0251]: “a signal or a power voltage applied by a driving circuit located in the intermediate display area MDA may be transmitted through the first connection wiring CL1, the second connection wiring CL2, and the third connection wiring CL3 to the corner display area CDA.” Which would be considered as a same voltage signal coming from the MDA area.
The examiner invites the attorney to schedule an interview to help the examiner better understand the applicant’s invention in order to make suggestions which could advance prosecution.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 2, 7-11, 13, 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1) in view of Park et al. (US 20210384465 A1).
Regrading claim 1, Won discloses a display panel (10), comprising light emitting elements (EU1-EU3) and pixel driving circuits (PC1-PC3) in a first region (DA1) and at least one of a second region (DA2) or a third region (Da3), the third region, at least partially spacing apart the first region (Da1) and the second region (Da2); ([0072], Fig.9C)
configurations of light emitting elements (EU1-EU3) in at least two of the first region (DA1), the second region (Da2), and the third region (Da3) are different from each other; ([0147], Fig. 9C) and
configurations of pixel driving circuits (PC1-PC3) in at least two of the first region (Da1), the second region (Da2), and the third region (Da3) are different from each other. (Fig. 9C)
Won does not disclose:
wherein the display panel further comprises a main signal line and mesh network connected to the main signal line, the main signal line and the mesh network configured to provide a signal to the subpixels in the second region; the mesh network is in the second region; and the main signal line is outside the second region.
However, Park discloses:
wherein the display panel further comprises a main signal line (per [0112]) and mesh network (CA which comprises of CA1 and CA2 and has signal lines within per paragraph [0363]) connected to the main signal line (per [0251]), the main signal line (per [0112]), and the mesh network (CA) configured to provide a signal to the subpixels (PX2) in the second region (CDA); ([0221], [0251] and [0362]-[0363], Fig. 22 and 23)
the mesh network (including the connection wirings disposed in areas CA per [0389]) is in the second region (CDA); (Fig. 23-25) and
the main signal line (per [0112]) is outside the second region (CDA). ([0251] and [0362]-[0363], Fig. 22 and 23)
wherein the mesh network (CA) comprises a plurality of conductive mesh lines (inside of CA1 and CA2 per [0363] and [0389]), the plurality of conductive mesh lines (inside of CA1 and CA2) being a plurality of signal lines (Per [0363]); (Fig. 22-25)
wherein the plurality of conductive mesh lines (inside of CA1 and CA2), are directly connected to one another at a plurality of connection points (PDA1/PDA2 which have pixels (PX2) disposed in them) and form an interconnected signal line network in the second region (CDA); (Fig. 22 and 23) and
wherein the main signal line (per [0112]) and the plurality of conductive mesh lines (inside of CA1 and CA2) are configured to transmit a same voltage signal. (per [0251])
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won and Park for the display panel further comprises a main signal line and mesh network connected to the main signal line, the main signal line and the mesh network configured to provide a signal to the subpixels in the second region; the mesh network is in the second region; and the main signal line is outside the second region wherein the mesh network comprises a plurality of conductive mesh lines, the plurality of conductive mesh lines being a plurality of signal lines; wherein the plurality of conductive mesh lines are directly connected to one another at a plurality of connection points and form an interconnected signal line network in the second region; and wherein the main signal line and the plurality of conductive mesh lines are configured to transmit a same voltage in order to supply “power or a signal line for applying an electrical signal to the second pixel PX2 of the corner display area CDA.” (Park, [0221])
Regarding claim 2, Won discloses the display panel of claim 1, comprises a plurality of first light emitting elements (EU1) in the first region (DA1), a plurality of second light emitting elements (EU2) in the second region (DA2), and a plurality of third light emitting elements (EU3) in the third region (DA3); (Fig. 9C)
light emitting elements (EU) in at least two of the first region (DA1), the second region (DA2), and the third region (DA3) have different sizes, arrangements, and light emitting apertures. (Fig. 9C)
Regarding claim 7, Won discloses the display panel of claim 1, wherein light emitting elements (EU) of a same color in the second region (DA2) are arranged along a plurality of first arcs (located along the pixels shown in Fig. 7A or 8A per [0122]) curving toward a same direction; (Fig. 7A and 8A) and
the display panel (10) includes a plurality of second pixels (PX2) in the second region (DA2) arranged along a plurality of second arcs (same placement as the first arcs as the pixel (PX) is above on the light emitting element (EU) per Figs. 10A-10C) curving toward a same direction. (Fig. 7A and 8A)
Regarding claim 8, Won discloses the display panel of claim 7, wherein the plurality of first arcs (located along the pixels shown in Fig. 7A or 8A per [0122]) are concentric (curved), and the plurality of second arcs (located under/same placement as the first arcs) are concentric (curved). (Fig. 7A and 8A)
Regrading claim 9, Won discloses the display panel of claim 1, wherein the second region (DA2) comprises a plurality of via holes (GP1/GP2) at least partially extending into the display panel (10). ([0112]-[0113], Fig. 6C)
Regarding claim 10, Won discloses the display panel of claim 9, wherein the plurality of via holes (GP1/GP2) are arranged along a plurality of third arcs (the pixels are located on the arc as shown in Fig. 7A while the gaps (GP1/GP2) are arranged between the pixels as shown in Fig. 6C therefore is located on a third arc in accordance to the applicants third arc shown in Fig. 7D of the present application) curved toward a same direction. (Fig. 6C, 7A, 8A)
Regarding claim 11, Won discloses the display panel of claim 10, wherein the plurality of third arcs (the pixels are located on the arc as shown in Fig. 7A while the gaps (GP1/GP2) are arranged between the pixels as shown in Fig. 6C therefore is located on a third arc in accordance to the applicants third arc shown in Fig. 7D of the present application) are concentric (curved). (Fig. 6C, 7A, 8A)
Regarding claim 13, Won discloses the display panel of claim 10, wherein light emitting elements (EU1-EU3) of a same color in the second region (DA2) are arranged along a plurality of first arcs (located along the pixels as shown in Fig. 7A and 8A per [0122]) curving toward a same direction;
a respective first arc (located along the pixels shown in Fig. 7A or 8A per [0122])of the plurality of first arcs (annotated below) is between two adjacent third arcs (located between the pixels as shown in Fig. 6C and annotated below) of the plurality of third arcs (located between the pixels annotated below); (Fig. 6C and 7A) and
a respective third arc (located between the pixels as shown in Fig. 6C) of the plurality of third arcs is between two adjacent first arcs (located along the pixels shown in Fig. 7A or 8A per [0122]) of the plurality of first arcs (annotated below).
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Regarding claim 17, Park discloses the display panel of claim 1, wherein the main signal line (per [0112]) and the mesh network (CA) are configured to provide a constant voltage signal (per [0112] and [0221]) to the subpixels (PX2) in the second region (CDA). (Fig. 23)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won and Park for similar reasons as stated above.
Regarding claim 18, Won discloses the display panel of claim 1, wherein the display panel (10) is a curved display panel (per [0060]) having a three-dimensional body; (Fig. 1)
the first region (DA1) comprises at least a main display region (FDA) of the display panel (10); ([0060], Fig. 1)
the second region (DA2) is at least partially in a corner portion (CP) of the three-dimensional body. ([0099], Fig. 1)
Regarding claim 19, Won discloses the display panel of claim 18, wherein the first region (DA1)n includes a first sub-region (FDA), a second sub-region (SDA3), and a third sub-region (SDA2); ([0060], Fig. 1 and 5B)
the first sub-region (FDA) is at least partially in a top portion of the three-dimensional body; ([0060], Fig. 1 and 5B)
the second sub-region (SDA3) is at least partially in a first edge portion of the three- dimensional body; ([0060], Fig. 1 and 5B)
the third sub-region (SDA2) is at least partially in a second edge portion of the three- dimensional body; ([0060], Fig. 1 and 5B) and
the third region (DA3) at least partially spaces apart the first region (DA1) and the second region (DA2). (Fig. 1 and 5B)
Claims 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1) as applied to claim 1 above, and further in view of Wu (US 20140218971 A1).
Regarding claim 3, Won discloses the display panel of claim 1, wherein the display panel (10) comprises a plurality of first pixels (PX1) in the first region (DA1), a plurality of second pixels (PX2) in the second region (DA2), and a plurality of third pixels (PX3) in the third region (DA3); (Fig. 8A)
Pixels (PX) in at least two of the first region (DA1), the second region (DA2), and the third region (DA3) have different sizes, arrangements, and resolutions; ([0133], Fig. 8A)
Won does not disclose:
and a first pixel size of the plurality of first pixels is greater than a second pixel size of the plurality of second pixels.
However, Wu discloses:
and a first pixel size of the plurality of first pixels (inner 116) is greater than a second pixel size of the plurality of second pixels (outer 116). ([0040], Fig. 4)
It would have been obvious to one skilled in the art before the effective foiling date to combine the teachings of Won and Wu for a first pixel size of the plurality of first pixels is greater than a second pixel size of the plurality of second pixels in order for “ the display device to have a frame-less displaying effect. (Wu, [0044])
Regarding claim 4, Won discloses the display panel of claim 3, wherein the plurality of second pixels (PX2) in the second region (DA2) are arranged along a plurality of second arcs (same placement as the first arcs as the pixel (PX) is above on the light emitting element (EU) per Figs. 10A-10C) curving toward a same direction. ([0123], Fig. 7A and 8A)
Won does not disclose:
the plurality of first pixels in the first region are arranged in an array comprising rows and columns;
However, Wu discloses:
the plurality of first pixels (inner 116) in the first region (110) are arranged in an array comprising rows and columns; ([0040], Fig. 4)
It would have been obvious to one skilled in the art before the effective foiling date to combine the teachings of Won and Wu for the plurality of first pixels in the first region are arranged in an array comprising rows and columns in order for “ the display device to have a frame-less displaying effect. (Wu, [0044])
Regarding claim 5, Won discloses the display panel of claim 4, wherein the plurality of second arcs (same placement as the first arcs as the pixel (PX) is above on the light emitting element (EU) per Figs. 10A-10C) along which the plurality of second pixels (PX2) in the second region are arranged are concentric (curved). ([0121], Fig. 7A and 8A)
Regarding claim 6, Won discloses the display panel of claim 3. Won does not explicitly disclose wherein
the plurality of first pixels has a first pixel-per-inch value;
the plurality of second pixels has a second pixel-per-inch value; and
the first pixel-per-inch value is greater than the second pixel-per-inch value.
However, Wu discloses:
the plurality of first pixels (inner 116) has a first pixel-per-inch value; ([0040], Fig. 4)
the plurality of second pixels (outer 116) has a second pixel-per-inch value; ([0040], Fig. 4) and
the first pixel-per-inch value is greater than the second pixel-per-inch value. (Fig. 4)
It would have been obvious to one skilled in the art before the effective foiling date to combine the teachings of Won and Wu for the plurality of first pixels has a first pixel-per-inch value; the plurality of second pixels has a second pixel-per-inch value; and the first pixel-per-inch value is greater than the second pixel-per-inch value in order for “ the display device to have a frame-less displaying effect. (Wu, [0044])
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1) as applied to claim 1 above, and further in view of Kim et al. (US 20220085327 A1).
Regarding claim 12, Won discloses the display panel of claim 11. Won does not disclose wherein
an individual via hole of the plurality of via holes has a cross shape comprising a first line and a second line intersecting each other; and
first lines of cross shapes of the plurality of via holes are oriented toward a same center.
However, Kim discloses:
an individual via hole (GV2) of the plurality of via holes (GV2) has a (partial) cross shape comprising a first line (annotated below) and a second line (annotated below) (partially) intersecting each other; (Fig. 11) and
first lines (annotated below) of (the partial) cross shapes of the plurality of via holes (GV1/GV2) are oriented toward a same center (toward FDA). (Fig. 11)
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It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won and Kim for an individual via hole of the plurality of via holes has a cross shape comprising a first line and a second line intersecting each other; and first lines of cross shapes of the plurality of via holes are oriented toward a same center in order to “precisely control the flow of organic material forming the at least one organic encapsulation layer.” (Kim, [0142])
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1) in view of Kuo et al. (US 20200279895 A1).
Regrading claim 14, Won discloses the display panel of claim 1, wherein the display panel comprises a respective second light emitting element (EU2) in the second region (DA2), and a respective second pixel driving circuit (DR) configured to drive light emission in the respective second light emitting element (EU2); ([0085], Fig. 9A)
Won does not disclose:
wherein the respective second pixel driving circuit is in the first region or in the third region.
However, Kuo discloses:
wherein the respective second pixel driving circuit (T1(t)) is in the first region (DR2(DR). (Fig. 2)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won and Kuo for the respective second pixel driving circuit is in the first region since “one of ordinary skill in the art can change the disposition positions of the first active elements T1 according to design requirements” (Kuo, [0068]) in order to “realize a high screen-to-body ratio design.” (Kuo, [0064])
Claim 15 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1), hereinafter Won006, as applied to claim 1 above, and further in view of Won et al. (US 20210376038 A1), hereinafter Won038.
Regarding claim 15, Won006 discloses the display panel of claim 1. Won006 does not disclose comprising
a scan circuit having a plurality of stages, and configured to provide control signals to different rows of subpixels;
a respective scan unit of the scan circuit is at least partially in the third region, and is configured to provide scan signals to subpixels in the second region and subpixels in the first region;
the display panel comprises a respective first output line and a respective second output line connected to the respective scan unit;
the respective first output line is configured to transmit control signals from the respective scan unit to a row of subpixels in the first region; and
the respective second output line is configured to transmit control signals from the respective scan unit to a row of subpixels in the third region.
However, Won038 discloses:
a scan circuit (GDC) having a plurality of stages (per [0093]), and configured to provide control signals to different rows of subpixels (labeled PX in previous Figs.); ([0093], Fig. 9A)
a respective scan unit (GDC1-GDC3) of the scan circuit (GDC) is at least partially in the third region (CDA2), and is configured to provide scan signals to subpixels (labeled PX in previous Figs.) in the second region (CDA1) and subpixels (labeled PX in previous Figs.) in the first region (MDA); ([0093], Fig. 9A)
the display panel (10) comprises a respective first output line (WL1) and a respective second output line (WL2) connected to the respective scan unit (GDC1-GDC3); ([0149]-[0150], Fig. 9A)
the respective first output line (WL1) is configured to transmit control signals from the respective scan unit (GDC1-GDC3) to a row of subpixels (labeled PX in previous Figs.) in the first region (MDA); (Fig. 9A) and
the respective second output line (WL2) is configured to transmit control signals from the respective scan unit (GDC1-GDC3) to a row of subpixels (labeled PX in previous Figs.) in the third region (CDA2). (Fig. 9A)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won006 and Won038 to have a scan circuit having a plurality of stages, and configured to provide control signals to different rows of subpixels; a respective scan unit of the scan circuit is at least partially in the third region, and is configured to provide scan signals to subpixels in the second region and subpixels in the first region; the display panel comprises a respective first output line and a respective second output line connected to the respective scan unit; the respective first output line is configured to transmit control signals from the respective scan unit to a row of subpixels in the first region; and the respective second output line is configured to transmit control signals from the respective scan unit to a row of subpixels in the third region in order for “the image to be displayed seamlessly from the main display area MDA to the first corner display area CDA1.” (Won038, [0180])
Regarding claim 20, Won006 discloses a display apparatus (1), comprising the display panel (10) of claim 1, ([0071], Fig. 2)
Won006 does not explicitly disclose:
and one or more integrated circuit connected to the display panel
However, Won038 discloses:
and one or more integrated circuit (20) connected to the display panel (10). ([0088], Fig. 3)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won006 and Won038 to have one or more integrated circuit connected to the display panel because it’s standard “for driving the display panel 10” (Won038, [0088])
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Won et al. (US 20210376006 A1) as applied to claim 1 above, and further in view of Heo et al. (US 20170193914 A1)
Regarding claim 16, Won discloses the display panel of claim 1 comprising a plurality of second data lines (per [0086]) configured to provide data signals to subpixels (PX) in the second region (DA2); ([0086])
Won does not disclose
portions of the plurality of second data lines in the second region extend along a plurality of fourth arcs, respectively; and
the plurality of fourth arcs curve toward a same direction.
However, Heo discloses:
portions of the plurality of second data lines (DL2) in the second region (curved corner portions) extend along a plurality of fourth arcs (curves of the plurality of DL2), respectively; ([0068], Fig. 3) and
the plurality of fourth arcs (curves of the plurality of DL2) curve toward a same direction. (Fig. 3)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Won and Paek to have portions of the plurality of second data lines in the second region extend along a plurality of fourth arcs, respectively; and the plurality of fourth arcs curve toward a same direction so that “ the quality of a displayed image is improved by reducing a parasitic capacitance difference of each gate line or each data line and a resistance difference of a data line.” (Heo [0016]) furthermore so“ that the quality of an image of a display device having curve-shape corners can be improved.” (Heo, [0003])
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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