DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 36 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 36. Claim 36 recite “A display apparatus, comprising the display panel according to claim 34.” And claim 34 recites “A display apparatus, comprising the display panel being the display panel according to claim 30.” It is unclear how claim 36 further limits claim 34 since they both claim the display apparatus. Since the display panel has been construed as an apparatus, for purposes of examination these claims have been interpreted as written. It is suggested that claim 36 be amended to depend from another claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 7, 9, 11, 13, 16, 24 are rejected under 35 U.S.C. 103 as being unpatentable over Su, CN 111540837 A, hereafter Su, in view of Kuekes et al. US 20060238223 A1, hereafter Kuekes.
Regarding claim 1, Su discloses:
A light-emitting device (Su, Figure 1, QLED device 10), comprising:
a first electrode (Su, Figure 1, second electrode 4);
an electron transporting layer disposed on a side of the first electrode (Su, Figure 1, electron transport layer 33);
a quantum dot light-emitting layer disposed on a side of the electron transporting layer away from the first electrode (Su, Figure 1, quantum dot light emitting layer 31);
a second electrode disposed on a side of the quantum dot light-emitting layer away from the first electrode (Su, Figure 1, first electrode 2); and
a plurality of adjustment patterns (Su, Figure 1, electron quantum well layer 32, and Embodiment 1, which discloses that the material of the quantum well layer is nanowire), the plurality of adjustment patterns are disposed between the first electrode and the quantum dot light-emitting layer and are each in contact with the electron transporting layer (Su, Figure 1, quantum well layer 32 is in contact with electron transport layer 33);
the plurality of adjustment patterns are configured to achieve one of blocking block electrons transmitted from the first electrode to the quantum dot light-emitting layer, and inducing electron traps to trap the electrons transmitted from the first electrode to the quantum dot light-emitting layer (Su, Embodiment 1, discloses that the electron quantum well layer 32 promotes charge balance and attracts a portion of the electrons).
Su fails to disclose the how the nanowires are orientated and therefore fails to disclose:
wherein orthographic projections of the plurality of adjustment patterns on a reference plane are distributed at intervals, and the reference plane is parallel to a plane in which the first electrode is located;
at least a portion of an orthographic projection of the electron transporting layer on the reference plane is located in a gap between the orthographic projections of the plurality of adjustment patterns on the reference plane; and
Kuekes discloses the following limitations:
wherein orthographic projections of the plurality of adjustment patterns on a reference plane are distributed at intervals, and the reference plane is parallel to a plane in which the first electrode is located (Kuekes, Figure 1, and [0006] discloses nanowires arranged at intervals in a planer manner on substrates);
It would have been obvious to one of ordinary skill in the art at the time of the effective filling dates of the invention to have applied the teachings of Kuekes to the device of Su because Su discloses the use of nanowires to but fails to disclose the orientation of the nanowires and Kuekes discloses a known orientation for nanowires that can be fabricated using known techniques, and controlling the pattern of the nanowires would allow the amount of electron blocking to be controlled, which would allow the device operation to be optimized. In applying the orientation of Kuekes to the device of Su the subsequently deposited layer would fil the voids in the preceding layer, so in a layer of nanowires the voids between the wires would be filled with material of the next layer, which in the device of Su means that the electron transporting layer would fill the voids between the nanowires. Therefore the limitation of “at least a portion of an orthographic projection of the electron transporting layer on the reference plane is located in a gap between the orthographic projections of the plurality of adjustment patterns on the reference plane” would necessarily be met by the combination of Su and Kuekes.
Regarding claim 2, Su discloses:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns include an insulating transparent oxide material (Su discloses metal oxides such as NiO (nickel oxide), Cu-doped NiO (copper doped nickel oxide), ITO (indium tin oxide), IZO (indium zinc oxide), MoO3 (molybdenum trioxide), WO3 (tungsten trioxide), V2O5 (vanadium pentoxide) and RbO2 (rubidium peroxide) for the quantum well layer).
Regarding claim 3, Su discloses:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns include a hole-transporting-type transparent oxide material (Su discloses metal oxides such as NiO (nickel oxide), Cu-doped NiO (copper doped nickel oxide), V2O5 (vanadium pentoxide) for the quantum well layer, compounds that trap electrons and therefore transfer holes).
Regarding claim 7, Su discloses:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns include at least two two-dimensional semiconductor layers, and the at least two two-dimensional semiconductor layers form a moiré superlattice structure (Su, discloses that the quantum well layer can be two or more metals, can include two-dimensional nano materials. A moiré superlattice is formed when two-dimensional materials are vertically stacked that have a small twist or lattice mismatch, and different metals would have different lattice constants creating a lattice mismatch. Therefore the use of a moiré superlattice would have been obvious to one or ordinary skill in the art because Su teaches materials that meet all of the requirements for a moiré superlattice in the disclosure of the quantum well layer).
Regarding claim 9, The combination of Su and Kuekes disclose:
The light-emitting device according claim 1, wherein the plurality of adjustment patterns are arranged in a plurality of rows (Kuekes, Figure 1, discloses a nanowires in a plurality of rows); and
any two adjacent rows of adjustment patterns have an equal distance therebetween (Kuekes, Figure 1, discloses a nanowires in a plurality of rows), and/or any two adjacent columns of adjustment patterns have an equal distance therebetween.
Su and Kuekes fail to disclose:
a plurality of columns
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention to have applied formed the adjustment patterns in a columns as well as in rows doing so would allow multiple independent devices to be formed on the substrate forming an array of LED devices. Such devices could then be separated without damage to the active device layers or used as an LED array over a backplane.
Regarding claim 11, The combination of Su and Kuekes disclose:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns are disposed in the electron transporting layer (Su and Kuekes in combination teach adjustment pattern with an electron transporting pattern disposed over and filling the spaces between the nanowires);
the electron transporting layer has a first surface in contact with the first electrode (Su, Figure 4, electron transport layer 33 is in contact with second electrode 4 (mapped to first electrode)), and a second surface in contact with the quantum dot light-emitting layer (Su, Figure 1, electron transport layer 33, in combination with Kuekes teaching to form the nanowires of electron quantum well layer 32 as separated wires, the electron transport layer would have a surface in contact quantum dot light emitting layer 31); in a direction perpendicular to a plane where the first electrode is located, the plurality of adjustment patterns and the first surface have a distance therebetween (Su and Kuekes in combination have a distance from the nanowires to the surface of the light emitting layer), and the plurality of adjustment patterns and the second surface have another distance therebetween (Su and Kuekes in combination have another distance from the nanowire to the surface of the electron transport layer); or
the plurality of adjustment patterns are disposed in the electron transporting layer;
the electron transporting layer has the first surface in contact with the first electrode, and
the second surface in contact with the quantum dot light-emitting layer; in the direction perpendicular to the plane where the first electrode is located, the plurality of adjustment patterns and the first surface have the distance therebetween, and the plurality of adjustment patterns and the second surface have the another distance therebetween; the electron transporting layer includes a first electron transporting sub-layer and a second electron transporting sub-layer, and the first electron transporting sub-layer is closer to the first electrode than the second electron transporting sub-layer; the plurality of adjustment patterns are disposed between the first electron transporting sub-layer and the second electron transporting sub-layer, and at least a portion of the second electron transporting sub-layer fills a gap between the plurality of adjustment patterns and is in contact with the first electron transporting sub-layer.
Regarding claim 13, The combination of Su and Kuekes disclose:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns are disposed between the electron transporting layer and the quantum dot light-emitting layer; or
the plurality of adjustment patterns are disposed between the electron transporting layer and the quantum dot light-emitting layer; and the quantum dot light-emitting layer is in contact with the electron transporting layer light-emitting between the plurality of adjustment patterns (Su and Kuekes in combination teach adjustment pattern with an electron transporting pattern disposed over and filling the spaces between the nanowires, and therefore in contact with the light emitting layer).
Regarding claim 16, The combination of Su and Kuekes fail to disclose:
The light-emitting device according to claim 1, wherein the plurality of adjustment patterns are disposed between the first electrode and the electron transporting layer, and the electron transporting layer is in contact with the first electrode through a gap between the plurality of adjustment patterns.
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention to have placed the adjustment pattern (the nanowire of Su) in the upper portion of the electron transporting layer, since the function of the nanowire is to trap electrons, it would need to be placed between the source of the electrons (the electrode) and the point where fewer electrons were desired (the quantum dot layer). Such a change in location would therefore be the reversal of parts or rearrangement of parts and under MPEP 2144.04 VI are considered obvious modifications.
Regarding claim 24, Su discloses:
A method for manufacturing a light-emitting device according to claim 1, the method comprising:
forming a first electrode (Figure 1, second electrode 4) on a substrate (Su, Figure 1, substrate 1);
forming an electron transporting layer on a side of the first electrode away from the substrate (Su, Figure 1, electron transport layer 33), the electron transporting layer including an N-type inorganic semiconductor material (Su, discloses that the “material of the electron transport layer is selected from the group consisting of inorganic nano material, doped inorganic nano material, ” and the inorganic nanometer material can be TiO2, nanometer ZnO and the doping agent comprises at least one of Mg, Al, and Li);
forming a quantum dot light-emitting layer on a side of the electron transporting layer away from the substrate (Su, Figure 1, quantum dot light emitting layer 31); and
forming a second electrode on a side of the quantum dot light-emitting layer away from the substrate (Su, Figure 1, first electrode 2), wherein
the method further comprises: forming a plurality of adjustment patterns (Su, Figure 1, electron quantum well layer 32, and Embodiment 1, which discloses that the material of the quantum well layer is nanowire); the plurality of adjustment patterns are each in contact with the electron transporting layer (Figure 1, quantum well layer 32 is in contact with electron transport layer 33;
Su fails to discloses the following limitations:
after forming the first electrode and before forming the quantum dot light-emitting layer,
distributed at intervals
and at least a portion of an orthographic projection of the electron transporting layer on the substrate is located in a gap between orthographic projections of the plurality of adjustment patterns on the substrate.
Regarding the limitation requiring the adjustment patterns to me formed after forming the first electrode and before forming the quantum dot light-emitting layer, this requires the device of Su to be formed in an inverted manner. Reversing the order of the fabrication steps of Su would be an obvious variation of the method of Su. See MPEP 2144.04 IV and V.
Kuekes discloses the following limitations:
distributed at intervals (Kuekes, Figure 1, and [0006] discloses forming nanowires arranged at intervals in a planer manner on substrates)
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date to have applied the teachings of Kuekes to the device of Su because Su discloses the use of nanowires to but fails to disclose the orientation of the nanowires and Kuekes discloses a known orientation for nanowires that can be fabricated using known techniques, and controlling the pattern of the nanowires would allow the amount of electron blocking to be controlled, which would allow the device operation to be optimized. In applying the orientation of Kuekes to the device of Su the subsequently deposited layer would fil the voids in the preceding layer, so in a layer of nanowires the voids between the wires would be filled with material of the next layer, which in the device of Su means that the electron transporting layer would fill the voids between the nanowires. Therefore the limitation of “at least a portion of an orthographic projection of the electron transporting layer on the substrate is located in a gap between the orthographic projections of the plurality of adjustment patterns on the substrate” would necessarily be met by the combination of Su and Kuekes.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Su and Kuekes as applied to claim 3 above, and further in view of Miyata US 20130069036 A1, hereafter Miyata.
Regarding claim 5, Su and Kuekes disclose:
The light-emitting device according to claim 3, wherein a lowest unoccupied molecular orbital level of the hole-transporting-type transparent oxide material is shallower than a lowest unoccupied molecular orbital level of the electron transporting layer; and/or
the light-emitting device further comprises a hole transporting layer (Su, Figure 2, hole transport layer 132) disposed between the quantum dot light-emitting layer (Su, Figure 2, quantum dot light emitting layer 133), and the second electrode (Su, Figure 2, first electrode 120),
Su and Kuekes fail to disclose:
a material of the plurality of adjustment patterns is the same as a material of the hole transporting layer.
Miyata discloses:
a material of the plurality of adjustment patterns is the same as a material of the hole transporting layer (Miyata, [0072] discloses a hole transport layer 3, is inorganic oxides such as nickel oxide (NiO), which a material Su discloses for the electron quantum well layer 134, the adjustment pattern in Su).
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention to have applied the teachings of Miyata to the device of Su and Kuekes and to therefore have formed the hole transporting layer of an inorganic oxide such as nickel oxide Doing so would allow two layers of the device to use the same material and would therefore simplify the production because two layers would share the material and deposition method.
Claims 19, 21-22, and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Su, CN 111540837 A, hereafter Su.
Regarding claim 19, Su discloses the following limitation:
A light-emitting device, comprising:
a first electrode (Su, Figure 1, second electrode 4);
an electron transporting layer disposed on a side of the first electrode (Su, Figure 1, electron transport layer 33);
a quantum dot light-emitting layer disposed on a side of the electron transporting layer away from the first electrode (Su, Figure 1, quantum dot light emitting layer 31); and
a second electrode disposed on a side of the quantum dot light-emitting layer away from the first electrode (Su, Figure 1, first electrode 2); and
an adjustment layer disposed between the first electrode and the quantum dot light-emitting layer and in contact with the electron transporting layer (Su, Figure 1, electron quantum well layer 32); wherein the adjustment layer is of a continuous film layer structure (Su discloses that the quantum well layer 32 can be a two dimensional nano material, can contain more than one material), and the adjustment layer includes at least two two-dimensional semiconductor layers (Su discloses that the quantum well layer 32 can be a two dimensional nano material, and a metal oxide semiconductor), and
the adjustment layer is configured to induce electron traps to trap electrons transmitted from the first electrode to the quantum dot light-emitting layer (Su, Embodiment 1, discloses that the electron quantum well layer 32 promotes charge balance and attracts a portion of the electrons.
Su fails to specifically disclose the following limitation:
and the at least two two-dimensional semiconductor layers form a moiré superlattice structure
However, Su does disclose all of the features of a moiré superlattice in the discloses for the quantum well layer. The materials disclosed for the quantum well layer include two material, include two-dimensional nano materials, can include metal oxide semiconductors, and are of thin nanometer scale dimensions. A moiré superlattice is formed when two-dimensional materials are vertically stacked that have a small twist or lattice mismatch (different materials have a lattice mismatch). Therefore the use of a moiré superlattice would have been obvious to one or ordinary skill in the art because Su teaches materials and constructions for the quantum well layer that meet all of the requirements for a moiré superlattice in the disclosure of the quantum well layer.
Regarding claim 21, Su discloses the following limitation:
The light-emitting device according to claim 19, wherein an interlayer twist angle between two adjacent two-dimensional semiconductor layers is less than or equal to 10◦. (This limitation includes a twist angle of zero, as would be the case if the moiré superlattice is formed from materials disclosed by Su for the quantum well layer).
Regarding claim 22, Su discloses the following limitation:
The light-emitting device according to claim 19, wherein the electron transporting layer includes a first electron transporting sub-layer and a second electron transporting sub-layer, and in a direction perpendicular to a plane in which the first electrode is located and pointing from the first electrode to the quantum dot light-emitting layer, the first electron transporting sub-layer, the adjustment layer and the second electron transporting sub-layer are sequentially stacked; or
the adjustment layer is disposed between the electron transporting layer and the
quantum dot light-emitting layer (Su, Figure 1, electron quantum well layer 32 is located between electron transport layer 33 and quantum dot light emitting layer 31); or
the adjustment layer is disposed between the first electrode and the electron transporting layer.
Regarding claim 29, Su discloses:
A method for manufacturing a light-emitting device according to claim 19, the method comprising:
forming a first electrode (Su, Figure 1, second electrode 4) on a substrate (Su, Figure 1, substrate 1);
forming an electron transporting layer on a side of the first electrode away from the substrate (Su, Figure 1, electron transport layer 33), the electron transporting layer including an N-type inorganic semiconductor material (Su, discloses that the “material of the electron transport layer is selected from the group consisting of inorganic nano material, doped inorganic nano material, ” and the inorganic nanometer material can be TiO2, nanometer ZnO and the doping agent comprises at least one of Mg, Al, and Li);
forming a quantum dot light-emitting layer on a side of the electron transporting layer away from the substrate (Su, Figure 1, quantum dot light emitting layer 31); and
forming a second electrode on a side of the quantum dot light-emitting layer away from the substrate (Su, Figure 1, first electrode 2), wherein
the adjustment layer is in contact with the electron transporting layer (Su, Figure 1, electron quantum well layer 32 is in contact with electron transport layer 33); the adjustment layer is of a continuous film layer structure (Su discloses two-dimensional materials for the electron quantum well layer 32); the adjustment layer includes at least two two-dimensional semiconductor layers (Su discloses semiconductors for electron quantum well layer 32),
Su fails to specifically disclose the following limitations:
after forming the first electrode and before forming the quantum dot light-emitting layer, the method further comprises: forming an adjustment layer
the at least two two-dimensional semiconductor layers form a moiré superlattice structure.
Regarding the limitation “after forming the first electrode and before forming the quantum dot light-emitting layer, the method further comprises: forming an adjustment layer” Forming the plurality of adjustment patterns prior to forming the quantum well layer of Su is equivalent to forming the inverted structure of Su. Reversing the order of the fabrication steps of Su would be an obvious variation of the method of Su. See MPEP 2144.04 IV and V.
Regarding the limitation “the at least two two-dimensional semiconductor layers form a moiré superlattice structure.” Su discloses all of the features of a moiré superlattice in the discloses for the quantum well layer. The materials disclosed for the quantum well layer include two material, include two-dimensional nano materials, can include metal oxide semiconductors, and are of thin nanometer scale dimensions. A moiré superlattice is formed when two-dimensional materials are vertically stacked that have a small twist or lattice mismatch (different materials have a lattice mismatch). Therefore the use of a moiré superlattice would have been obvious to one or ordinary skill in the art because Su teaches materials and constructions for the quantum well layer that meet all of the requirements for a moiré superlattice in the disclosure of the quantum well layer.
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Su as applied to claim 19 above, and further in view of Ahmed et al., US 20190363069 A1, hereafter Ahmed.
Regarding claim 35:
Su discloses the limitations of:
wherein the plurality of light-emitting devices are each the light-emitting device according to claim 19 (as detailed above)
Su fails to disclose the following limitations:
A display panel, comprising:
a backplane, the backplane including a substrate and a plurality of pixel circuits disposed on the substrate; and
a plurality of light-emitting devices disposed on the backplane,
a first electrode of at least one light-emitting device is closer to the backplane than a second electrode thereof, and a first electrode of a light-emitting device is electrically connected to a pixel circuit.
Ahmed discloses the following limitations:
A display panel (Ahmed, Figure 2, micro LED display 200), comprising:
a backplane (Ahmed, Figure 9, backplane 902), the backplane including a substrate (Ahmed, Figure 9, backplane 902 and [0032] which discloses that the backplane incudes a glass substrate)and a plurality of pixel circuits disposed on the substrate (Ahmed, Figure 9, pixel circuits 904); and
a plurality of light-emitting devices disposed on the backplane (Ahmed, Figure 9, micro LED layers 908), a first electrode of at least one light-emitting device is closer to the backplane than a second electrode thereof (Ahmed, Figure 9, shows a connection between the LED and the circuit below it and a transparent electrode 910 over the LEDs), and a first electrode of a light-emitting device is electrically connected to a pixel circuit (Ahmed, shown Figure 9).
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention to have applied the teachings of Ahmed to the device of Su and Kuekes because Ahmed discloses a useful display device made by combining individual LED devices, which combines the LEDs with circuitry necessary to operate the LEDs in the device.
Claims 30-31, 34 and 36 are rejected under 35 U.S.C. 103 as being unpatentable over Su and Kuekes as applied to claim 1 above, and further in view of Ahmed et al., US 20190363069 A1, hereafter Ahmed.
Regarding claim 30, Su and Kuekes disclose
the plurality of light-emitting devices are each the light-emitting device according to claim 1,
Su and Kuekes fail to disclose:
A display panel, comprising:
a backplane, the backplane including a substrate and a plurality of pixel circuits disposed on the substrate; and
a plurality of light-emitting devices disposed on the backplane, wherein the plurality of light-emitting devices are each the light-emitting device according to claim 1, a first electrode of at least one light-emitting device is closer to the backplane than a second electrode thereof, and a first electrode of a single light-emitting device is electrically connected to a pixel circuit.
Ahmed discloses:
A display panel (Ahmed, Figure 2, micro LED display 200), comprising:
a backplane (Ahmed, Figure 9, backplane 902), the backplane including a substrate (Ahmed, Figure 9, backplane 902 and [0032] which discloses that the backplane incudes a glass substrate) and a plurality of pixel circuits disposed on the substrate (Ahmed, Figure 9, pixel circuits 904); and
a plurality of light-emitting devices disposed on the backplane (Ahmed, Figure 9, micro LED layers 908), a first electrode of at least one light-emitting device is closer to the backplane (Ahmed, Figure 9, shows a connection between the LED and the circuit below it) than a second electrode thereof (Figure 9, transparent electrode 910 is shown over the LEDs), and a first electrode of a single light-emitting device is electrically connected to a pixel circuit (Ahmed, shown Figure 9).
It would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention to have applied the teachings of Ahmed to the device of Su and Kuekes because Ahmed discloses a useful display device made by combining individual LED devices, which combines the LEDs with circuitry necessary to operate the LEDs in the device.
Regarding claim 31, Su, Kuekes and Ahmed disclose:
The display panel according to claim 30, wherein a distance between two adjacent light-emitting devices is a first distance
a distance between two adjacent adjustment patterns of a light-emitting device is a second distance; and
the second distance is less than or equal to the first distance; and/or
the light-emitting device has a light-emitting region; and an area of a plurality of adjustment patterns of the light-emitting device is less than or equal to an area of the light-emitting region (The combination of Su, Kuekes and Ahmed discloses an LED, where the adjustment patterns (nanowires) cover less area than the entire light emitting region).
Regarding claim 34, Su, Kuekes and Ahmed disclose:
A display apparatus, comprising:
the display panel according to claim 30 (The combination of Su, Kuekes and Ahmed disclose the display panel of claim 30, which is an apparatus).
Regarding claim 36, Su, Kuekes and Ahmed disclose:
A display apparatus, comprising the display panel according to claim 34 (The combination of Su, Kuekes and Ahmed disclose the display panel of claim 34, which is an apparatus).
Allowable Subject Matter
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 15, the prior art of record fails to disclose, an LED device including the limitations of claim 13 where the number of lattice defects per unit area in a surface of the plurality of adjustment patterns in contact with the quantum dot light-emitting layer is less than a number of lattice defects per unit area in a surface of the electron transporting layer in contact with the quantum dot light-emitting layer.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Liu, US 20180219185 A1, discloses using ultraviolet light to form sub pixel spacing.
Kim et al., US 20180166643 A1, discloses a QLED with a light-amount enhancing layer.
Feng et al., US 20240237389 A1, to the same applicant, discloses a QLED.
Lu, US 20240315067 A, discloses a QLED with a passivation layer on the quantum dot layer.
Li, US 20240389375 A1, discloses a QLED with a metal layer in the electron transport layer.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LINDA J FLECK whose telephone number is (703)756-1253. The examiner can normally be reached 7:30-4:30 ET, first Friday off.
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/LINDA J. FLECK/ Examiner, Art Unit 2812
/William B Partridge/ Supervisory Patent Examiner, Art Unit 2812