DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on June 19, 2026, has been entered.
Status of claims
Claims 1-2, and 6-14 are pending. Claim 14 is withdrawn. Claims 1-2,6-13 are rejected.
Specification
The amendment filed December 19, 2025 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows:
[0024] The first mesa M1 has a first diameter, the second mesa M2 has a second diameter greater than the first diameter, and the third mesa M3 has a third diameter greater than the second diameter.
[0025] the graded band gap
[0029] the graded band gap
Applicant is required to cancel the new matter in the reply to this Office Action.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 6-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishibashi et al (U.S. 2013/0168793).
Regarding claim 1. Ishibashi et al discloses an avalanche photodiode ([0049] FIGS. 8, APD 304) comprising:
a first mesa (FIG. 8, item 102) of n-type material ([0035]) having a first diameter ([0035]);
a second mesa (FIG. 8, item 101) having a second diameter ([0035]) greater than the first diameter ([0035]);
the second mesa including:
an avalanche multiplication layer (FIG. 8, item 6; [0064]);
n-type (FIG. 8, item 7A; [0065]) and p-type (FIG. 8, item 5; [0063]) field control layers above ([0063]) and below ([0065]) the avalanche multiplication layer (FIG. 8, item 6; [0064]); and
an electron transit layer (FIG. 8, item 7B; [0066])
a sidewall ([0054]-[0056]) extending upward along a periphery ([0054]-[0056]) of the avalanche multiplication layer (FIG. 8, item 6; [0064]), the n-type (FIG. 8, item 7A; [0065]) and p-type field control layers (FIG. 8, item 5; [0063]), and the electron transit layer (FIG. 8, item 7B; [0066]); and
a p-type doped region (FIG. 8, item 15; [0076]) formed by Zn diffusion (FIG. 9, item 15; [0076]; [0055]), the p-type doped region (FIG. 8, item 15; [0076]) extending through each of the electron transit layer (FIG. 8, item 7B; [0066]) and the n-type (FIG. 8, item 7A; [0065]) and p- type (FIG. 8, item 5; [0063]) field control layers ([0065],[0063]) along the sidewall ([0054]-[0056]) for confining ([0054]-[0056]) the avalanche multiplication layer (FIG. 8, item 6; [0064]) to an interior ([0055]) of the second mesa (FIG. 8, item 101) and inhibiting leakage ([0054]-[0056]) across the sidewall ([0054]-[0056]) of the second mesa (FIG 8, item 101; [0054]-[0056]); and
a third mesa (FIG. 8, item 2) of p-type material ([0015]) having a third diameter ([0035]) greater than the second diameter ([0035]);
While Ishibashi et al discloses the p-type impurity region 15 with Be in FIG. 8. ([0054]), it does not appear to explicitly disclose a p-type Zn doped region 15 of figure 8.
However, Ishibashi et al teaches the p-type Zn doped region 15 ([0055], see fig 9).
Ishibashi teaches using Zn diffusion as an obvious alternative in forming the p-type impurity region since Ishibashi discloses both APD 304 of FIG. 8 and the APD 305 of FIG. 9 can eliminate the influence of the electrons on the side surface of the first mesa 101([0056]).
Therefore, one having ordinary skill in the art before the effective filing date of the claimed invention would readily recognize the p-type impurity region 15 in figure 8 can be formed by Zn diffusion, as this is a known dopant for p-type impurity region 15 in figure 8 can be formed by Zn diffusion as this is the known dopant for p-type impurity region 15 based on its suitability for its intended purpose as taught by Ishibashi et al ([0056]).
Since Ishibashi et al teaches multiple p-type materials for doped regions, it would have been obvious to one having ordinary skill in the art of semiconductors before the effective filing date of the claimed invention to have combined the avalanche photodiode as disclosed to modify Ishibashi et al with the teachings of the p-type Zn doped region as disclosed by Ishibashi et al. The use of the p-type impurity region in figure 8 can be formed by Zn diffusion, as this is a known dopant for p-type impurity region in figure 9 can be formed by Zn diffusion as this is the known dopant for p-type impurity region based on its suitability for its intended purpose in Ishibashi et al provides for a material suitable for its intended use to eliminate the influence of the electrons on the side surface of the first mesa (Ishibashi et al, [0056]).
The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See MPEP 2244.07.
The limitation formed by Zn diffusion is a product by process limitation in a device claim. As long as the p-type Zn doped region is met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I
Regarding claim 2. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 1 above.
Ishibashi et al further discloses wherein the first mesa (FIG. 8, item 102) comprises an n-type contact buffer layer (FIG. 8, item 8A; [0067]) and an n-type contact layer (FIG. 8, item 8B; [0068]; [0036]) above the n-type contact buffer layer (FIG. 8, item 8A; [0067]) for reducing contact resistance of a metal electrode (FIG. 8, item 9; [0069]) formed on a surface (FIG. 8, item 8A; [0067]) thereof.
Regarding claim 6. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 1 above.
Ishibashi et al further discloses wherein the high-field avalanche multiplication layer (FIG. 8, item 6; [0064]) comprises a single layer of wide bandgap material ([0036], i.e. the avalanche multiplier layer 6 is InAlAs) to minimize tunneling current ([0036]; [0007], i.e. a band gap.. can be sufficiently made large compared to InGaAs (for example, InP and InAlAs)).
Regarding claim 7. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 1 above.
Ishibashi et al further discloses wherein the third mesa comprises a semi-insulating substrate (FIG. 8, item 1; [0058]) onto which is deposited a buffer layer (FIG. 8, item 2; [0059]), a p-type light absorption layer (FIG. 8, item 3A; [0060]) and a graded band gap layer (FIG. 8, item 4; [0062]), and wherein the p-type Zn doped region (FIG. 8, item 15; [0055]) extends ([0050], i.e. the p-type impurity region 15 reaching the p-type light absorbing layer 3A is formed) through the graded band gap layer (FIG. 8, item 4; [0062]) and in to the p-type light absorption layer (FIG. 8, item 3A; [0060]).
Regarding claim 8. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 1 above.
Ishibashi et al further discloses wherein a lateral offset I (FIG. 8, item 14 not above item 15) is provided between the first mesa (FIG. 8, item 102) and the p-type Zn doped region (FIG. 8, item 15), and a further offset m ([0055], i.e. p-type impurity region 15 covers the encircling portion 14 of the avalanche multiplier layer 6 and the side surface of the first mesa 101) is provided between the p-type Zn doped region (FIG. 8, item 15) and the sidewall of the second mesa (FIG. 8, item 101).
Regarding claim 9. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 8 above.
Ishibashi et al further discloses wherein the third mesa (FIG. 8, item 2; [0059]) forms a p-type ring ([0050]) that circumscribes (FIG. 8 shows that item 2 circumscribes the ring of sidewall item 101) the sidewall of the second mesa (FIG. 9, item 101).
Regarding claim 10. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 2 above.
Ishibashi et al further discloses wherein the n-type contact buffer layer (FIG. 8, item 8A; [0067]) is fabricated from indium gallium arsenide phosphide (InGaAsP) ([0036]) and the n-type contact layer (FIG. 8, item 8B; [0068]) is fabricated from indium gallium arsenide (InGaAsP) ([0036]).
The limitation are fabricated from indium gallium arsenide phosphide (InGaAsP) is a product by process limitation in a device claim. As long as the n-type contact buffer layer and the n-type contact layer is met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I
Regarding claim 11. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 5 above.
Ishibashi et al further discloses wherein electron transit layer (FIG. 8, item 7B; [0067]), the avalanche multiplication layer (FIG. 8, item 6; [0064]), and the n-type (FIG. 8, item 7A; [0065]) and p-type (FIG. 8, item 5; [0063]) field control layers are fabricated from Indium Phosphide (InP).
Ishibashi et al further discloses electron transit layer (FIG. 8, item 7B; [0067]) is Indium Phosphide (InP) ([0036], i.e. electron transit layer 7B is InP).
The limitation are fabricated from Indium Phosphide (InP) is a product by process limitation in a device claim. As long as the electron transit layer, the avalanche multiplication layer, and the n-type and p-type field control layers limitations are met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I
Ishibashi et al fails to explicitly disclose the avalanche multiplication layer, and the n-type and p-type field control layers are Indium Phosphide (InP).
Ishibashi et al discloses avalanche multiplication layer (FIG. 8, item 6; [0064]; [0036], i.e. avalanche multiplier layer 6 is InAlAs), and the n-type (FIG. 8, item 7A; [0065]; [0036] i.e. the n-type electric layer 7A is n-InAlAs) and p-type (FIG. 8, item 5; [0063]; [0036], i.e. field control layer 5 is p-InAlAs) field control layers are Indium Aluminum Arsnide (InAlAs)([0036]).
However, Ishibashi et al further discloses in [0007] that the band gap of the electron transit layer 37B can be sufficiently made large compared to InGaAs (for example, InP and InAlAs).
Since Ishibashi et al teach InP and InAlAs for bandgap materials, it would have been obvious to one having ordinary skill in the art of semiconductors before the effective filing date of the claimed invention to have combined the avalanche photodiode as disclosed to modify Ishibashi et al with the teachings of the avalanche multiplication layer, and the n-type and p-type field control layers are Indium Phosphide (InP) as disclosed by Ishibashi et al. The use of band gap of the electron transit layer 37B can be sufficiently made large compared to InGaAs (for example, InP and InAlAs) in Ishibashi et al provides for a material with sufficiently large band gap for its intended use (Ishibashi et al, [0007]).
Ishibashi et al discloses substituting equivalents known for the same purpose. MPEP 2144.06 II. SUBSTITUTING EQUIVALENTS KNOWN FOR THE SAME PURPOSE
In order to rely on equivalence as a rationale supporting an obviousness rejection, the equivalency must be recognized in the prior art, and cannot be based on applicant’s disclosure or the mere fact that the components at issue are functional or mechanical equivalents. In re Ruff, 256 F.2d 590, 118 USPQ 340 (CCPA 1958) (The mere fact that components are claimed as members of a Markush group cannot be relied upon to establish the equivalency of these components. However, an applicant’s expressed recognition of an art-recognized or obvious equivalent may be used to refute an argument that such equivalency does not exist.); Smith v. Hayashi, 209 USPQ 754 (Bd. of Pat. Inter. 1980) (The mere fact that phthalocyanine and selenium function as equivalent photoconductors in the claimed environment was not sufficient to establish that one would have been obvious over the other. However, there was evidence that both phthalocyanine and selenium were known photoconductors in the art of electrophotography. "This, in our view, presents strong evidence of obviousness in substituting one for the other in an electrophotographic environment as a photoconductor." 209 USPQ at 759.). See MPEP.06 II art recognized equivalent for the same purpose.
Regarding claim 12. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 7 above.
Ishibashi et al further discloses wherein the p-type light absorption layer (FIG. 8, item 3A; [0060]) is fabricated from indium gallium arsnide (InGaAs) ([0036]) and the graded band gap layer (FIG. 8, item 4; [0062]) is fabricated from indium gallium arsenide (InGaAsP)([0036], i.e. the p-type light absorbing layer 3A is p-type doped InGaAs, the light absorbing layer 3B is InGaAs, the band gap inclined layer 4 is InAlGaAs in which the band gap gradually extends in the laminating direction (upper direction)).
The limitation are fabricated from indium gallium arsenide (InGaAsP) is a product by process limitation in a device claim. As long as the p-type light absorption layer and the graded band gap layer limitations are met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I
Regarding claim 13. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 8) of claim 7 above.
Ishibashi et al further discloses further including an n-type doped, wide band gap sub-contact layer (FIG. 8, item 8A; [0036]) above the electron transit layer (FIG. 8, item 7B) and extending to the sidewall ([0055]) of the second mesa (FIG. 8, item 101).
Response to Arguments
Applicant's arguments filed June 19, 2026 have been fully considered but they are not persuasive.
On page 7 of applicant’s remarks, applicant appears to be arguing that Ishibashi FIG. 7 and 9 do not disclose applicant’s amended claims. Applicant further argues that Ishibashi’s FIG. 8, does not teach a p-type Zn doped region extending through each of the electron transit layer and the n-type and p-type field control layers along the sidewall as recited in claim 1.
Examiner respectfully disagrees with applicant’s assessments of FIG. 8, against FIG. 7 and 9.
Although FIG. 8 teaches using Be implant in 15, Ishibashi teaches using Zn diffusion as an obvious alternative in forming the p-type impurity region since Ishibashi discloses both APD 304 of FIG. 8 and the APD 305 of FIG. 9 can eliminate the influence of the electrons on the side surface of the first mesa 101 ([0056]). The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination. See MPEP 2244.07.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ogura (U.S. 2011/0193133) discloses Photo Detection Device.
Takeuchi (U.S. 2011/0261848) discloses OPTICAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING OPTICAL SEMICONDUCTOR DEVICE
Iguchi et al (U.S. 9,698,297) discloses Light-receiving Device And Method For Producing The Same
Onoe (U.S. 2022/0924187) discloses SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
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/S.E.B./ Examiner, Art Unit 2815
/JOSHUA BENITEZ ROSARIO/Supervisory Patent Examiner, Art Unit 2815
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