Prosecution Insights
Last updated: May 29, 2026
Application No. 18/043,196

MESA AVALANCHE PHOTODIODE WITH SIDEWALL PASSIVATION

Non-Final OA §102§103
Filed
Feb 27, 2023
Priority
Aug 28, 2020 — provisional 63/071,533 +2 more
Examiner
BAUMAN, SCOTT E
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
National Research Council Of Canada
OA Round
2 (Non-Final)
47%
Grant Probability
Moderate
2-3
OA Rounds
3m
Est. Remaining
73%
With Interview

Examiner Intelligence

Grants 47% of resolved cases
47%
Career Allowance Rate
84 granted / 179 resolved
-21.1% vs TC avg
Strong +26% interview lift
Without
With
+26.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
22 currently pending
Career history
226
Total Applications
across all art units

Statute-Specific Performance

§103
79.9%
+39.9% vs TC avg
§102
14.4%
-25.6% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 179 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The amendment filed December 19, 2025 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows: [0024] The first mesa M1 has a first diameter, the second mesa M2 has a second diameter greater than the first diameter, and the third mesa M3 has a third diameter greater than the second diameter. [0025] the graded band gap [0029] the graded band gap Applicant is required to cancel the new matter in the reply to this Office Action. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 6-10, 12-13 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Ishibashi et al (U.S. 2013/0168793). Regarding claim 1. Ishibashi et al discloses an avalanche photodiode (FIG. 9, item 305) comprising: a first mesa (FIG. 9, item 102) of n-type material ([0035]) having a first diameter ([0035]); a second mesa (FIG. 9, item 101) having an active region ([0049]) having a second diameter ([0035]) greater than the first diameter ([0035]); the second mesa including: an avalanche multiplication layer (FIG. 9, item 6; [0064]); n-type (FIG. 9, item 7A; [0065]) and p-type (FIG. 9, item 5; [0063]) field control layers above ([0063]) and below ([0065]) the avalanche multiplication layer (FIG. 9, item 6; [0064]); and an electron transit layer (FIG. 9, item 7B; [0067]) and a third mesa (FIG. 9, item 2) of p-type material ([0015]) having a third diameter ([0035]) greater than the second diameter ([0035]); wherein the second mesa (FIG. 9, item 101) includes a sidewall ([0055]) having a p-type Zn doped region (FIG. 9, item 15; [0076]) formed by Zn diffusion ([0055]) the p-type Zn doped region (FIG. 9, item 15; [0076]) extends upward along a periphery (FIG. 9, item 14 and 11’) of the electron transit layer (FIG. 9, item 7B; [0067]) and the n-type (FIG. 9, item 7A; [0065]) and p-type (FIG. 9, item 5; [0063]) field control layers ([0063], [0065]) for confining the avalanche multiplication laver (FIG. 9, item 6; [0064] to inhibit leakage ([0055]) alonq the sidewall ([0055]) of the second mesa ([0055], i.e. the potential drop of the side surface of the first mesa 101 does not occur). Regarding claim 2. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 1 above. Ishibashi et al further discloses wherein the first mesa (FIG. 9, item 102) comprises an n-type contact buffer layer (FIG. 9, item 8A; [0067]) and an n-type contact layer (FIG. 9, item 8B; [0068]; [0036]) above the n-type contact buffer layer (FIG. 9, item 8A; [0067]) for reducing contact resistance of a metal electrode (FIG. 9, item 9; [0069]) formed on a surface (FIG. 9, item 8A; [0067]) thereof. Regarding claim 6. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 1 above. Ishibashi et al further discloses wherein the high-field avalanche multiplication layer (FIG. 9, item 6; [0064]) comprises a single layer of wide bandgap material ([0036], i.e. the avalanche multiplier layer 6 is InAlAs) to minimize tunneling current ([0036]; [0007], i.e. a band gap ... can be sufficiently made large compared to InGaAs (for example, InP and InAlAs)). Regarding claim 7. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 1 above. Ishibashi et al further discloses wherein the third mesa comprises a semi-insulating substrate (FIG. 9, item 1; [0058]) onto which is deposited a buffer layer (FIG. 9, item 2; [0059]), a p-type light absorption layer (FIG. 9, item 3A; [0060]) and a graded band gap layer (FIG. 9, item 4; [0062]), and wherein the p-type Zn doped region (FIG. 9, item 15; [0055]) extends ([0050], i.e. the p-type impurity region 15 reaching the p-type light absorbing layer 3A is formed) through the graded band gap layer (FIG. 9, item 4; [0062]) and in to the p-type light absorption layer (FIG. 9, item 3A; [0060]). Regarding claim 8. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 1 above. Ishibashi et al further discloses wherein a lateral offset I (FIG. 9, item 14 not above item 15) is provided between the first mesa (FIG. 9, item 102) and the p-type Zn doped region (FIG. 9, item 15), and a further offset m ([0055], i.e. p-type impurity region 15 covers the encircling portion 14 of the avalanche multiplier layer 6 and the side surface of the first mesa 101) is provided between the p-type Zn doped region (FIG. 9, item 15) and the sidewall of the second mesa (FIG. 9, item 101). Regarding claim 9. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 8 above. Ishibashi et al further discloses wherein the third mesa (FIG. 9, item 2; [0059]) forms a p-type ring ([0050]) that circumscribes (FIG. 9 shows that item 2 circumscribes the ring of sidewall item 101) the sidewall of the second mesa (FIG. 9, item 101). Regarding claim 10. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 2 above. Ishibashi et al further discloses wherein the n-type contact buffer layer (FIG. 9, item 8A; [0067]) is fabricated from indium gallium arsenide phosphide (InGaAsP) ([0036]) and the n-type contact layer (FIG. 9, item 8B; [0068]) is fabricated from indium gallium arsenide (InGaAsP) ([0036]). The limitation are fabricated from indium gallium arsenide phosphide (InGaAsP) is a product by process limitation in a device claim. As long as the n-type contact buffer layer and the n-type contact layer is met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I Regarding claim 12. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 7 above. Ishibashi et al further discloses wherein the p-type light absorption layer (FIG. 9, item 3A; [0060]) is fabricated from indium gallium arsnide (InGaAs) ([0036]) and the graded band gap layer (FIG. 9, item 4; [0062]) is fabricated from indium gallium arsenide (InGaAsP)([0036], i.e. the p-type light absorbing layer 3A is p-type doped InGaAs, the light absorbing layer 3B is InGaAs, the band gap inclined layer 4 is InAlGaAs in which the band gap gradually extends in the laminating direction (upper direction)). The limitation are fabricated from indium gallium arsenide (InGaAsP) is a product by process limitation in a device claim. As long as the p-type light absorption layer and the graded band gap layer limitations are met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I Regarding claim 13. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 7 above. Ishibashi et al further discloses further including an n-type doped, wide band gap sub-contact layer (FIG. 9, item 8A; [0036]) above the electron transit layer (FIG. 9, item 7B) and extending to the sidewall ([0055]) of the second mesa (FIG. 9, item 101). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Ishibashi et al (U.S. 2013/0168793) as applied to claim 5 above. Regarding claim 11. Ishibashi et al discloses all the limitation of the avalanche photodiode (FIG. 9, item 305) of claim 5 above. Ishibashi et al further discloses wherein electron transit layer (FIG. 9, item 7B; [0067]), the avalanche multiplication layer (FIG. 9, item 6; [0064]), and the n-type (FIG. 9, item 7A; [0065]) and p-type (FIG. 9, item 5; [0063]) field control layers are fabricated from Indium Phosphide (InP). Ishibashi et al further discloses electron transit layer (FIG. 9, item 7B; [0067]) is Indium Phosphide (InP) ([0036], i.e. electron transit layer 7B is InP). The limitation are fabricated from Indium Phosphide (InP) is a product by process limitation in a device claim. As long as the electron transit layer, the avalanche multiplication layer, and the n-type and p-type field control layers limitations are met, then the product by process limitation is met. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) See MPEP 2173.05(p) Section I Ishibashi et al fails to explicitly disclose the avalanche multiplication layer, and the n-type and p-type field control layers are Indium Phosphide (InP). Ishibashi et al discloses avalanche multiplication layer (FIG. 9, item 6; [0064]; [0036], i.e. avalanche multiplier layer 6 is InAlAs), and the n-type (FIG. 9, item 7A; [0065]; [0036] i.e. the n-type electric layer 7A is n-InAlAs) and p-type (FIG. 9, item 5; [0063]; [0036], i.e. field control layer 5 is p-InAlAs) field control layers are Indium Aluminum Arsnide (InAlAs)([0036]). However, Ishibashi et al further discloses in [0007] that the band gap of the electron transit layer 37B can be sufficiently made large compared to InGaAs (for example, InP and InAlAs). Since Ishibashi et al teach InP and InAlAs for bandgap materials, it would have been obvious to one having ordinary skill in the art of semiconductors before the effective filing date of the claimed invention to have combined the avalanche photodiode as disclosed to modify Ishibashi et al with the teachings of the avalanche multiplication layer, and the n-type and p-type field control layers are Indium Phosphide (InP) as disclosed by Ishibashi et al. The use of band gap of the electron transit layer 37B can be sufficiently made large compared to InGaAs (for example, InP and InAlAs) in Ishibashi et al provides for a material with sufficiently large band gap for its intended use (Ishibashi et al, [0007]). Ishibashi et al discloses substituting equivalents known for the same purpose. MPEP 2144.06 II. SUBSTITUTING EQUIVALENTS KNOWN FOR THE SAME PURPOSE In order to rely on equivalence as a rationale supporting an obviousness rejection, the equivalency must be recognized in the prior art, and cannot be based on applicant’s disclosure or the mere fact that the components at issue are functional or mechanical equivalents. In re Ruff, 256 F.2d 590, 118 USPQ 340 (CCPA 1958) (The mere fact that components are claimed as members of a Markush group cannot be relied upon to establish the equivalency of these components. However, an applicant’s expressed recognition of an art-recognized or obvious equivalent may be used to refute an argument that such equivalency does not exist.); Smith v. Hayashi, 209 USPQ 754 (Bd. of Pat. Inter. 1980) (The mere fact that phthalocyanine and selenium function as equivalent photoconductors in the claimed environment was not sufficient to establish that one would have been obvious over the other. However, there was evidence that both phthalocyanine and selenium were known photoconductors in the art of electrophotography. "This, in our view, presents strong evidence of obviousness in substituting one for the other in an electrophotographic environment as a photoconductor." 209 USPQ at 759.). See MPEP.06 II art recognized equivalent for the same purpose. Response to Arguments Applicant's arguments filed December 19, 2025 have been fully considered but they are not persuasive. On page 9 of applicant’s remarks, applicant appears to be arguing that Ishibashi et al does not disclose the p-type doped region extends upwards along a periphery of the electron transit of the electron transit layer and the n-type and p-type field control layers of applicant’s claim 1 language because Ishibashi et al layers 7A and 7B do not extend to the same sidewalls as layers 4, 5, and 6. Examiner respectfully points out that Ishibashi discloses applicant’s claim 1 as explained above. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., layers 7A and 7B do not extend to the same sidewalls as layers 4, 5, and 6) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT E BAUMAN whose telephone number is (469)295-9045. The examiner can normally be reached M-F, 9-5 CST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.E.B./ Examiner, Art Unit 2815 /JOSHUA BENITEZ ROSARIO/Supervisory Patent Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Feb 27, 2023
Application Filed
Aug 21, 2025
Non-Final Rejection mailed — §102, §103
Dec 19, 2025
Response Filed
Jan 20, 2026
Final Rejection mailed — §102, §103
Mar 05, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
47%
Grant Probability
73%
With Interview (+26.4%)
3y 6m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 179 resolved cases by this examiner. Grant probability derived from career allowance rate.

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