DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21, 22, 23, 26, 27, 29, 31, 33-34, 36, and 37 are rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (“Bibl”), US 2015/0169011 (listed in the IDS dated December 17, 2024) in view of Hasegawa er al. (“Hasegawa”), US 2018/0227528 (the US counterpart of CN 11147759 listed in the IDS dated September 25, 2024).
Regarding Claim 21, Bibl discloses a display screen (201; Fig. 3; ¶ 0046), comprising:
a redistribution layer (202; Fig. 2A; ¶ 0046), comprising a flexible dielectric layer (¶ 0046 “multiple layers of a multi-layer display substrate 202”, ¶ 0047 “202 is a flexible glass substrate”) and a metal interconnection structure (204, 206; 207A, 207B, 212; Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”, ¶ 0049) disposed in the flexible dielectric layer (Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”);
a plurality of light emitting units (groups of red, green, and blue led devices 214 in sub-pixel arrangement; Fig. 3; ¶ 0050 four units are shown in Fig. 3), wherein each light emitting unit of the plurality of light emitting units comprises at least one light emitting chip (214; Fig. 3; ¶ 0051 “one or more LED devices 214”), each light emitting chip is disposed on the redistribution layer (Fig. 3; ¶ 0049 “bonded to the display substrate 202”), and a pad (¶ 0050 “bottom conductive contacts”) of each light emitting chip is bonded to the metal interconnection structure ( Fig. 3; ¶ 0049 “bonded to the display substrate 202”, ¶ 0049 “in electrical connection with the plurality of through vias 204”); and
a plurality of driver chips (216; Fig. 3; ¶ 0051 “chips 216” “drive one or more LED devices 214”), disposed on the redistribution layer (Fig. 3; ¶ 0049 “chips 216” “bonded to the display substrate 202”), wherein a pad of each driver chip (Fig. 3 shown but not labeled - see annotated Fig. 3 infra) of the plurality of driver chips is bonded to the metal interconnection structure (¶ 0049 “chips 216” “in electrical connection with the plurality of through vias 204”); and
wherein in each light emitting unit, the driver chip of the respective light emitting unit is configured to drive the respective light emitting chip to emit light (Fig. 3; ¶ 0051 “each micro chip 216 couples with one or more red, green, and blue led devices 214 that emit different colors of light”), and wherein the metal interconnection structure comprises one or more metal pattern layers (212; Figs. 2A, 3; ¶ 0049), and a side of each of the one or more metal pattern layers that faces away from the light emitting chips of the plurality of light emitting units is in contact with the flexible dielectric layer (Fig. 3; ¶ 0049 “212 may also be located on the top surface 203 of display substrate 202”).
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Bibl does not disclose wherein in each light emitting unit, a driver chip of the respective light emitting unit is electrically connected to the respective light emitting chip of the respective light emitting unit by the metal interconnection structure.
Hasegawa discloses wherein in each light emitting unit (10A; Fig. 2; ¶ 0084), a driver chip (12; Fig. 1; ¶ 0084) of the respective light emitting unit is electrically connected to the respective light emitting chip (11a; Fig. 1; ¶ 0090) of the respective light emitting unit by the metal interconnection structure (wiring lines of 15; Fig. 3; ¶ 0090 “rewiring layer 15 is a multi-layer wiring layer that includes, for example, a wiring line for electrical coupling between each of the light-emitting devices 11 a in the light-emitting device section 11 and the drive device 12”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein in each light emitting unit, a driver chip of the respective light emitting unit is electrically connected to the respective light emitting chip of the respective light emitting unit by the metal interconnection structure, as taught by Hasegawa, so that an “interval between the drive device 12 and the light-emitting device 11a is” “narrow and small” (Hasegawa ¶ 0087) making the electrical connection more reliable.
Regarding Claim 22, Bibl discloses wherein:
the redistribution layer comprises a first surface (203; Fig. 2A; ¶ 0049), and the light emitting chips of the plurality of light emitting units and the plurality of driver chips are disposed on the first surface (Fig. 3; ¶ 0049, 0050, 0052); and
the one or more metal pattern layers comprise a plurality of first metal wires (right and left 212 of Fig. 2A), a first end (left side of 212) of each first metal wire of the plurality of first metal wires is bonded to a pad of a corresponding light emitting chip (Fig. 3; ¶ 0052 “micro LED devices” are “bonded to a wiring 212”), and a second end (right side of 212) of each first metal wire is bonded to a pad of a corresponding driver chip (Fig. 3; ¶ 0052 “micro chips are” “bonded to a wiring 212”).
Regarding Claim 23, Bibl discloses wherein:
the redistribution layer comprises a first surface (203; Fig. 2A; ¶ 0046) and a second surface (205; Fig. 2A; ¶ 0046), the first surface and the second surface are opposite to each other (Fig. 2A), each light emitting chip of the plurality of light emitting units is disposed on the first surface (Figs. 3-4; ¶ 0049), and each driver chip (230; Fig. 4; ¶ 0057) of the plurality of driver chips (230; Fig. 4; ¶ 0057) is disposed on the second surface (Fig. 4; ¶ 0057); and
the metal interconnection structure comprises a metal through via (204; Figs. 2A, 2B, 4; ¶ 0058) that penetrates the flexible dielectric layer (¶ 0058), wherein an end of the metal through via is bonded to a pad of a light emitting chip (¶ 0058 “in electrical connection with the LEDs 214”), and the other end of the metal through via is bonded to a pad of a driver chip (¶ 0058 “driver ICs 230 are” “in electrical connection with interconnects illustrated as through vias 204”).
Regarding Claim 26, Bibl discloses wherein the display screen further comprises a sensor (¶ 0011 “A uniform distribution of ambient light sensors can be located in the array of micro chips” where micro chips 216 are in display screen 201, ¶ 0051 “sensors such as touch sensors or light sensors can also be located on the front surface of the display substrate within the display area similarly as the micro chips”), the sensor comprises a sensor chip (216; ¶ 0051 “sensors such as touch sensors or light sensors”), the sensor chip is disposed on the redistribution layer (¶ 0051 “sensors such as touch sensors or light sensors can also be located on the front surface of the display substrate within the display area similarly as the micro chips” so the sensor chip is disposed on the redistribution layer), and a pad of the sensor chip is electrically connected to the metal interconnection structure (¶ 0057 “similarly as the micro chips” so similar to the micro chips - the pad of the sensor chip is electrically connected to the metal interconnection structure – see annotated Fig. 3 supra).
Regarding Claim 27, Bibl discloses wherein the sensor chip and the light emitting chips of the plurality of light emitting units are located on a same side of the redistribution layer (¶ 0051 “sensors can also be located on the front surface of the display substrate within the display area” so the sensor chip and light emitting chips are located on the same side of the redistribution layer), and the sensor chip is disposed between two adjacent light emitting chips (Fig. 3; ¶ 0057 “similarly as the micro chips” similar to chips 216 – the sensor chip is disposed between two adjacent light emitting chips).
Regarding Claim 29, Bibl discloses wherein:
the at least one light emitting chip in a first light emitting unit of the plurality of light emitting units comprises a first light emitting chip (the leftmost 214 in Fig. 3; ¶ 0049-0051), a second light emitting chip (the second to leftmost 214 in Fig. 3; ¶ 0049-0051), and a third light emitting chip (the third to leftmost 214 in Fig. 3; ¶ 0049-0051), wherein the first light emitting chip, the second light emitting chip, and the third light emitting chip respectively are configured to emit trichromatic light (¶ 0051 “each pixel includes three sub-pixels that emit red, green, and blue light”); and
wherein one driver chip (216; Fig. 3; ¶ “chip 216 can…drive one or more LED devices 214”) is electrically connected (¶ 0051 “chip 216 couples with one or more red, green, and blue led devices 214”) to the first light emitting chip, the second light emitting chip, and the third light emitting chip in the first light emitting unit.
Regarding Claim 31, Bibl discloses wherein the display screen further comprises:
a packaging layer (222; Fig. 4; ¶ 0053, 0056), located on a side of the light emitting chips (Fig. 4; ¶ 0053, 0056) of the plurality of light emitting units and that faces away from the redistribution layer (Fig. 4; ¶ 0053, 0056), and covering the light emitting chip of the plurality of light emitting units and the redistribution layer (Fig. 4 ¶ 0053 “over the display”).
Regarding Claim 33, Bibl discloses wherein a material of the flexible dielectric layer comprises polyimide (¶ 0047).
Regarding Claim 34, Bibl discloses a display screen (201; Fig. 3; ¶ 0046) comprises:
a redistribution layer (202; Fig. 2A; ¶ 0046), comprising a flexible dielectric layer (¶ 0046 “multiple layers of a multi-layer display substrate 202”, ¶ 0047 “202 is a flexible glass substrate”) and a metal interconnection structure (204, 206; 207A, 207B, 212 Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”) disposed in the flexible dielectric layer (Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”);
a plurality of light emitting units (groups of red, green, and blue led devices 214 in sub-pixel arrangement; Fig. 3; ¶ 0050 four units are shown in Fig. 3), wherein each light emitting unit of the plurality of light emitting units comprises at least one light emitting chip (214; Fig. 3; ¶ 0051 “one or more LED devices 214”), the light emitting chips of the plurality of light emitting units are disposed on the redistribution layer (Fig. 3; ¶ 0049 “bonded to the display substrate 202”), and a pad (¶ 0050 “bottom conductive contacts”) of each light emitting chip of the plurality of light emitting units is bonded to the metal interconnection structure ( Fig. 3; ¶ 0049 “bonded to the display substrate 202”, ¶ 0049 “in electrical connection with the plurality of through vias 204”); and
a plurality of driver chips (216; Fig. 3; ¶ 0051 “chips 216” “drive one or more LED devices 214”), disposed on the redistribution layer (Fig. 3; ¶ 0049 “chips 216” “bonded to the display substrate 202”), wherein a pad of each driver chip (Fig. 3 shown but not labeled - see annotated Fig. 3 supra) of the plurality of driver chips is bonded to the metal interconnection structure (¶ 0049 “chips 216” “in electrical connection with the plurality of through vias 204”); and
wherein in each light emitting unit of the plurality of light emitting units, the driver chip of the respective light emitting unit is configured to drive the light emitting chip of the respective light emitting unit to emit light (Fig. 3; ¶ 0051 “each micro chip 216 couples with one or more red, green, and blue led devices 214 that emit different colors of light”), and wherein the metal interconnection structure comprises one or more metal pattern layers (212; Figs. 2A, 3; ¶ 0049), and a side of each of the one or more metal pattern layers that faces away from the light emitting chips of the plurality of light emitting units is in contact with the flexible dielectric layer (Fig. 3; ¶ 0049 “212 may also be located on the top surface 203 of display substrate 202”).
Bibl does not disclose wherein in each light emitting unit of the plurality of light emitting units, a driver chip of the respective light emitting unit is electrically connected to a light emitting chip in the respective light emitting unit using the metal interconnection structure.
Hasegawa discloses wherein in each light emitting unit (10A; Fig. 2; ¶ 0084) of the plurality of light emitting units, a driver chip (12; Fig. 1; ¶ 0084) of the respective light emitting unit is electrically connected to a light emitting chip (11a; Fig. 1; ¶ 0090) in the respective light emitting unit using the metal interconnection structure (wiring lines of 15; Fig. 3; ¶ 0090 “rewiring layer 15 is a multi-layer wiring layer that includes, for example, a wiring line for electrical coupling between each of the light-emitting devices 11 a in the light-emitting device section 11 and the drive device 12”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein in each light emitting unit of the plurality of light emitting units, a driver chip of the respective light emitting unit is electrically connected to a light emitting chip in the respective light emitting unit using the metal interconnection structure, as taught by Hasegawa, so that an “interval between the drive device 12 and the light-emitting device 11a is” “narrow and small” (Hasegawa ¶ 0087) making the electrical connection more reliable.
Bibl as modified does not disclose a display terminal, comprising:
a circuit board; and
a display screen;
wherein the metal interconnection structure is electrically connected to the circuit board.
Bibl discloses, as prior art in Figs. 1A-1B, a display terminal (100; Fig. 1A; ¶ 0007), comprising:
a circuit board (106; Fig. 1A; ¶ 0008); and
a display screen (101; Figs. 1A-1B; ¶ 0007);
wherein the metal interconnection structure (107; Fig. 1A; ¶ 0008 “contact areas 107 of the FPC 108”) is electrically connected to the circuit board (Fig. 1A; ¶ 0007-0008).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl as modified by Hasegawa to have a display terminal, comprising: a circuit board; and a display screen; wherein the circuit board is electrically connected to a metal interconnection structure in a redistribution layer, as taught by the prior art of Bibl, in order to have a display terminal that can be used as various types of mobile electronic displays (Bibl ¶ 0004).
Regarding Claim 36, Bibl discloses wherein:
the redistribution layer comprises a first surface (203; Fig. 2A; ¶ 0049), and the plurality of light emitting chips and the plurality of driver chips are disposed on the first surface (Fig. 3; ¶ 0049, 0050, 0052); and
the one or more metal pattern layers comprise a plurality of first metal wires (right and left 212 of Fig. 2A), a first end (left side of 212) of each first metal wire of the plurality of first metal wires is bonded to a pad of a corresponding light emitting chip (Fig. 3; ¶ 0052 “micro LED devices” are “bonded to a wiring 212”), and a second end (right side of 212) of each first metal wire of the plurality of first metal wires is bonded to a pad of a corresponding driver chip (Fig. 3; ¶ 0052 “micro chips are” “bonded to a wiring 212”).
Regarding Claim 37, Bibl discloses wherein:
the redistribution layer comprises a first surface (203; Fig. 2A; ¶ 0046) and a second surface (205; Fig. 2A; ¶ 0046), the first surface and the second surface are disposed opposite to each other (Fig. 2A), the plurality of light emitting chips is disposed on the first surface (Figs. 3-4; ¶ 0049), and the plurality of driver chips (230; Fig. 4; ¶ 0057) is disposed on the second surface (Fig. 4; ¶ 0057); and
the metal interconnection structure comprises a metal through via (204; Figs. 2A, 2B, 4; ¶ 0058) that penetrates the flexible dielectric layer (¶ 0058), wherein a first end of the metal through via is bonded to a pad of a light emitting chip (¶ 0058 “in electrical connection with the LEDs 214”), and a second end of the metal through via is bonded to a pad of a driver chip (¶ 0058 “driver ICs 230 are” “in electrical connection with interconnects illustrated as through vias 204”).
Claims 24 and 38 are rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (“Bibl”), US 2015/0169011 in view of Hasegawa er al. (“Hasegawa”), US 2018/0227528 as applied to Claims 21 and 34 supra, and further in view of Chung et al. (“Chung”), US 2019/0287949 and Lin et al. (“Lin”), 2020/0041111.
Regarding Claim 24, Bibl discloses wherein a material (¶ 0049 “metals films”) of the metal interconnection structure (204, 206; 207A, 207B; Fig. 2A; ¶ 0046).
Bibl as modified does not disclose wherein a material of the metal interconnection structure is the same as a material of the pads of the light emitting chips of the plurality of light emitting units and a material of the pads of the plurality of driver chips.
Chung discloses wherein a material of the metal interconnection structure is the same as a material of the pads (Fig. 1B; ¶ 0025 “metal pad 144” and “metal pad 142”) of the light emitting chips (140R, 140G, 140B; Fig. 1B; ¶ 0025) of the plurality of light emitting units (140; Fig. 1B; ¶ 0025).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein a material of the metal interconnection structure is the same as a material of the pads of the light emitting chips of the plurality of light emitting units, as taught by Chung, in order to use the same material for those items and thereby reduce the cost of manufacturing the display.
Bibl as modified does not disclose wherein a material of the metal interconnection structure is the same as a material of the pads of the plurality of driver chips.
Lin discloses wherein a material of the metal interconnection structure is the same as a material of the pads (51; Fig. 9; ¶ 0052 “metal pads 51”) of the plurality of driver chips (5; Fig. 9; ¶ 0052).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein a material of the metal interconnection structure is the same as a material of the pads of the plurality of driver chips, as taught by Lin, in order to use the same material for those items and thereby reduce the cost of manufacturing the display.
Because Bibl discloses a material of the metal interconnection structure is “metal”, Chung discloses a material of the pads of the light emitting chips is “metal”, and Lin discloses a material of the pads of the plurality of driver chips is “metal”, the combination of those references discloses that the materials are “the same” and Claim 24 is unpatentable.
Regarding Claim 38, Bibl discloses wherein a material (¶ 0049 “metals films”) of the metal interconnection structure (204, 206; 207A, 207B; Fig. 2A; ¶ 0046).
Bibl as modified does not disclose wherein a material of the metal interconnection structure is the same as a material of the pads of the light emitting chips of the plurality of light emitting units and a material of the pads of the plurality of driver chips.
Chung discloses wherein a material of the metal interconnection structure is the same as a material of the pads (Fig. 1B; ¶ 0025 “metal pad 144” and “metal pad 142”) of the light emitting chips (140R, 140G, 140B; Fig. 1B; ¶ 0025) of the plurality of light emitting units (140; Fig. 1B; ¶ 0025).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein a material of the metal interconnection structure is the same as a material of the pads of the light emitting chips of the plurality of light emitting units, as taught by Chung, in order to use the same material for those items and thereby reduce the cost of manufacturing the display.
Bibl as modified does not disclose wherein a material of the metal interconnection structure is the same as a material of the pads of the plurality of driver chips.
Lin discloses wherein a material of the metal interconnection structure is the same as a material of the pads (51; Fig. 9; ¶ 0052 “metal pads 51”) of the plurality of driver chips (5; Fig. 9; ¶ 0052).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein a material of the metal interconnection structure is the same as a material of the pads of the plurality of driver chips, as taught by Lin, in order to use the same material for those items and thereby reduce the cost of manufacturing the display.
Because Bibl discloses a material of the metal interconnection structure is “metal”, Chung discloses a material of the pads of the light emitting chips is “metal”, and Lin discloses a material of the pads of the plurality of driver chips is “metal”, the combination of those references discloses that the materials are “the same” and Claim 38 is unpatentable.
Claims 25, 28, and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (“Bibl”), US 2015/0169011 in view of Hasegawa er al. (“Hasegawa”), US 2018/0227528 as applied to Claims 21 and 26-27 supra, and further in view of Kim et al. (“Kim”), US 2020/0161405.
Regarding Claim 25, Bibl discloses wherein the one or more metal pattern layers comprise a plurality of second metal wires (right and left 212 of Fig. 2A), a first end (right side of 212) of each second metal wire of the plurality of second metals wire is electrically connected to a pad of a corresponding driver chip (Fig. 3 in this instance a pad of driver chip 216; ¶ 0052 “micro chips are” “bonded to a wiring 212”).
Bibl does not disclose
wherein the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area;
wherein the display screen further comprises a plurality of first bonding pins disposed in the second area; and
a second end of each second metal wire of the plurality of second metal wires is electrically connected to a corresponding first bonding pin.
Kim discloses
wherein the display screen has a first area (AA; Figs. 2-3; ¶ 0056) and a second area (DA; Figs. 2-3; ¶ 0056) located around the first area (Figs. 2-3), and the plurality of light emitting units (131, 132, 133; Fig 2; ¶ 0058) and the plurality of driver chips (137; ¶ 0058) are located in the first area (Fig. 2; ¶ 0058 “each single pixel 130 may include a corresponding pixel driver IC 137 (not shown in FIG. 2), and the pixel driver IC 137 may drive the light emitting diodes corresponding to each of the R, G, B sub-pixels 131, 132 and 133”);
wherein the display screen further comprises a plurality of first bonding pins (172 of 170; Figs. 2-4; ¶ 0062-0064) disposed in the second area (Figs. 2-4; ¶ 0062-0064); and
a second end of each second metal wire of the plurality of second metal wires is electrically connected to a corresponding first bonding pin (Figs. 2-4; ¶ 0058-0066 in this instance 172 is electrically connected to driver chip).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area; wherein the display screen further comprises a plurality of first bonding pins disposed in the second area; and a second end of each second metal wire of the plurality of second metal wires is electrically connected to a corresponding first bonding pin, as taught by Kim, to have components on opposite surfaces to thereby have a compact structure, making the system more structurally sound (Kim ¶ 0009).
Regarding Claim 28, Bibl discloses wherein the one or more metal pattern layers comprise a plurality of third metal wires (right and left 212 of Fig. 2A), a first end of each of the third metal wires (right side of 212) is electrically connected to the pad of the sensor chip (Fig. 3 in this instance a pad of sensor chip 216; ¶ 0052 “micro chips are” “bonded to a wiring 212”).
Bibl does not disclose
wherein the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area;
wherein the display screen further comprises a plurality of second bonding pins disposed in the second area; and
a second end of each third metal wire of the plurality of third metal wires is electrically connected to a corresponding second bonding pin.
Kim discloses
wherein the display screen has a first area (AA; Figs. 2-3; ¶ 0056) and a second area (DA; Figs. 2-3; ¶ 0056) located around the first area (Figs. 2-3), and the plurality of light emitting units (131, 132, 133; Fig. 2; ¶ 0058) and the plurality of driver chips (137; ¶ 0058) are located in the first area (Fig. 2; ¶ 0058 “each single pixel 130 may include a corresponding pixel driver IC 137 (not shown in FIG. 2), and the pixel driver IC 137 may drive the light emitting diodes corresponding to each of the R, G, B sub-pixels 131, 132 and 133”);
wherein the display screen further comprises a plurality of second bonding pins (172 of 170; Figs. 2-4; ¶ 0062-0064) disposed in the second area (Figs. 2-4; ¶ 0062-0064); and
a second end of each third metal wire of the plurality of third metal wires is electrically connected to a corresponding second bonding pin (Figs. 2-4; ¶ 0058-0068 in this instance 172 is electrically connected to sensor chip).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area; wherein the display screen further comprises a plurality of second bonding pins disposed in the second area; and a second end of each third metal wire of the plurality of third metal wires is electrically connected to a corresponding second bonding pin, as taught by Kim, to have components on opposite surfaces to thereby have a compact structure, making the system more structurally sound (Kim ¶ 0009).
Regarding Claim 30, Bibl as modified does not disclose wherein:
the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area; and
the display screen further comprises a flexible and stretchable layer, wherein the flexible and stretchable layer is disposed in the second area in a stretching direction of the display screen, and is connected to a surface of a side of the redistribution layer that faces away from the plurality of light emitting units.
Kim discloses wherein:
the display screen has a first area (AA; Figs. 2-3; ¶ 0056) and a second area (DA; Figs. 2-3; ¶ 0056) located around the first area (Figs. 2-3), and the plurality of light emitting units (131, 132, 133; Fig 2; ¶ 0058) and the plurality of driver chips (137; ¶ 0058) are located in the first area (Fig. 2; ¶ 0058 “each single pixel 130 may include a corresponding pixel driver IC 137 (not shown in FIG. 2), and the pixel driver IC 137 may drive the light emitting diodes corresponding to each of the R, G, B sub-pixels 131, 132 and 133”); and
the display screen further comprises a flexible and stretchable layer (141; Fig. 4; ¶ 0065-0066), wherein the flexible and stretchable layer is disposed in the second area (Fig. 4) in a stretching direction of the display screen (Fig. 4), and is connected (¶ 0065-0066 “electrically coupled to and physically connected”) to a surface of a side of the redistribution layer that faces away from the plurality of light emitting units (Fig. 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein: the display screen has a first area and a second area located around the first area, and the plurality of light emitting units and the plurality of driver chips are located in the first area; and the display screen further comprises a flexible and stretchable layer, wherein the flexible and stretchable layer is disposed in the second area in a stretching direction of the display screen, and is connected to a surface of a side of the redistribution layer that faces away from the plurality of light emitting units, as taught by Kim, to have components on opposite surfaces to thereby have a compact structure, making the system more structurally sound (Kim ¶ 0009).
Claim 32 is rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (“Bibl”), US 2015/0169011 in view of Hasegawa er al. (“Hasegawa”), US 2018/0227528 as applied to Claims 21 and 31 supra, and further in view of Zhu et al. (“Zhu”), US 2019/0123297.
Regarding Claim 32, Bibl as modified does not disclose wherein a material of the packaging layer comprises silica gel.
Zhu discloses wherein a material of the packaging layer (6; Figs. 2-3; ¶ 0038-0040) comprises silica gel (¶ 0039).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein a material of the packaging layer comprises silica gel, as taught by Zhu, in order to have “water absorbing material such as a desiccant” (Zhu ¶ 0038) to “ensure the light-emitting layer” “is in a dry condition” (Zhu ¶ 0040) to improve “the service life” (Zhu ¶ 0021, 0029) of the display.
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (“Bibl”), US 2015/0169011 in view of Hasegawa er al. (“Hasegawa”), US 2018/0227528 as applied to Claim 34 supra, and further in view of Jeong et al. (“Jeong”), US 2020/0273397.
Regarding Claim 35, Bibl as modified does not disclose wherein the circuit board is a flexible circuit board.
Jeong discloses wherein the circuit board (40; Fig. 1; ¶ 0072-0073, 0075) is a flexible circuit board (¶ 0075).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Bibl to have wherein the circuit board is a flexible circuit board, as taught by Jeong, because both are chip on glass (COG) structures (Bibl ¶ 0007, Jeong ¶ 0072-0073) that have an advantageous compact design because the circuit board is “below the display panel” (Jeong ¶ 0075).
Allowable Subject Matter
Claims 39-40 are allowed.
Regarding Claim 39, the prior art does not disclose pasting a plurality of light emitting chips and a plurality of driver chips to a carrying surface of a carrier board, wherein a pad of each of the plurality of light emitting chip and a pad of each of the plurality of driver chips face away from the carrying surface of the carrier board; forming a plurality of first metal wires on the carrier board on which the plurality of light emitting chips and the plurality of driver chips are disposed, and removing the carrier board.
Claim 40 is allowable for depending on Claim 39.
Response to Arguments
In regards to the amendments and arguments filed 12/12/2025, the Claim 34 §112(b) rejections have been correctly addressed. Thank you for those corrections.
The applicant states (page 11) that the Office Action cannot map Bibl’s display substrate 202 to the claimed “redistribution layer” because “Bibl uses the term “redistribution layer” to refer to element 208”.
The broadest reasonable interpretation (BRI) standard used by the USPTO during patent examination requires that claims be interpreted in the broadest manner consistent with the specification. Therefore the use of the term “redistribution layer” in Bibl does not limit or confine the interpretation of Bibl using BRI. A redistribution layer is one or more layers of metal traces and insulating materials. (Note the “redistribution layer 20” containing metal wires 221 and dielectric layer 201 of Fig. 11 of the pending application.) Bibl. discloses “a single or multi-layer display substrate 202” (¶ 0046) that is “a flexible glass substrate” (0047) and includes one or more “interconnect lines and vias” (¶ 0046).
As explained supra, Bibl discloses a redistribution layer (202; Fig. 2A; ¶ 0046), comprising a flexible dielectric layer (¶ 0046 “multiple layers of a multi-layer display substrate 202”, ¶ 0047 “202 is a flexible glass substrate”) and a metal interconnection structure (204, 206; 207A, 207B, 212; Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”, ¶ 0049) disposed in the flexible dielectric layer (Figs. 2A-2B; ¶ 0046 “each interconnect 204, 206 may be a series of interconnect lines 207A and vias 207B through multiple layers of a multi-layer display substrate 202”) (emphasis added).
The applicant also states (page 11) that Bibl’s redistribution layer 208 is “not equivalent to the claimed “redistribution layer.””
The Office Action does not state that element 208 of Bibl is equivalent to the claimed redistribution layer.
Independent Claim 21 is rejected for at least the reasons stated supra. Dependent Claims 22-33 are rejected for at least the reasons stated supra.
Independent Claim 34 is rejected for at least the reasons stated supra. Dependent Claims 35-38 are rejected for at least the reasons stated supra.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/R.K./Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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